irqchip core changes for v4.0
- STi
- New driver, irq-st
- Renesas
- Use u32 type for 32bit regs
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Merge tag 'irqchip-core-4.0' of git://git.infradead.org/users/jcooper/linux into irq/core
irqchip core changes for v4.0 from Jason Cooper
- ST
- New driver, irq-st
- Renesas
- Use u32 type for 32bit regs
This commit is contained in:
Thomas Gleixner
commit
fdb7144ba3
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@ -0,0 +1,35 @@
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STMicroelectronics STi System Configuration Controlled IRQs
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-----------------------------------------------------------
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On STi based systems; External, CTI (Core Sight), PMU (Performance Management),
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and PL310 L2 Cache IRQs are controlled using System Configuration registers.
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This driver is used to unmask them prior to use.
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Required properties:
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- compatible : Should be set to one of:
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"st,stih415-irq-syscfg"
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"st,stih416-irq-syscfg"
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"st,stih407-irq-syscfg"
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"st,stid127-irq-syscfg"
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- st,syscfg : Phandle to Cortex-A9 IRQ system config registers
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- st,irq-device : Array of IRQs to enable - should be 2 in length
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- st,fiq-device : Array of FIQs to enable - should be 2 in length
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Optional properties:
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- st,invert-ext : External IRQs can be inverted at will. This property inverts
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these IRQs using bitwise logic. A number of defines have been
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provided for convenience:
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ST_IRQ_SYSCFG_EXT_1_INV
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ST_IRQ_SYSCFG_EXT_2_INV
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ST_IRQ_SYSCFG_EXT_3_INV
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Example:
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irq-syscfg {
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compatible = "st,stih416-irq-syscfg";
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st,syscfg = <&syscfg_cpu>;
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st,irq-device = <ST_IRQ_SYSCFG_PMU_0>,
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<ST_IRQ_SYSCFG_PMU_1>;
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st,fiq-device = <ST_IRQ_SYSCFG_DISABLED>,
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<ST_IRQ_SYSCFG_DISABLED>;
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st,invert-ext = <(ST_IRQ_SYSCFG_EXT_1_INV | ST_IRQ_SYSCFG_EXT_3_INV)>;
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};
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@ -110,6 +110,13 @@ config RENESAS_IRQC
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bool
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select IRQ_DOMAIN
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config ST_IRQCHIP
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bool
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select REGMAP
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select MFD_SYSCON
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help
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Enables SysCfg Controlled IRQs on STi based platforms.
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config TB10X_IRQC
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bool
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select IRQ_DOMAIN
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@ -33,6 +33,7 @@ obj-$(CONFIG_RENESAS_IRQC) += irq-renesas-irqc.o
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obj-$(CONFIG_VERSATILE_FPGA_IRQ) += irq-versatile-fpga.o
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obj-$(CONFIG_ARCH_NSPIRE) += irq-zevio.o
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obj-$(CONFIG_ARCH_VT8500) += irq-vt8500.o
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obj-$(CONFIG_ST_IRQCHIP) += irq-st.o
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obj-$(CONFIG_TB10X_IRQC) += irq-tb10x.o
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obj-$(CONFIG_XTENSA) += irq-xtensa-pic.o
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obj-$(CONFIG_XTENSA_MX) += irq-xtensa-mx.o
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@ -94,7 +94,7 @@ static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
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struct irqc_priv *p = irq_data_get_irq_chip_data(d);
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int hw_irq = irqd_to_hwirq(d);
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unsigned char value = irqc_sense[type & IRQ_TYPE_SENSE_MASK];
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unsigned long tmp;
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u32 tmp;
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irqc_dbg(&p->irq[hw_irq], "sense");
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@ -112,7 +112,7 @@ static irqreturn_t irqc_irq_handler(int irq, void *dev_id)
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{
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struct irqc_irq *i = dev_id;
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struct irqc_priv *p = i->p;
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unsigned long bit = BIT(i->hw_irq);
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u32 bit = BIT(i->hw_irq);
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irqc_dbg(i, "demux1");
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@ -0,0 +1,206 @@
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/*
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* Copyright (C) 2014 STMicroelectronics – All Rights Reserved
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*
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* Author: Lee Jones <lee.jones@linaro.org>
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*
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* This is a re-write of Christophe Kerello's PMU driver.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <dt-bindings/interrupt-controller/irq-st.h>
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#include <linux/err.h>
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#include <linux/mfd/syscon.h>
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#include <linux/of_device.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#define STIH415_SYSCFG_642 0x0a8
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#define STIH416_SYSCFG_7543 0x87c
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#define STIH407_SYSCFG_5102 0x198
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#define STID127_SYSCFG_734 0x088
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#define ST_A9_IRQ_MASK 0x001FFFFF
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#define ST_A9_IRQ_MAX_CHANS 2
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#define ST_A9_IRQ_EN_CTI_0 BIT(0)
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#define ST_A9_IRQ_EN_CTI_1 BIT(1)
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#define ST_A9_IRQ_EN_PMU_0 BIT(2)
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#define ST_A9_IRQ_EN_PMU_1 BIT(3)
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#define ST_A9_IRQ_EN_PL310_L2 BIT(4)
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#define ST_A9_IRQ_EN_EXT_0 BIT(5)
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#define ST_A9_IRQ_EN_EXT_1 BIT(6)
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#define ST_A9_IRQ_EN_EXT_2 BIT(7)
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#define ST_A9_FIQ_N_SEL(dev, chan) (dev << (8 + (chan * 3)))
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#define ST_A9_IRQ_N_SEL(dev, chan) (dev << (14 + (chan * 3)))
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#define ST_A9_EXTIRQ_INV_SEL(dev) (dev << 20)
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struct st_irq_syscfg {
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struct regmap *regmap;
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unsigned int syscfg;
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unsigned int config;
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bool ext_inverted;
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};
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static const struct of_device_id st_irq_syscfg_match[] = {
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{
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.compatible = "st,stih415-irq-syscfg",
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.data = (void *)STIH415_SYSCFG_642,
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},
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{
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.compatible = "st,stih416-irq-syscfg",
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.data = (void *)STIH416_SYSCFG_7543,
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},
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{
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.compatible = "st,stih407-irq-syscfg",
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.data = (void *)STIH407_SYSCFG_5102,
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},
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{
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.compatible = "st,stid127-irq-syscfg",
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.data = (void *)STID127_SYSCFG_734,
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},
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{}
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};
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static int st_irq_xlate(struct platform_device *pdev,
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int device, int channel, bool irq)
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{
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struct st_irq_syscfg *ddata = dev_get_drvdata(&pdev->dev);
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/* Set the device enable bit. */
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switch (device) {
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case ST_IRQ_SYSCFG_EXT_0:
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ddata->config |= ST_A9_IRQ_EN_EXT_0;
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break;
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case ST_IRQ_SYSCFG_EXT_1:
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ddata->config |= ST_A9_IRQ_EN_EXT_1;
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break;
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case ST_IRQ_SYSCFG_EXT_2:
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ddata->config |= ST_A9_IRQ_EN_EXT_2;
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break;
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case ST_IRQ_SYSCFG_CTI_0:
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ddata->config |= ST_A9_IRQ_EN_CTI_0;
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break;
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case ST_IRQ_SYSCFG_CTI_1:
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ddata->config |= ST_A9_IRQ_EN_CTI_1;
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break;
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case ST_IRQ_SYSCFG_PMU_0:
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ddata->config |= ST_A9_IRQ_EN_PMU_0;
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break;
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case ST_IRQ_SYSCFG_PMU_1:
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ddata->config |= ST_A9_IRQ_EN_PMU_1;
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break;
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case ST_IRQ_SYSCFG_pl310_L2:
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ddata->config |= ST_A9_IRQ_EN_PL310_L2;
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break;
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case ST_IRQ_SYSCFG_DISABLED:
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return 0;
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default:
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dev_err(&pdev->dev, "Unrecognised device %d\n", device);
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return -EINVAL;
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}
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/* Select IRQ/FIQ channel for device. */
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ddata->config |= irq ?
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ST_A9_IRQ_N_SEL(device, channel) :
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ST_A9_FIQ_N_SEL(device, channel);
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return 0;
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}
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static int st_irq_syscfg_enable(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct st_irq_syscfg *ddata = dev_get_drvdata(&pdev->dev);
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int channels, ret, i;
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u32 device, invert;
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channels = of_property_count_u32_elems(np, "st,irq-device");
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if (channels != ST_A9_IRQ_MAX_CHANS) {
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dev_err(&pdev->dev, "st,enable-irq-device must have 2 elems\n");
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return -EINVAL;
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}
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channels = of_property_count_u32_elems(np, "st,fiq-device");
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if (channels != ST_A9_IRQ_MAX_CHANS) {
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dev_err(&pdev->dev, "st,enable-fiq-device must have 2 elems\n");
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return -EINVAL;
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}
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for (i = 0; i < ST_A9_IRQ_MAX_CHANS; i++) {
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of_property_read_u32_index(np, "st,irq-device", i, &device);
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ret = st_irq_xlate(pdev, device, i, true);
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if (ret)
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return ret;
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of_property_read_u32_index(np, "st,fiq-device", i, &device);
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ret = st_irq_xlate(pdev, device, i, false);
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if (ret)
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return ret;
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}
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/* External IRQs may be inverted. */
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of_property_read_u32(np, "st,invert-ext", &invert);
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ddata->config |= ST_A9_EXTIRQ_INV_SEL(invert);
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return regmap_update_bits(ddata->regmap, ddata->syscfg,
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ST_A9_IRQ_MASK, ddata->config);
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}
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static int st_irq_syscfg_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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const struct of_device_id *match;
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struct st_irq_syscfg *ddata;
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ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
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if (!ddata)
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return -ENOMEM;
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match = of_match_device(st_irq_syscfg_match, &pdev->dev);
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if (!match)
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return -ENODEV;
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ddata->syscfg = (unsigned int)match->data;
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ddata->regmap = syscon_regmap_lookup_by_phandle(np, "st,syscfg");
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if (IS_ERR(ddata->regmap)) {
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dev_err(&pdev->dev, "syscfg phandle missing\n");
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return PTR_ERR(ddata->regmap);
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}
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dev_set_drvdata(&pdev->dev, ddata);
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return st_irq_syscfg_enable(pdev);
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}
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static int st_irq_syscfg_resume(struct device *dev)
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{
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struct st_irq_syscfg *ddata = dev_get_drvdata(dev);
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return regmap_update_bits(ddata->regmap, ddata->syscfg,
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ST_A9_IRQ_MASK, ddata->config);
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}
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static SIMPLE_DEV_PM_OPS(st_irq_syscfg_pm_ops, NULL, st_irq_syscfg_resume);
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static struct platform_driver st_irq_syscfg_driver = {
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.driver = {
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.name = "st_irq_syscfg",
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.pm = &st_irq_syscfg_pm_ops,
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.of_match_table = st_irq_syscfg_match,
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},
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.probe = st_irq_syscfg_probe,
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};
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static int __init st_irq_syscfg_init(void)
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{
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return platform_driver_register(&st_irq_syscfg_driver);
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}
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core_initcall(st_irq_syscfg_init);
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@ -0,0 +1,30 @@
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/*
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* include/linux/irqchip/irq-st.h
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*
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* Copyright (C) 2014 STMicroelectronics – All Rights Reserved
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*
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* Author: Lee Jones <lee.jones@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
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#define _DT_BINDINGS_INTERRUPT_CONTROLLER_ST_H
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#define ST_IRQ_SYSCFG_EXT_0 0
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#define ST_IRQ_SYSCFG_EXT_1 1
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#define ST_IRQ_SYSCFG_EXT_2 2
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#define ST_IRQ_SYSCFG_CTI_0 3
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#define ST_IRQ_SYSCFG_CTI_1 4
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#define ST_IRQ_SYSCFG_PMU_0 5
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#define ST_IRQ_SYSCFG_PMU_1 6
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#define ST_IRQ_SYSCFG_pl310_L2 7
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#define ST_IRQ_SYSCFG_DISABLED 0xFFFFFFFF
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#define ST_IRQ_SYSCFG_EXT_1_INV 0x1
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#define ST_IRQ_SYSCFG_EXT_2_INV 0x2
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#define ST_IRQ_SYSCFG_EXT_3_INV 0x4
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#endif
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