ARM: S3C64XX: PM: Synchronise wakeup mask on suspend
Use the new wakeup mask synchronisation code to set the relevant wakeup mask bits. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
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@ -7,6 +7,7 @@
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config PLAT_S3C64XX
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config PLAT_S3C64XX
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bool
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bool
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depends on ARCH_S3C64XX
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depends on ARCH_S3C64XX
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select SAMSUNG_WAKEMASK
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default y
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default y
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help
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help
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Base platform code for any Samsung S3C64XX device
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Base platform code for any Samsung S3C64XX device
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@ -18,8 +18,11 @@
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#include <linux/io.h>
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#include <linux/io.h>
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#include <mach/map.h>
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#include <mach/map.h>
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#include <mach/irqs.h>
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#include <plat/pm.h>
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#include <plat/pm.h>
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#include <plat/wakeup-mask.h>
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#include <mach/regs-sys.h>
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#include <mach/regs-sys.h>
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#include <mach/regs-gpio.h>
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#include <mach/regs-gpio.h>
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#include <mach/regs-clock.h>
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#include <mach/regs-clock.h>
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@ -153,8 +156,25 @@ static void s3c64xx_cpu_suspend(void)
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panic("sleep resumed to originator?");
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panic("sleep resumed to originator?");
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}
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}
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/* mapping of interrupts to parts of the wakeup mask */
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static struct samsung_wakeup_mask wake_irqs[] = {
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{ .irq = IRQ_RTC_ALARM, .bit = S3C64XX_PWRCFG_RTC_ALARM_DISABLE, },
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{ .irq = IRQ_RTC_TIC, .bit = S3C64XX_PWRCFG_RTC_TICK_DISABLE, },
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{ .irq = IRQ_PENDN, .bit = S3C64XX_PWRCFG_TS_DISABLE, },
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{ .irq = IRQ_HSMMC0, .bit = S3C64XX_PWRCFG_MMC0_DISABLE, },
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{ .irq = IRQ_HSMMC1, .bit = S3C64XX_PWRCFG_MMC1_DISABLE, },
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{ .irq = IRQ_HSMMC2, .bit = S3C64XX_PWRCFG_MMC2_DISABLE, },
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_BATF_DISABLE},
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_HSI_DISABLE },
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{ .irq = NO_WAKEUP_IRQ, .bit = S3C64XX_PWRCFG_MSM_DISABLE },
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};
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static void s3c64xx_pm_prepare(void)
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static void s3c64xx_pm_prepare(void)
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{
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{
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samsung_sync_wakemask(S3C64XX_PWR_CFG,
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wake_irqs, ARRAY_SIZE(wake_irqs));
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/* store address of resume. */
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/* store address of resume. */
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__raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
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__raw_writel(virt_to_phys(s3c_cpu_resume), S3C64XX_INFORM0);
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