nouveau and i915 regression fixes
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fd84b751dd
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@ -266,6 +266,8 @@ static void emulate_monitor_status_change(struct intel_vgpu *vgpu)
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/* Clear host CRT status, so guest couldn't detect this host CRT. */
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if (IS_BROADWELL(dev_priv))
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vgpu_vreg(vgpu, PCH_ADPA) &= ~ADPA_CRT_HOTPLUG_MONITOR_MASK;
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vgpu_vreg(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;
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}
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static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num)
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@ -282,7 +284,6 @@ static void clean_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num)
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static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num,
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int type, unsigned int resolution)
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{
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struct drm_i915_private *dev_priv = vgpu->gvt->dev_priv;
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struct intel_vgpu_port *port = intel_vgpu_port(vgpu, port_num);
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if (WARN_ON(resolution >= GVT_EDID_NUM))
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@ -308,7 +309,7 @@ static int setup_virtual_dp_monitor(struct intel_vgpu *vgpu, int port_num,
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port->type = type;
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emulate_monitor_status_change(vgpu);
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vgpu_vreg(vgpu, PIPECONF(PIPE_A)) |= PIPECONF_ENABLE;
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return 0;
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}
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@ -13194,7 +13194,7 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
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primary->frontbuffer_bit = INTEL_FRONTBUFFER_PRIMARY(pipe);
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primary->check_plane = intel_check_primary_plane;
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if (INTEL_GEN(dev_priv) >= 10 || IS_GEMINILAKE(dev_priv)) {
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if (INTEL_GEN(dev_priv) >= 10) {
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intel_primary_formats = skl_primary_formats;
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num_formats = ARRAY_SIZE(skl_primary_formats);
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modifiers = skl_format_modifiers_ccs;
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@ -152,9 +152,9 @@ nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
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work->cli = cli;
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mutex_lock(&cli->lock);
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list_add_tail(&work->head, &cli->worker);
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mutex_unlock(&cli->lock);
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if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
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nouveau_cli_work_fence(fence, &work->cb);
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mutex_unlock(&cli->lock);
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}
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static void
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