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drm/nv04-nv40: Fix up PCI(E) GART DMA object bus address calculation. 

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Francisco Jerez 2010-12-08 02:37:12 +01:00 committed by Ben Skeggs
parent 60d2a88ae8
commit fd70b6cd78
3 changed files with 10 additions and 18 deletions
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4
drivers/gpu/drm/nouveau/nouveau_drv.h
View File

@ -934,8 +934,8 @@ extern void nouveau_irq_uninstall(struct drm_device *);
/* nouveau_sgdma.c */ /* nouveau_sgdma.c */
extern int nouveau_sgdma_init(struct drm_device *); extern int nouveau_sgdma_init(struct drm_device *);
extern void nouveau_sgdma_takedown(struct drm_device *); extern void nouveau_sgdma_takedown(struct drm_device *);
extern int nouveau_sgdma_get_page(struct drm_device *, uint32_t offset, extern uint32_t nouveau_sgdma_get_physical(struct drm_device *,
uint32_t *page); uint32_t offset);
extern struct ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *); extern struct ttm_backend *nouveau_sgdma_init_ttm(struct drm_device *);
/* nouveau_debugfs.c */ /* nouveau_debugfs.c */

8
drivers/gpu/drm/nouveau/nouveau_object.c
View File

@ -478,7 +478,7 @@ nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class, u64 base,
struct drm_nouveau_private *dev_priv = chan->dev->dev_private; struct drm_nouveau_private *dev_priv = chan->dev->dev_private;
struct drm_device *dev = chan->dev; struct drm_device *dev = chan->dev;
struct nouveau_gpuobj *obj; struct nouveau_gpuobj *obj;
u32 page_addr, flags0, flags2; u32 flags0, flags2;
int ret; int ret;
if (dev_priv->card_type >= NV_50) { if (dev_priv->card_type >= NV_50) {
@ -495,12 +495,8 @@ nouveau_gpuobj_dma_new(struct nouveau_channel *chan, int class, u64 base,
base += dev_priv->gart_info.aper_base; base += dev_priv->gart_info.aper_base;
} else } else
if (base != 0) { if (base != 0) {
ret = nouveau_sgdma_get_page(dev, base, &page_addr); base = nouveau_sgdma_get_physical(dev, base);
if (ret)
return ret;
target = NV_MEM_TARGET_PCI; target = NV_MEM_TARGET_PCI;
base = page_addr;
} else { } else {
nouveau_gpuobj_ref(dev_priv->gart_info.sg_ctxdma, pobj); nouveau_gpuobj_ref(dev_priv->gart_info.sg_ctxdma, pobj);
return 0; return 0;

16
drivers/gpu/drm/nouveau/nouveau_sgdma.c
View File

@ -267,19 +267,15 @@ nouveau_sgdma_takedown(struct drm_device *dev)
nouveau_vm_put(&dev_priv->gart_info.vma); nouveau_vm_put(&dev_priv->gart_info.vma);
} }
int uint32_t
nouveau_sgdma_get_page(struct drm_device *dev, uint32_t offset, uint32_t *page) nouveau_sgdma_get_physical(struct drm_device *dev, uint32_t offset)
{ {
struct drm_nouveau_private *dev_priv = dev->dev_private; struct drm_nouveau_private *dev_priv = dev->dev_private;
struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma; struct nouveau_gpuobj *gpuobj = dev_priv->gart_info.sg_ctxdma;
int pte; int pte = (offset >> NV_CTXDMA_PAGE_SHIFT) + 2;
pte = (offset >> NV_CTXDMA_PAGE_SHIFT) << 2; BUG_ON(dev_priv->card_type >= NV_50);
if (dev_priv->card_type < NV_50) {
*page = nv_ro32(gpuobj, (pte + 8)) & ~NV_CTXDMA_PAGE_MASK;
return 0;
}
NV_ERROR(dev, "Unimplemented on NV50\n"); return (nv_ro32(gpuobj, 4 * pte) & ~NV_CTXDMA_PAGE_MASK) |
return -EINVAL; (offset & NV_CTXDMA_PAGE_MASK);
} }