dt-bindings: display: rcar-du: Add a VSP channel index to the vsps DT property
On some R-Car SoCs a single VSP can serve multiple DU channels through multiple LIF instances in the VSP. The current DT bindings don't support specifying that kind of SoC integration scheme. Extend them with a VSP channel index. Backward compatibility can be ensured in drivers by checking the length of the vsps property and setting the channel to 0 when the property doesn't contain channel indices. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -36,8 +36,10 @@ Required Properties:
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When supplied they must be named "dclkin.x" with "x" being the input
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When supplied they must be named "dclkin.x" with "x" being the input
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clock numerical index.
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clock numerical index.
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- vsps: A list of phandles to the VSP nodes that handle the memory
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- vsps: A list of phandle and channel index tuples to the VSPs that handle
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interfaces for the DU channels.
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the memory interfaces for the DU channels. The phandle identifies the VSP
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instance that serves the DU channel, and the channel index identifies the
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LIF instance in that VSP.
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Required nodes:
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Required nodes:
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@ -59,24 +61,24 @@ corresponding to each DU output.
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R8A7796 (M3-W) DPAD HDMI LVDS -
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R8A7796 (M3-W) DPAD HDMI LVDS -
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Example: R8A7790 (R-Car H2) DU
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Example: R8A7795 (R-Car H3) ES2.0 DU
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du: du@feb00000 {
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du: display@feb00000 {
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compatible = "renesas,du-r8a7790";
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compatible = "renesas,du-r8a7795";
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reg = <0 0xfeb00000 0 0x70000>,
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reg = <0 0xfeb00000 0 0x80000>,
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<0 0xfeb90000 0 0x1c>,
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<0 0xfeb90000 0 0x14>;
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<0 0xfeb94000 0 0x1c>;
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reg-names = "du", "lvds.0";
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reg-names = "du", "lvds.0", "lvds.1";
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interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,
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interrupt-parent = <&gic>;
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<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <0 256 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>,
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<0 268 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 270 IRQ_TYPE_LEVEL_HIGH>;
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<0 269 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 724>,
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clocks = <&mstp7_clks R8A7790_CLK_DU0>,
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<&cpg CPG_MOD 723>,
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<&mstp7_clks R8A7790_CLK_DU1>,
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<&cpg CPG_MOD 722>,
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<&mstp7_clks R8A7790_CLK_DU2>,
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<&cpg CPG_MOD 721>,
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<&mstp7_clks R8A7790_CLK_LVDS0>,
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<&cpg CPG_MOD 727>;
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<&mstp7_clks R8A7790_CLK_LVDS1>;
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clock-names = "du.0", "du.1", "du.2", "du.3", "lvds.0";
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clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
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vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>, <&vspd0 1>;
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ports {
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ports {
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#address-cells = <1>;
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#address-cells = <1>;
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@ -89,12 +91,19 @@ Example: R8A7790 (R-Car H2) DU
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};
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};
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port@1 {
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port@1 {
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reg = <1>;
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reg = <1>;
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du_out_lvds0: endpoint {
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du_out_hdmi0: endpoint {
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remote-endpoint = <&dw_hdmi0_in>;
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};
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};
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};
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};
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port@2 {
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port@2 {
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reg = <2>;
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reg = <2>;
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du_out_lvds1: endpoint {
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du_out_hdmi1: endpoint {
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remote-endpoint = <&dw_hdmi1_in>;
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};
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};
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port@3 {
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reg = <3>;
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du_out_lvds0: endpoint {
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};
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};
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};
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};
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};
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};
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