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The rk3399 gained support its Cadence displayport controller and some 

minor additions like pins for 2ch i2s0 and the cif test clocks as well
 as a default rate for ACLK_VIO that should be 400MHz according to the TRM.
 
 The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using
 that so far.
 
 New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM
 + baseborad from Theobroma Systems and a standalone variant of the Sapphire
 board, as a lot of people where using that without the Exkavator baseboard.
 
 Sapphire also saw a lot of small cleanups of things that are not part
 of the actual Sapphire board, but the baseboard instead. The rk3399-puma
 board got i2s and tsadc support and Gru got its DP node enabled.
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Merge tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Pull "Rockchip dts64 changes for 4.17" from Heiko Stübner:

The rk3399 gained support its Cadence displayport controller and some
minor additions like pins for 2ch i2s0 and the cif test clocks as well
as a default rate for ACLK_VIO that should be 400MHz according to the TRM.

The rk3328 got uart dmas fixed - a non-critical fix, as nobody was using
that so far.

New boards are the rk3328-based roc-rk3328-cc, the rk3368-based Lion-SOM
+ baseborad from Theobroma Systems and a standalone variant of the Sapphire
board, as a lot of people where using that without the Exkavator baseboard.

Sapphire also saw a lot of small cleanups of things that are not part
of the actual Sapphire board, but the baseboard instead. The rk3399-puma
board got i2s and tsadc support and Gru got its DP node enabled.

* tag 'v4.17-rockchip-dts64-1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: remove keep-power-in-suspend from sdhci of rk3399-sapphire
  arm64: dts: rockchip: assign clock rate for ACLK_VIO on rk3399
  arm64: dts: rockchip: add a standalone version of the rk3399 sapphire
  arm64: dts: rockchip: move rk3399-sapphire pwr_btn to daughterboard
  arm64: dts: rockchip: move rk3399-sapphire i2s2 to daughterboard
  arm64: dts: rockchip: move rk3399-sapphire sdio to excavator baseboard
  arm64: dts: rockchip: enable I2S codec on rk3399-puma-haikou
  arm64: dts: rockchip: move i2s0 node from baseboard to SoM on rk3399-puma
  arm64: dts: rockchip: vdd_log on rk3399-sapphire is not an i2c slave
  arm64: dts: rockchip: add Haikou baseboard with RK3368-uQ7 SoM
  arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM
  dt-bindings: add RK3368-uQ7 SoM and EVK base board
  arm64: dts: rockchip: Fix RK3328 UART DMAs
  arm64: dts: rockchip: enable DP for rk3399-gru
  arm64: dts: rockchip: add cdn-dp node for rk3399.
  arm64: dts: rockchip: add i2s0-2ch-bus pins on rk3399
  arm64: dts: rockchip: enable tsadc on rk3399-puma
  arm64: dts: rockchip: add roc-rk3328-cc board
  arm64: dts: rockchip: Add cif test clocks for rk3399
This commit is contained in:
Arnd Bergmann 2018-03-28 17:17:00 +02:00
parent 3eb8d21ac6 3783f1eb8a
commit fd553821a9
13 changed files with 993 additions and 72 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
Documentation/devicetree/bindings/arm/rockchip.txt
View File

@ -50,6 +50,10 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
- Firefly roc-rk3328-cc board:
Required root node properties:
- compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
- ChipSPARK PopMetal-RK3288 board:
Required root node properties:
- compatible = "chipspark,popmetal-rk3288", "rockchip,rk3288";
@ -181,10 +185,18 @@ Rockchip platforms device tree bindings
Required root node properties:
- compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
- Rockchip RK3399 Sapphire board standalone:
Required root node properties:
- compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
- Rockchip RK3399 Sapphire Excavator board:
Required root node properties:
- compatible = "rockchip,rk3399-sapphire-excavator", "rockchip,rk3399";
- Theobroma Systems RK3368-uQ7 Haikou Baseboard:
Required root node properties:
- compatible = "tsd,rk3368-uq7-haikou", "rockchip,rk3368";
- Theobroma Systems RK3399-Q7 Haikou Baseboard:
Required root node properties:
- compatible = "tsd,rk3399-q7-haikou", "rockchip,rk3399";

3
arch/arm64/boot/dts/rockchip/Makefile
View File

@ -1,8 +1,10 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-geekbox.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-lion-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-orion-r68-meta.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-px5-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-r88.dtb
@ -10,4 +12,5 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-firefly.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb

267
arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts Normal file
View File

@ -0,0 +1,267 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
*/
/dts-v1/;
#include "rk3328.dtsi"
/ {
model = "Firefly roc-rk3328-cc";
compatible = "firefly,roc-rk3328-cc", "rockchip,rk3328";
chosen {
stdout-path = "serial2:1500000n8";
};
gmac_clkin: external-gmac-clock {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "gmac_clkin";
#clock-cells = <0>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc_sd: sdmmc-regulator {
compatible = "regulator-fixed";
gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0m1_gpio>;
regulator-name = "vcc_sd";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc_io>;
};
vcc_host1_5v: vcc_otg_5v: vcc-host1-5v-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&usb20_host_drv>;
regulator-name = "vcc_host1_5v";
regulator-always-on;
vin-supply = <&vcc_sys>;
};
vcc_sys: vcc-sys {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc_phy: vcc-phy-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_phy";
regulator-always-on;
regulator-boot-on;
};
};
&cpu0 {
cpu-supply = <&vdd_arm>;
};
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>;
status = "okay";
};
&gmac2io {
assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>;
clock_in_out = "input";
phy-supply = <&vcc_phy>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmiim1_pins>;
snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
tx_delay = <0x25>;
rx_delay = <0x11>;
status = "okay";
};
&i2c1 {
status = "okay";
rk805: pmic@18 {
compatible = "rockchip,rk805";
reg = <0x18>;
interrupt-parent = <&gpio1>;
interrupts = <24 IRQ_TYPE_LEVEL_LOW>;
#clock-cells = <1>;
clock-output-names = "xin32k", "rk805-clkout2";
gpio-controller;
#gpio-cells = <2>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>;
rockchip,system-power-controller;
wakeup-source;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
vcc3-supply = <&vcc_sys>;
vcc4-supply = <&vcc_sys>;
vcc5-supply = <&vcc_io>;
vcc6-supply = <&vcc_io>;
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
vdd_arm: DCDC_REG2 {
regulator-name = "vdd_arm";
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <950000>;
};
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
};
};
vcc_io: DCDC_REG4 {
regulator-name = "vcc_io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <3300000>;
};
};
vcc_18: LDO_REG1 {
regulator-name = "vcc_18";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vcc18_emmc: LDO_REG2 {
regulator-name = "vcc18_emmc";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1800000>;
};
};
vdd_10: LDO_REG3 {
regulator-name = "vdd_10";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
regulator-state-mem {
regulator-on-in-suspend;
regulator-suspend-microvolt = <1000000>;
};
};
};
};
};
&pinctrl {
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
usb2 {
usb20_host_drv: usb20-host-drv {
rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
disable-wp;
max-frequency = <150000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>;
vmmc-supply = <&vcc_sd>;
status = "okay";
};
&tsadc {
status = "okay";
};
&u2phy {
status = "okay";
};
&u2phy_host {
status = "okay";
};
&u2phy_otg {
status = "okay";
};
&uart2 {
status = "okay";
};
&usb20_otg {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&usb_host0_ohci {
status = "okay";
};

6
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View File

@ -318,7 +318,7 @@
clocks = <&cru SCLK_UART0>, <&cru PCLK_UART0>;
clock-names = "baudclk", "apb_pclk";
dmas = <&dmac 2>, <&dmac 3>;
#dma-cells = <2>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
reg-io-width = <4>;
@ -333,7 +333,7 @@
clocks = <&cru SCLK_UART1>, <&cru PCLK_UART1>;
clock-names = "sclk_uart", "pclk_uart";
dmas = <&dmac 4>, <&dmac 5>;
#dma-cells = <2>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart1_xfer &uart1_cts &uart1_rts>;
reg-io-width = <4>;
@ -348,7 +348,7 @@
clocks = <&cru SCLK_UART2>, <&cru PCLK_UART2>;
clock-names = "baudclk", "apb_pclk";
dmas = <&dmac 6>, <&dmac 7>;
#dma-cells = <2>;
dma-names = "tx", "rx";
pinctrl-names = "default";
pinctrl-0 = <&uart2m1_xfer>;
reg-io-width = <4>;

146
arch/arm64/boot/dts/rockchip/rk3368-lion-haikou.dts Normal file
View File

@ -0,0 +1,146 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH
*/
/dts-v1/;
#include "rk3368-lion.dtsi"
/ {
model = "Theobroma Systems RK3368-uQ7 Baseboard";
compatible = "tsd,rk3368-lion-haikou", "rockchip,rk3368";
chosen {
stdout-path = "serial0:115200n8";
};
i2cmux2 {
i2c@0 {
eeprom: eeprom@50 {
compatible = "atmel,24c01";
pagesize = <8>;
reg = <0x50>;
};
};
};
leds {
pinctrl-0 = <&led_pins_module>, <&led_sd_haikou>;
sd-card-led {
label = "sd_card_led";
gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
};
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <12000000>;
regulator-max-microvolt = <12000000>;
};
vcc3v3_baseboard: vcc3v3-baseboard {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_baseboard";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&dc_12v>;
};
vcc5v0_otg: vcc5v0-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&otg_vbus_drv>;
regulator-name = "vcc5v0_otg";
regulator-always-on;
};
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
cd-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
disable-wp;
max-frequency = <25000000>;
pinctrl-names = "default";
pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
rockchip,default-sample-phase = <90>;
vmmc-supply = <&vcc3v3_baseboard>;
status = "okay";
};
&spi2 {
cs-gpios = <0>, <&gpio2 RK_PC3 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
};
&usb_otg {
dr_mode = "otg";
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>;
status = "okay";
};
&uart1 {
/* alternate function of GPIO5/6 */
status = "disabled";
};
&pinctrl {
pinctrl-names = "default";
pinctrl-0 = <&haikou_pin_hog>;
hog {
haikou_pin_hog: haikou-pin-hog {
rockchip,pins =
/* LID_BTN */
<RK_GPIO3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>,
/* BATLOW# */
<RK_GPIO0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_up>,
/* SLP_BTN# */
<RK_GPIO3 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>,
/* BIOS_DISABLE# */
<RK_GPIO3 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
leds {
led_sd_haikou: led-sd-gpio {
rockchip,pins =
<RK_GPIO0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
sdmmc {
sdmmc_cd_gpio: sdmmc-cd-gpio {
rockchip,pins =
<RK_GPIO2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
usb_otg {
otg_vbus_drv: otg-vbus-drv {
rockchip,pins =
<RK_GPIO0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};

317
arch/arm64/boot/dts/rockchip/rk3368-lion.dtsi Normal file
View File

@ -0,0 +1,317 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 Theobroma Systems Design und Consulting GmbH
*/
/dts-v1/;
#include "rk3368.dtsi"
/ {
chosen {
stdout-path = "serial0:115200n8";
};
ext_gmac: gmac-clk {
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "ext_gmac";
#clock-cells = <0>;
};
i2cmux1 {
compatible = "i2c-mux-gpio";
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&i2c1>;
mux-gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
/* Q7_GPO_I2C */
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
};
/* Q7_SMB */
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
i2cmux2 {
compatible = "i2c-mux-gpio";
#address-cells = <1>;
#size-cells = <0>;
i2c-parent = <&i2c2>;
mux-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>;
/* Q7_LVDS_BLC_I2C */
i2c@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;
fan: fan@18 {
compatible = "ti,amc6821";
reg = <0x18>;
cooling-min-state = <0>;
cooling-max-state = <9>;
#cooling-cells = <2>;
};
rtc_twi: rtc@6f {
compatible = "isil,isl1208";
reg = <0x6f>;
};
};
/* Q7_GP2_I2C */
i2c@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_pins_module>;
module_led1 {
label = "module_led1";
gpios = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
panic-indicator;
};
module_led2 {
label = "module_led2";
gpios = <&gpio3 RK_PA3 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
vcc_sys: vcc-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_sys";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-always-on;
regulator-boot-on;
};
};
&cpu_l0 {
cpu-supply = <&vdd_cpu>;
};
&cpu_l1 {
cpu-supply = <&vdd_cpu>;
};
&cpu_l2 {
cpu-supply = <&vdd_cpu>;
};
&cpu_l3 {
cpu-supply = <&vdd_cpu>;
};
&cpu_b0 {
cpu-supply = <&vdd_cpu>;
};
&cpu_b1 {
cpu-supply = <&vdd_cpu>;
};
&cpu_b2 {
cpu-supply = <&vdd_cpu>;
};
&cpu_b3 {
cpu-supply = <&vdd_cpu>;
};
&emmc {
bus-width = <8>;
clock-frequency = <150000000>;
disable-wp;
mmc-hs200-1_8v;
non-removable;
vmmc-supply = <&vcc33_io>;
vqmmc-supply = <&vcc18_io>;
pinctrl-names = "default";
pinctrl-0 = <&emmc_clk>, <&emmc_cmd>, <&emmc_bus8>;
status = "okay";
};
&gmac {
assigned-clocks = <&cru SCLK_MAC>;
assigned-clock-parents = <&ext_gmac>;
clock_in_out = "input";
phy-supply = <&vcc33_io>;
phy-mode = "rgmii";
pinctrl-names = "default";
pinctrl-0 = <&rgmii_pins>;
snps,reset-active-low;
snps,reset-delays-us = <0 10000 50000>;
snps,reset-gpio = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>;
tx_delay = <0x10>;
rx_delay = <0x10>;
status = "okay";
};
&i2c0 {
status = "okay";
rk808: pmic@1b {
compatible = "rockchip,rk808";
reg = <0x1b>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA5 IRQ_TYPE_LEVEL_LOW>;
clock-output-names = "xin32k", "rk808-clkout2";
#clock-cells = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pmic_int_l>, <&pmic_sleep>;
rockchip,system-power-controller;
vcc1-supply = <&vcc_sys>;
vcc2-supply = <&vcc_sys>;
vcc3-supply = <&vcc_sys>;
vcc4-supply = <&vcc_sys>;
vcc6-supply = <&vcc_sys>;
vcc7-supply = <&vcc_sys>;
vcc8-supply = <&vcc_sys>;
vcc9-supply = <&vcc_sys>;
vcc10-supply = <&vcc_sys>;
vcc11-supply = <&vcc_sys>;
vcc12-supply = <&vcc_sys>;
regulators {
vdd_cpu: DCDC_REG1 {
regulator-name = "vdd_cpu";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
vdd_log: DCDC_REG2 {
regulator-name = "vdd_log";
regulator-min-microvolt = <700000>;
regulator-max-microvolt = <1500000>;
regulator-always-on;
regulator-boot-on;
};
vcc_ddr: DCDC_REG3 {
regulator-name = "vcc_ddr";
regulator-always-on;
regulator-boot-on;
};
vcc33_io: DCDC_REG4 {
regulator-name = "vcc33_io";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vcc33_video: LDO_REG2 {
regulator-name = "vcc33_video";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
vdd10_pll: LDO_REG3 {
regulator-name = "vdd10_pll";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
};
vcc18_io: LDO_REG4 {
regulator-name = "vcc18_io";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
vdd10_video: LDO_REG6 {
regulator-name = "vdd10_video";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
regulator-boot-on;
};
vcc18_video: LDO_REG8 {
regulator-name = "vcc18_video";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
};
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
};
&pinctrl {
leds {
led_pins_module: led-module-gpio {
rockchip,pins =
<RK_GPIO2 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>,
<RK_GPIO3 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins = <RK_GPIO0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
pmic_sleep: pmic-sleep {
rockchip,pins = <RK_GPIO0 RK_PA0 RK_FUNC_2 &pcfg_pull_none>;
};
};
};
&spi1 {
status = "okay";
norflash: flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
};
};
&uart1 {
status = "okay";
};
&uart3 {
status = "okay";
};
&usb_host0_ehci {
status = "okay";
};
&wdt {
status = "okay";
};

13
arch/arm64/boot/dts/rockchip/rk3399-gru.dtsi
View File

@ -515,10 +515,15 @@
compatible = "rockchip,rk3399-gru-sound";
rockchip,cpu = <&i2s0 &i2s2>;
rockchip,codec = <&max98357a &headsetcodec
&codec &wacky_spi_audio>;
&codec &wacky_spi_audio &cdn_dp>;
};
};
&cdn_dp {
status = "okay";
extcon = <&usbc_extcon0>, <&usbc_extcon1>;
};
/*
* Set some suspend operating points to avoid OVP in suspend
*
@ -581,7 +586,8 @@
<&cru PCLK_PERIHP>,
<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
<&cru ACLK_VIO>;
assigned-clock-rates =
<600000000>, <800000000>,
<1000000000>,
@ -589,7 +595,8 @@
<37500000>,
<100000000>, <100000000>,
<50000000>, <800000000>,
<100000000>, <50000000>;
<100000000>, <50000000>,
<400000000>;
};
&emmc_phy {

71
arch/arm64/boot/dts/rockchip/rk3399-puma-haikou.dts
View File

@ -61,6 +61,30 @@
};
};
i2s0-sound {
compatible = "simple-audio-card";
simple-audio-card,format = "i2s";
simple-audio-card,name = "Haikou,I2S-codec";
simple-audio-card,mclk-fs = <512>;
simple-audio-card,codec {
clocks = <&sgtl5000_clk>;
sound-dai = <&sgtl5000>;
};
simple-audio-card,cpu {
bitclock-master;
frame-master;
sound-dai = <&i2s0>;
};
};
sgtl5000_clk: sgtl5000-oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
};
dc_12v: dc-12v {
compatible = "regulator-fixed";
regulator-name = "dc_12v";
@ -80,6 +104,16 @@
vin-supply = <&dc_12v>;
};
vcc5v0_baseboard: vcc5v0-baseboard {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_baseboard";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
vin-supply = <&dc_12v>;
};
vcc5v0_otg: vcc5v0-otg-regulator {
compatible = "regulator-fixed";
enable-active-high;
@ -89,6 +123,24 @@
regulator-name = "vcc5v0_otg";
regulator-always-on;
};
vdda_codec: vdda-codec {
compatible = "regulator-fixed";
regulator-name = "vdda_codec";
regulator-boot-on;
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
vin-supply = <&vcc5v0_baseboard>;
};
vddd_codec: vddd-codec {
compatible = "regulator-fixed";
regulator-name = "vddd_codec";
regulator-boot-on;
regulator-min-microvolt = <1600000>;
regulator-max-microvolt = <1600000>;
vin-supply = <&vcc5v0_baseboard>;
};
};
&i2c1 {
@ -110,6 +162,17 @@
&i2c4 {
status = "okay";
clock-frequency = <400000>;
sgtl5000: codec@0a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&sgtl5000_clk>;
#sound-dai-cells = <0>;
VDDA-supply = <&vdda_codec>;
VDDIO-supply = <&vdda_codec>;
VDDD-supply = <&vddd_codec>;
status = "okay";
};
};
&i2c6 {
@ -117,14 +180,6 @@
clock-frequency = <400000>;
};
&i2s0 {
status = "okay";
rockchip,playback-channels = <8>;
rockchip,capture-channels = <8>;
#sound-dai-cells = <0>;
status = "okay";
};
&pcie_phy {
status = "okay";
};

28
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
View File

@ -435,6 +435,28 @@
};
};
&i2s0 {
pinctrl-0 = <&i2s0_2ch_bus>;
rockchip,playback-channels = <2>;
rockchip,capture-channels = <2>;
#sound-dai-cells = <0>;
status = "okay";
};
/*
* As Q7 does not specify neither a global nor a RX clock for I2S these
* signals are not used. Furthermore I2S0_LRCK_RX is used as GPIO.
* Therefore we have to redefine the i2s0_2ch_bus definition to prevent
* conflicts.
*/
&i2s0_2ch_bus {
rockchip,pins =
<RK_GPIO3 RK_PD0 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 RK_PD2 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 RK_PD3 RK_FUNC_1 &pcfg_pull_none>,
<RK_GPIO3 RK_PD7 RK_FUNC_1 &pcfg_pull_none>;
};
&io_domains {
status = "okay";
bt656-supply = <&vcc_1v8>;
@ -505,6 +527,12 @@
};
};
&tsadc {
rockchip,hw-tshut-mode = <1>;
rockchip,hw-tshut-polarity = <1>;
status = "okay";
};
&u2phy1 {
status = "okay";

44
arch/arm64/boot/dts/rockchip/rk3399-sapphire-excavator.dts
View File

@ -41,7 +41,6 @@
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "rk3399-sapphire.dtsi"
/ {
@ -95,22 +94,6 @@
};
};
keys: gpio-keys {
compatible = "gpio-keys";
autorepeat;
power {
debounce-interval = <100>;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
linux,input-type = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pwr_btn>;
wakeup-source;
};
};
rt5651-sound {
compatible = "simple-audio-card";
simple-audio-card,name = "realtek,rt5651-codec";
@ -207,18 +190,7 @@
status = "okay";
};
&i2s2 {
#sound-dai-cells = <0>;
status = "okay";
};
&pinctrl {
buttons {
pwr_btn: pwr-btn {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
sdio-pwrseq {
wifi_enable_h: wifi-enable-h {
rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>;
@ -232,6 +204,22 @@
};
};
&sdio0 {
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
clock-frequency = <50000000>;
disable-wp;
keep-power-in-suspend;
max-frequency = <50000000>;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&spdif {
i2c-scl-rising-time-ns = <450>;
i2c-scl-falling-time-ns = <15>;

12
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dts Normal file
View File

@ -0,0 +1,12 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd.
*/
/dts-v1/;
#include "rk3399-sapphire.dtsi"
/ {
model = "Sapphire-RK3399 Board";
compatible = "rockchip,rk3399-sapphire", "rockchip,rk3399";
};

67
arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
View File

@ -41,6 +41,7 @@
*/
#include "dt-bindings/pwm/pwm.h"
#include "dt-bindings/input/input.h"
#include "rk3399.dtsi"
#include "rk3399-opp.dtsi"
@ -102,6 +103,22 @@
regulator-max-microvolt = <12000000>;
};
keys: gpio-keys {
compatible = "gpio-keys";
autorepeat;
power {
debounce-interval = <100>;
gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_LOW>;
label = "GPIO Power";
linux,code = <KEY_POWER>;
linux,input-type = <1>;
pinctrl-names = "default";
pinctrl-0 = <&pwr_btn>;
wakeup-source;
};
};
/* switched by pmic_sleep */
vcc1v8_s3: vcca1v8_s3: vcc1v8-s3 {
compatible = "regulator-fixed";
@ -143,6 +160,17 @@
regulator-always-on;
vin-supply = <&vcc_sys>;
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
vin-supply = <&vcc_sys>;
};
};
&cpu_l0 {
@ -421,17 +449,6 @@
regulator-off-in-suspend;
};
};
vdd_log: vdd-log {
compatible = "pwm-regulator";
pwms = <&pwm2 0 25000 1>;
regulator-name = "vdd_log";
regulator-always-on;
regulator-boot-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1400000>;
vin-supply = <&vcc_sys>;
};
};
&i2c3 {
@ -440,6 +457,11 @@
status = "okay";
};
&i2s2 {
#sound-dai-cells = <0>;
status = "okay";
};
&io_domains {
status = "okay";
@ -470,6 +492,12 @@
};
&pinctrl {
buttons {
pwr_btn: pwr-btn {
rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
pmic {
pmic_int_l: pmic-int-l {
rockchip,pins =
@ -513,29 +541,12 @@
&sdhci {
bus-width = <8>;
keep-power-in-suspend;
mmc-hs400-1_8v;
mmc-hs400-enhanced-strobe;
non-removable;
status = "okay";
};
&sdio0 {
bus-width = <4>;
cap-sd-highspeed;
cap-sdio-irq;
clock-frequency = <50000000>;
disable-wp;
keep-power-in-suspend;
max-frequency = <50000000>;
mmc-pwrseq = <&sdio_pwrseq>;
non-removable;
pinctrl-names = "default";
pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>;
sd-uhs-sdr104;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;

79
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View File

@ -457,6 +457,42 @@
};
};
cdn_dp: dp@fec00000 {
compatible = "rockchip,rk3399-cdn-dp";
reg = <0x0 0xfec00000 0x0 0x100000>;
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
assigned-clocks = <&cru SCLK_DP_CORE>;
assigned-clock-rates = <100000000>;
clocks = <&cru SCLK_DP_CORE>, <&cru PCLK_DP_CTRL>,
<&cru SCLK_SPDIF_REC_DPTX>, <&cru PCLK_VIO_GRF>;
clock-names = "core-clk", "pclk", "spdif", "grf";
phys = <&tcphy0_dp>, <&tcphy1_dp>;
power-domains = <&power RK3399_PD_HDCP>;
resets = <&cru SRST_DPTX_SPDIF_REC>, <&cru SRST_P_UPHY0_DPTX>,
<&cru SRST_P_UPHY0_APB>, <&cru SRST_DP_CORE>;
reset-names = "spdif", "dptx", "apb", "core";
rockchip,grf = <&grf>;
#sound-dai-cells = <1>;
status = "disabled";
ports {
dp_in: port {
#address-cells = <1>;
#size-cells = <0>;
dp_in_vopb: endpoint@0 {
reg = <0>;
remote-endpoint = <&vopb_out_dp>;
};
dp_in_vopl: endpoint@1 {
reg = <1>;
remote-endpoint = <&vopl_out_dp>;
};
};
};
};
gic: interrupt-controller@fee00000 {
compatible = "arm,gic-v3";
#interrupt-cells = <4>;
@ -1286,7 +1322,8 @@
<&cru PCLK_PERIHP>,
<&cru ACLK_PERILP0>, <&cru HCLK_PERILP0>,
<&cru PCLK_PERILP0>, <&cru ACLK_CCI>,
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
<&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>,
<&cru ACLK_VIO>;
assigned-clock-rates =
<594000000>, <800000000>,
<1000000000>,
@ -1294,7 +1331,8 @@
<37500000>,
<100000000>, <100000000>,
<50000000>, <600000000>,
<100000000>, <50000000>;
<100000000>, <50000000>,
<400000000>;
};
grf: syscon@ff770000 {
@ -1547,6 +1585,11 @@
reg = <3>;
remote-endpoint = <&mipi1_in_vopl>;
};
vopl_out_dp: endpoint@4 {
reg = <4>;
remote-endpoint = <&dp_in_vopl>;
};
};
};
@ -1599,6 +1642,11 @@
reg = <3>;
remote-endpoint = <&mipi1_in_vopb>;
};
vopb_out_dp: endpoint@4 {
reg = <4>;
remote-endpoint = <&dp_in_vopb>;
};
};
};
@ -2043,6 +2091,16 @@
};
i2s0 {
i2s0_2ch_bus: i2s0-2ch-bus {
rockchip,pins =
<3 24 RK_FUNC_1 &pcfg_pull_none>,
<3 25 RK_FUNC_1 &pcfg_pull_none>,
<3 26 RK_FUNC_1 &pcfg_pull_none>,
<3 27 RK_FUNC_1 &pcfg_pull_none>,
<3 31 RK_FUNC_1 &pcfg_pull_none>,
<4 0 RK_FUNC_1 &pcfg_pull_none>;
};
i2s0_8ch_bus: i2s0-8ch-bus {
rockchip,pins =
<3 24 RK_FUNC_1 &pcfg_pull_none>,
@ -2293,6 +2351,23 @@
};
};
testclk {
test_clkout0: test-clkout0 {
rockchip,pins =
<0 0 RK_FUNC_1 &pcfg_pull_none>;
};
test_clkout1: test-clkout1 {
rockchip,pins =
<2 25 RK_FUNC_2 &pcfg_pull_none>;
};
test_clkout2: test-clkout2 {
rockchip,pins =
<0 8 RK_FUNC_3 &pcfg_pull_none>;
};
};
tsadc {
otp_gpio: otp-gpio {
rockchip,pins = <1 6 RK_FUNC_GPIO &pcfg_pull_none>;