Second Round of Renesas ARM Based SoC Clock Updates for v3.16

r8a7791 (R-Car M2) SoC
 * Correct SYS-DMAC clock defines
 
 r8a7740 (R-Mobile A1) SoC
 * Correct name of DT Ethernet clock
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1.4.14 (GNU/Linux)
 
 iQIcBAABAgAGBQJTcc5oAAoJENfPZGlqN0++vKEP/3zy1DnzzaXb/xr65I6hSOvG
 AUjZah73KDcaBQ1pjXzOhhCXDbfX+ba17vJMBSOHuWghXTZser212XRgPGasMuxy
 XUZJvscCk67nvW2rY3u3KqHRmLsu5Bj8LJ+iENa0BNbLrvHmPMfwMrqjodZBLSLq
 KgPT7HkQRLxzo6vxLUw8Ipd1VEcQApQKlNqkpYz4HVUmzvHegErMFsfuO7aMnK69
 IZtD45cBZN7sSKi/Hl/qzRwCXESSWh3TMtB7hRToZKGb0e1m8wLfHKiGIS3FvkhH
 1cgO/KunDYYm2cdDKwbvyTCapv0olXK2tn63rzo/jEqSyfXHXgP/849oW2395qyV
 PMhudgOa8shsJWhjEb6yQReacUJVNUDMV/n3cblmd9WLfs5LtGP30SOxoc0aLTKG
 cOPhiqnjTxTaD+ITrFjSzNaJhMQN7ynoJF+lMsbkIt5gkMeEFRIpobrW0q5ZqwRw
 FBvCXCj0ffgxjuQ+9VmtCi80yu3esiV1aSK6FNqkI8T4fqa6oUltdY+yUoIkYYP8
 lz/XlpBVnvcJ0hq1zeDeyEEv3HsElFjEn79ZbNmrIMNn5psYJMDQYT27I/qr4093
 QL0unUxVo2GK1B6uM8Yz95whn3/HkUyaBNvfVTwrc9e0Z/uSJ1xZ/SOXOyLs/lKi
 vuTBJOyfBnpY2j2eP2EE
 =YJay
 -----END PGP SIGNATURE-----

Merge tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Merge "Second Round of Renesas ARM Based SoC Clock Updates for v3.16" from
Simon Horman:

r8a7791 (R-Car M2) SoC
* Correct SYS-DMAC clock defines

r8a7740 (R-Mobile A1) SoC
* Correct name of DT Ethernet clock

* tag 'renesas-clock2-for-v3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  ARM: shmobile: r8a7791: Correct SYS-DMAC clock defines
  ARM: shmobile: r8a7740: Correct name of DT Ethernet clock

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-05-19 23:29:24 -07:00
commit fd46edb9f6
2 changed files with 3 additions and 2 deletions

View File

@ -596,7 +596,7 @@ static struct clk_lookup lookups[] = {
CLKDEV_DEV_ID("sh_mmcif", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("e6bd0000.mmc", &mstp_clks[MSTP312]),
CLKDEV_DEV_ID("r8a7740-gether", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("e9a00000.sh-eth", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("e9a00000.ethernet", &mstp_clks[MSTP309]),
CLKDEV_DEV_ID("renesas-tpu-pwm", &mstp_clks[MSTP304]),
CLKDEV_DEV_ID("e6600000.pwm", &mstp_clks[MSTP304]),

View File

@ -43,7 +43,8 @@
#define R8A7791_CLK_SCIFB1 7
#define R8A7791_CLK_MSIOF1 8
#define R8A7791_CLK_SCIFB2 16
#define R8A7791_CLK_DMAC 18
#define R8A7791_CLK_SYS_DMAC1 18
#define R8A7791_CLK_SYS_DMAC0 19
/* MSTP3 */
#define R8A7791_CLK_TPU0 4