drm/amdgpu/sdma4: use num_instances for clock/powergating config
Rather then relying on the asic type for the second instance. Makes it more consistent with the rest of the code. Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
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@ -1399,7 +1399,7 @@ static void sdma_v4_0_update_medium_grain_clock_gating(
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if (def != data)
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WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL), data);
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if (adev->asic_type == CHIP_VEGA10) {
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if (adev->sdma.num_instances > 1) {
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def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_CLK_CTRL));
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data &= ~(SDMA1_CLK_CTRL__SOFT_OVERRIDE7_MASK |
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SDMA1_CLK_CTRL__SOFT_OVERRIDE6_MASK |
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@ -1427,7 +1427,7 @@ static void sdma_v4_0_update_medium_grain_clock_gating(
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if (def != data)
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WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_CLK_CTRL), data);
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if (adev->asic_type == CHIP_VEGA10) {
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if (adev->sdma.num_instances > 1) {
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def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_CLK_CTRL));
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data |= (SDMA1_CLK_CTRL__SOFT_OVERRIDE7_MASK |
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SDMA1_CLK_CTRL__SOFT_OVERRIDE6_MASK |
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@ -1458,7 +1458,7 @@ static void sdma_v4_0_update_medium_grain_light_sleep(
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WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data);
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/* 1-not override: enable sdma1 mem light sleep */
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if (adev->asic_type == CHIP_VEGA10) {
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if (adev->sdma.num_instances > 1) {
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def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_POWER_CNTL));
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data |= SDMA1_POWER_CNTL__MEM_POWER_OVERRIDE_MASK;
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if (def != data)
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@ -1472,7 +1472,7 @@ static void sdma_v4_0_update_medium_grain_light_sleep(
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WREG32(SOC15_REG_OFFSET(SDMA0, 0, mmSDMA0_POWER_CNTL), data);
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/* 0-override:disable sdma1 mem light sleep */
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if (adev->asic_type == CHIP_VEGA10) {
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if (adev->sdma.num_instances > 1) {
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def = data = RREG32(SOC15_REG_OFFSET(SDMA1, 0, mmSDMA1_POWER_CNTL));
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data &= ~SDMA1_POWER_CNTL__MEM_POWER_OVERRIDE_MASK;
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if (def != data)
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