arm64: Device specific operations
This patch adds several definitions for device communication, including I/O accessors and ioremap(). The __raw_* accessors are implemented as inline asm to avoid compiler generation of post-indexed accesses (less efficient to emulate in a virtualised environment). Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
This commit is contained in:
Catalin Marinas
parent
6170a97460
commit
fc47897d2c
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@ -0,0 +1,26 @@
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/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_DEVICE_H
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#define __ASM_DEVICE_H
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struct dev_archdata {
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struct dma_map_ops *dma_ops;
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};
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struct pdev_archdata {
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};
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#endif
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/*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_FB_H_
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#define __ASM_FB_H_
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#include <linux/fb.h>
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#include <linux/fs.h>
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#include <asm/page.h>
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static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
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unsigned long off)
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{
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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}
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static inline int fb_is_primary_device(struct fb_info *info)
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{
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return 0;
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}
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#endif /* __ASM_FB_H_ */
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@ -0,0 +1,258 @@
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/*
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* Based on arch/arm/include/asm/io.h
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*
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* Copyright (C) 1996-2000 Russell King
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ASM_IO_H
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#define __ASM_IO_H
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#ifdef __KERNEL__
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#include <linux/types.h>
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#include <asm/byteorder.h>
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#include <asm/barrier.h>
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#include <asm/pgtable.h>
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/*
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* Generic IO read/write. These perform native-endian accesses.
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*/
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static inline void __raw_writeb(u8 val, volatile void __iomem *addr)
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{
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asm volatile("strb %w0, [%1]" : : "r" (val), "r" (addr));
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}
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static inline void __raw_writew(u16 val, volatile void __iomem *addr)
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{
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asm volatile("strh %w0, [%1]" : : "r" (val), "r" (addr));
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}
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static inline void __raw_writel(u32 val, volatile void __iomem *addr)
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{
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asm volatile("str %w0, [%1]" : : "r" (val), "r" (addr));
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}
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static inline void __raw_writeq(u64 val, volatile void __iomem *addr)
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{
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asm volatile("str %0, [%1]" : : "r" (val), "r" (addr));
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}
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static inline u8 __raw_readb(const volatile void __iomem *addr)
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{
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u8 val;
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asm volatile("ldrb %w0, [%1]" : "=r" (val) : "r" (addr));
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return val;
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}
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static inline u16 __raw_readw(const volatile void __iomem *addr)
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{
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u16 val;
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asm volatile("ldrh %w0, [%1]" : "=r" (val) : "r" (addr));
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return val;
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}
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static inline u32 __raw_readl(const volatile void __iomem *addr)
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{
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u32 val;
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asm volatile("ldr %w0, [%1]" : "=r" (val) : "r" (addr));
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return val;
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}
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static inline u64 __raw_readq(const volatile void __iomem *addr)
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{
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u64 val;
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asm volatile("ldr %0, [%1]" : "=r" (val) : "r" (addr));
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return val;
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}
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/* IO barriers */
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#define __iormb() rmb()
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#define __iowmb() wmb()
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#define mmiowb() do { } while (0)
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/*
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* Relaxed I/O memory access primitives. These follow the Device memory
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* ordering rules but do not guarantee any ordering relative to Normal memory
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* accesses.
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*/
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#define readb_relaxed(c) ({ u8 __v = __raw_readb(c); __v; })
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#define readw_relaxed(c) ({ u16 __v = le16_to_cpu((__force __le16)__raw_readw(c)); __v; })
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#define readl_relaxed(c) ({ u32 __v = le32_to_cpu((__force __le32)__raw_readl(c)); __v; })
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#define writeb_relaxed(v,c) ((void)__raw_writeb((v),(c)))
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#define writew_relaxed(v,c) ((void)__raw_writew((__force u16)cpu_to_le16(v),(c)))
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#define writel_relaxed(v,c) ((void)__raw_writel((__force u32)cpu_to_le32(v),(c)))
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/*
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* I/O memory access primitives. Reads are ordered relative to any
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* following Normal memory access. Writes are ordered relative to any prior
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* Normal memory access.
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*/
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#define readb(c) ({ u8 __v = readb_relaxed(c); __iormb(); __v; })
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#define readw(c) ({ u16 __v = readw_relaxed(c); __iormb(); __v; })
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#define readl(c) ({ u32 __v = readl_relaxed(c); __iormb(); __v; })
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#define writeb(v,c) ({ __iowmb(); writeb_relaxed((v),(c)); })
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#define writew(v,c) ({ __iowmb(); writew_relaxed((v),(c)); })
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#define writel(v,c) ({ __iowmb(); writel_relaxed((v),(c)); })
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/*
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* I/O port access primitives.
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*/
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#define IO_SPACE_LIMIT 0xffff
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#define PCI_IOBASE ((void __iomem *)0xffffffbbfffe0000UL)
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static inline u8 inb(unsigned long addr)
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{
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return readb(addr + PCI_IOBASE);
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}
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static inline u16 inw(unsigned long addr)
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{
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return readw(addr + PCI_IOBASE);
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}
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static inline u32 inl(unsigned long addr)
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{
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return readl(addr + PCI_IOBASE);
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}
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static inline void outb(u8 b, unsigned long addr)
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{
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writeb(b, addr + PCI_IOBASE);
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}
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static inline void outw(u16 b, unsigned long addr)
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{
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writew(b, addr + PCI_IOBASE);
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}
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static inline void outl(u32 b, unsigned long addr)
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{
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writel(b, addr + PCI_IOBASE);
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}
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#define inb_p(addr) inb(addr)
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#define inw_p(addr) inw(addr)
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#define inl_p(addr) inl(addr)
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#define outb_p(x, addr) outb((x), (addr))
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#define outw_p(x, addr) outw((x), (addr))
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#define outl_p(x, addr) outl((x), (addr))
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static inline void insb(unsigned long addr, void *buffer, int count)
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{
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u8 *buf = buffer;
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while (count--)
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*buf++ = __raw_readb(addr + PCI_IOBASE);
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}
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static inline void insw(unsigned long addr, void *buffer, int count)
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{
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u16 *buf = buffer;
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while (count--)
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*buf++ = __raw_readw(addr + PCI_IOBASE);
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}
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static inline void insl(unsigned long addr, void *buffer, int count)
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{
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u32 *buf = buffer;
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while (count--)
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*buf++ = __raw_readl(addr + PCI_IOBASE);
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}
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static inline void outsb(unsigned long addr, const void *buffer, int count)
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{
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const u8 *buf = buffer;
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while (count--)
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__raw_writeb(*buf++, addr + PCI_IOBASE);
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}
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static inline void outsw(unsigned long addr, const void *buffer, int count)
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{
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const u16 *buf = buffer;
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while (count--)
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__raw_writew(*buf++, addr + PCI_IOBASE);
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}
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static inline void outsl(unsigned long addr, const void *buffer, int count)
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{
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const u32 *buf = buffer;
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while (count--)
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__raw_writel(*buf++, addr + PCI_IOBASE);
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}
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#define insb_p(port,to,len) insb(port,to,len)
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#define insw_p(port,to,len) insw(port,to,len)
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#define insl_p(port,to,len) insl(port,to,len)
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#define outsb_p(port,from,len) outsb(port,from,len)
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#define outsw_p(port,from,len) outsw(port,from,len)
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#define outsl_p(port,from,len) outsl(port,from,len)
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/*
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* String version of I/O memory access operations.
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*/
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extern void __memcpy_fromio(void *, const volatile void __iomem *, size_t);
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extern void __memcpy_toio(volatile void __iomem *, const void *, size_t);
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extern void __memset_io(volatile void __iomem *, int, size_t);
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#define memset_io(c,v,l) __memset_io((c),(v),(l))
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#define memcpy_fromio(a,c,l) __memcpy_fromio((a),(c),(l))
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#define memcpy_toio(c,a,l) __memcpy_toio((c),(a),(l))
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/*
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* I/O memory mapping functions.
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*/
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extern void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot);
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extern void __iounmap(volatile void __iomem *addr);
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#define PROT_DEFAULT (PTE_TYPE_PAGE | PTE_AF | PTE_DIRTY)
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#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_XN | PTE_ATTRINDX(MT_DEVICE_nGnRE))
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#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_ATTRINDX(MT_NORMAL_NC))
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#define ioremap(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)
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#define ioremap_nocache(addr, size) __ioremap((addr), (size), PROT_DEVICE_nGnRE)
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#define ioremap_wc(addr, size) __ioremap((addr), (size), PROT_NORMAL_NC)
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#define iounmap __iounmap
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#define ARCH_HAS_IOREMAP_WC
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#include <asm-generic/iomap.h>
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/*
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* More restrictive address range checking than the default implementation
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* (PHYS_OFFSET and PHYS_MASK taken into account).
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*/
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#define ARCH_HAS_VALID_PHYS_ADDR_RANGE
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extern int valid_phys_addr_range(unsigned long addr, size_t size);
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extern int valid_mmap_phys_addr_range(unsigned long pfn, size_t size);
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extern int devmem_is_allowed(unsigned long pfn);
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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* access
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*/
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#define xlate_dev_mem_ptr(p) __va(p)
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/*
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* Convert a virtual cached pointer to an uncached pointer
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*/
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#define xlate_dev_kmem_ptr(p) p
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#endif /* __KERNEL__ */
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#endif /* __ASM_IO_H */
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@ -0,0 +1,64 @@
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/*
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* Based on arch/arm/kernel/io.c
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*
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* Copyright (C) 2012 ARM Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
|
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* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
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*
|
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* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/io.h>
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/*
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* Copy data from IO memory space to "real" memory space.
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*/
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void __memcpy_fromio(void *to, const volatile void __iomem *from, size_t count)
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{
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unsigned char *t = to;
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while (count) {
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count--;
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*t = readb(from);
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t++;
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from++;
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}
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}
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EXPORT_SYMBOL(__memcpy_fromio);
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/*
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* Copy data from "real" memory space to IO memory space.
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*/
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void __memcpy_toio(volatile void __iomem *to, const void *from, size_t count)
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{
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const unsigned char *f = from;
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while (count) {
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count--;
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writeb(*f, to);
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f++;
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to++;
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}
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}
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EXPORT_SYMBOL(__memcpy_toio);
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/*
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* "memset" on IO memory space.
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*/
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void __memset_io(volatile void __iomem *dst, int c, size_t count)
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{
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while (count) {
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count--;
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writeb(c, dst);
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dst++;
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}
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}
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EXPORT_SYMBOL(__memset_io);
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|
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/*
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* Based on arch/arm/mm/ioremap.c
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*
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* (C) Copyright 1995 1996 Linus Torvalds
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* Hacked for ARM by Phil Blundell <philb@gnu.org>
|
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* Hacked to allow all architectures to build, and various cleanups
|
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* by Russell King
|
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* Copyright (C) 2012 ARM Ltd.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
||||
*/
|
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|
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#include <linux/export.h>
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <linux/io.h>
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static void __iomem *__ioremap_caller(phys_addr_t phys_addr, size_t size,
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pgprot_t prot, void *caller)
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{
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unsigned long last_addr;
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unsigned long offset = phys_addr & ~PAGE_MASK;
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int err;
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unsigned long addr;
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struct vm_struct *area;
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|
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/*
|
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* Page align the mapping address and size, taking account of any
|
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* offset.
|
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*/
|
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phys_addr &= PAGE_MASK;
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size = PAGE_ALIGN(size + offset);
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|
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/*
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* Don't allow wraparound, zero size or outside PHYS_MASK.
|
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*/
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last_addr = phys_addr + size - 1;
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if (!size || last_addr < phys_addr || (last_addr & ~PHYS_MASK))
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return NULL;
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|
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/*
|
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* Don't allow RAM to be mapped.
|
||||
*/
|
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if (WARN_ON(pfn_valid(__phys_to_pfn(phys_addr))))
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return NULL;
|
||||
|
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area = get_vm_area_caller(size, VM_IOREMAP, caller);
|
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if (!area)
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return NULL;
|
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addr = (unsigned long)area->addr;
|
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|
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err = ioremap_page_range(addr, addr + size, phys_addr, prot);
|
||||
if (err) {
|
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vunmap((void *)addr);
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return NULL;
|
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}
|
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|
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return (void __iomem *)(offset + addr);
|
||||
}
|
||||
|
||||
void __iomem *__ioremap(phys_addr_t phys_addr, size_t size, pgprot_t prot)
|
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{
|
||||
return __ioremap_caller(phys_addr, size, prot,
|
||||
__builtin_return_address(0));
|
||||
}
|
||||
EXPORT_SYMBOL(__ioremap);
|
||||
|
||||
void __iounmap(volatile void __iomem *io_addr)
|
||||
{
|
||||
void *addr = (void *)(PAGE_MASK & (unsigned long)io_addr);
|
||||
|
||||
vunmap(addr);
|
||||
}
|
||||
EXPORT_SYMBOL(__iounmap);
|
||||
Loading…
Reference in New Issue