trivial fixes for omap-serial
Trivial fixes for omap-serial. Signed-off-by: Pavel Machek <pavel@ucw.cz> index 18c30ca..f43ed2c 100644 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -63,7 +63,7 @@
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#define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
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#define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
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#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz*/
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#define DEFAULT_CLK_SPEED 48000000 /* 48Mhz */
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/* SCR register bitmasks */
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#define OMAP_UART_SCR_RX_TRIG_GRANU1_MASK (1 << 7)
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@ -93,7 +93,7 @@
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/* WER = 0x7F
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* Enable module level wakeup in WER reg
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*/
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#define OMAP_UART_WER_MOD_WKUP 0X7F
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#define OMAP_UART_WER_MOD_WKUP 0x7F
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/* Enable XON/XOFF flow control on output */
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#define OMAP_UART_SW_TX 0x08
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@ -114,7 +114,7 @@ struct uart_omap_dma {
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dma_addr_t tx_buf_dma_phys;
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unsigned int uart_base;
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/*
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* Buffer for rx dma.It is not required for tx because the buffer
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* Buffer for rx dma. It is not required for tx because the buffer
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* comes from port structure.
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*/
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unsigned char *rx_buf;
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@ -151,7 +151,7 @@ struct uart_omap_port {
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int use_dma;
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/*
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* Some bits in registers are cleared on a read, so they must
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* be saved whenever the register is read but the bits will not
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* be saved whenever the register is read, but the bits will not
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* be immediately processed.
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*/
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unsigned int lsr_break_flag;
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