drm/i915: Make ironlake_{enable,disable}_display_irq() static inlines
ironlake_{enable,disable}_display_irq() each just call ilk_update_display_irq() so let's make them static inlines. While at it s/ironlake/ilk/ to make things shorter, and a bit more consistent with the ibx functions. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1448294777-13722-3-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -2751,10 +2751,19 @@ void valleyview_disable_display_irqs(struct drm_i915_private *dev_priv);
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void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv,
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uint32_t mask,
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uint32_t bits);
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void
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ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask);
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void
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ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask);
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void ilk_update_display_irq(struct drm_i915_private *dev_priv,
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uint32_t interrupt_mask,
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uint32_t enabled_irq_mask);
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static inline void
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ilk_enable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits)
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{
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ilk_update_display_irq(dev_priv, bits, bits);
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}
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static inline void
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ilk_disable_display_irq(struct drm_i915_private *dev_priv, uint32_t bits)
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{
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ilk_update_display_irq(dev_priv, bits, 0);
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}
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void ibx_display_interrupt_update(struct drm_i915_private *dev_priv,
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uint32_t interrupt_mask,
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uint32_t enabled_irq_mask);
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@ -215,9 +215,9 @@ void i915_hotplug_interrupt_update(struct drm_i915_private *dev_priv,
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* @interrupt_mask: mask of interrupt bits to update
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* @enabled_irq_mask: mask of interrupt bits to enable
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*/
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static void ilk_update_display_irq(struct drm_i915_private *dev_priv,
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uint32_t interrupt_mask,
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uint32_t enabled_irq_mask)
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void ilk_update_display_irq(struct drm_i915_private *dev_priv,
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uint32_t interrupt_mask,
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uint32_t enabled_irq_mask)
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{
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uint32_t new_val;
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@ -239,18 +239,6 @@ static void ilk_update_display_irq(struct drm_i915_private *dev_priv,
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}
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}
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void
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ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
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{
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ilk_update_display_irq(dev_priv, mask, mask);
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}
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void
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ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask)
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{
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ilk_update_display_irq(dev_priv, mask, 0);
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}
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/**
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* ilk_update_gt_irq - update GTIMR
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* @dev_priv: driver private
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@ -2655,7 +2643,7 @@ static int ironlake_enable_vblank(struct drm_device *dev, unsigned int pipe)
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DE_PIPE_VBLANK(pipe);
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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ironlake_enable_display_irq(dev_priv, bit);
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ilk_enable_display_irq(dev_priv, bit);
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spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
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return 0;
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@ -2710,7 +2698,7 @@ static void ironlake_disable_vblank(struct drm_device *dev, unsigned int pipe)
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DE_PIPE_VBLANK(pipe);
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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ironlake_disable_display_irq(dev_priv, bit);
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ilk_disable_display_irq(dev_priv, bit);
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spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
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}
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@ -3462,7 +3450,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
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* setup is guaranteed to run in single-threaded context. But we
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* need it to make the assert_spin_locked happy. */
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spin_lock_irq(&dev_priv->irq_lock);
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ironlake_enable_display_irq(dev_priv, DE_PCU_EVENT);
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ilk_enable_display_irq(dev_priv, DE_PCU_EVENT);
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spin_unlock_irq(&dev_priv->irq_lock);
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}
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@ -128,9 +128,9 @@ static void ironlake_set_fifo_underrun_reporting(struct drm_device *dev,
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DE_PIPEB_FIFO_UNDERRUN;
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if (enable)
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ironlake_enable_display_irq(dev_priv, bit);
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ilk_enable_display_irq(dev_priv, bit);
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else
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ironlake_disable_display_irq(dev_priv, bit);
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ilk_disable_display_irq(dev_priv, bit);
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}
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static void ivybridge_check_fifo_underruns(struct intel_crtc *crtc)
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@ -161,9 +161,9 @@ static void ivybridge_set_fifo_underrun_reporting(struct drm_device *dev,
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if (!ivb_can_enable_err_int(dev))
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return;
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ironlake_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
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ilk_enable_display_irq(dev_priv, DE_ERR_INT_IVB);
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} else {
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ironlake_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
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ilk_disable_display_irq(dev_priv, DE_ERR_INT_IVB);
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if (old &&
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I915_READ(GEN7_ERR_INT) & ERR_INT_FIFO_UNDERRUN(pipe)) {
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