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i.MX device tree update for 4.18: 

- New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
    PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
    Kieback & Peter GmbH iMX6Q TPC board.
  - A series from Anson Huang to add a bunch of devices for i.MX6SX
    SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
  - Update i.MX7D for cpufreq support, using operating-points-v2
    bindings, correcting cpu supply name for voltage scaling.
  - Clean up unneeded 'codec-handle' property from imx25-pdk and
    imx53-tx53 device tree.
  - Switch SoC dtsi and NXP board dts files to use SPDX identifier.
  - Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
    avoid_unnecessary_addr_size seen with W=1 switch.
  - A series from Rob Herring to fix DTC warning graph_endpoint seen with
    IPU OF graph when W=1 switch is on.
  - Update a few boards to use symbol name instead of hard-coding the
    input codes.
  - Update a number of boards to use IRQ_TYPE specifier instead of the
    raw value.
  - A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
    adding assigned clocks for GPU, and enabling eGalax touchscreen.
  - A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
    cleaning up eMMC device node.
  - Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
    simple-audio-card, so that auxiliary audio devices such as external
    amplifiers can be supported.
  - Replace underscore with hyphen in aliases name to fix DTC warning
    alias_paths with W=1 switch.
  - A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
  - Other random and small changes.
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Merge tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

i.MX device tree update for 4.18:
 - New boards support: BTicino i.MX6DL Mamoj board, DHCOM iMX6 SoM and
   PDK2 board, Engicam i.CoreM6 1.5 Quad/Dual MIPI starter kit,
   Kieback & Peter GmbH iMX6Q TPC board.
 - A series from Anson Huang to add a bunch of devices for i.MX6SX
   SabreAuto board, PMIC, IO expanders, FEC, Watchdog, LED and Touch.
 - Update i.MX7D for cpufreq support, using operating-points-v2
   bindings, correcting cpu supply name for voltage scaling.
 - Clean up unneeded 'codec-handle' property from imx25-pdk and
   imx53-tx53 device tree.
 - Switch SoC dtsi and NXP board dts files to use SPDX identifier.
 - Remove unnecessary '#address-cells/#size-cells' to fix DTC warning
   avoid_unnecessary_addr_size seen with W=1 switch.
 - A series from Rob Herring to fix DTC warning graph_endpoint seen with
   IPU OF graph when W=1 switch is on.
 - Update a few boards to use symbol name instead of hard-coding the
   input codes.
 - Update a number of boards to use IRQ_TYPE specifier instead of the
   raw value.
 - A few updates for i.MX6 RDU2 board: bumping SoC/PU operating points,
   adding assigned clocks for GPU, and enabling eGalax touchscreen.
 - A couple of i.MX51 RDU1 updates: limiting usbh1 to full-speed, and
   cleaning up eMMC device node.
 - Convert Hummingboard audio bindings from imx-audio-sgtl5000 to
   simple-audio-card, so that auxiliary audio devices such as external
   amplifiers can be supported.
 - Replace underscore with hyphen in aliases name to fix DTC warning
   alias_paths with W=1 switch.
 - A couple of updates on i.MX7D SAI and i.MX6ULL UART5 pin defines.
 - Other random and small changes.

* tag 'imx-dt-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (72 commits)
  ARM: dts: imx28/imx53: enable edt-ft5x06 wakeup source
  ARM: dts: imx51-zii-rdu1: cleanup eMMC node
  ARM: dts: vf610-zii-dev: enable vf610 builtin temp sensor
  ARM: dts: imx7d: use operating-points-v2 for cpu
  ARM: dts: imx7s-warp: remove unnecessary cpu regulator supply
  ARM: dts: imx7d: correct cpu supply name for voltage scaling
  ARM: dts: imx51-zii-rdu1: limit usbh1 to full-speed
  ARM: dts: imx6/7: Remove unit-address from anatop regulators
  ARM: dts: imx: Switch NXP boards to SPDX identifier
  ARM: dts: imx6qdl-phytec-pfla02: Use IRQ_TYPE specifier
  ARM: dts: imx53-voipac-dmm-668: Use IRQ_TYPE specifier
  ARM: dts: imx53-qsb: Use IRQ_TYPE specifier
  ARM: dts: vf-colibri-eval-v3: Use IRQ_TYPE specifier
  ARM: dts: imx6q-gk802: Do not hardcode input codes
  ARM: dts: imx53-smd: Do not hardcode input codes
  ARM: dts: imx53-ard: Do not hardcode input codes
  ARM: dts: imx7: Fix error in coresight TPIU graph connection
  ARM: dts: imx53: Fix LDB OF graph warning
  ARM: dts: imx: fix IPU OF graph endpoint node names
  ARM: dts: imx: Switch to SPDX identifier
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-05-25 13:52:34 -07:00
parent 737e09205a 204d9e32b7
commit faee4edf6c
116 changed files with 2286 additions and 1085 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/vendor-prefixes.txt
View File

@ -56,6 +56,7 @@ bosch Bosch Sensortec GmbH
boundary Boundary Devices Inc.
brcm Broadcom Corporation
buffalo Buffalo, Inc.
bticino Bticino International
calxeda Calxeda
capella Capella Microsystems, Inc
cascoda Cascoda, Ltd.

4
arch/arm/boot/dts/Makefile
View File

@ -401,6 +401,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-hummingboard2-som-v15.dtb \
imx6dl-icore.dtb \
imx6dl-icore-rqs.dtb \
imx6dl-mamoj.dtb \
imx6dl-nit6xlite.dtb \
imx6dl-nitrogen6x.dtb \
imx6dl-phytec-mira-rdk-nand.dtb \
@ -441,6 +442,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-cubox-i-emmc-som-v15.dtb \
imx6q-cubox-i-som-v15.dtb \
imx6q-dfi-fs700-m60.dtb \
imx6q-dhcom-pdk2.dtb \
imx6q-display5-tianma-tm070-1280x768.dtb \
imx6q-dmo-edmqmx6.dtb \
imx6q-dms-ba16.dtb \
@ -465,9 +467,11 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-hummingboard2-emmc-som-v15.dtb \
imx6q-hummingboard2-som-v15.dtb \
imx6q-icore.dtb \
imx6q-icore-mipi.dtb \
imx6q-icore-ofcap10.dtb \
imx6q-icore-ofcap12.dtb \
imx6q-icore-rqs.dtb \
imx6q-kp-tpc.dtb \
imx6q-marsboard.dtb \
imx6q-mccmon6.dtb \
imx6q-nitrogen6x.dtb \

11
arch/arm/boot/dts/imx1-ads.dts
View File

@ -23,17 +23,6 @@
memory@8000000 {
reg = <0x08000000 0x04000000>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
clk32 {
compatible = "fsl,imx-clk32", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32000>;
};
};
};
&cspi1 {

21
arch/arm/boot/dts/imx1.dtsi
View File

@ -1,13 +1,6 @@
/*
* Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
#include "imx1-pinfunc.h"
@ -62,6 +55,14 @@
};
};
clocks {
clk32 {
compatible = "fsl,imx-clk32", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32000>;
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;

13
arch/arm/boot/dts/imx23-evk.dts
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
/dts-v1/;
#include "imx23.dtsi"

13
arch/arm/boot/dts/imx23.dtsi
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
#include "imx23-pinfunc.h"

14
arch/arm/boot/dts/imx25-pdk.dts
View File

@ -1,13 +1,6 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2013 Freescale Semiconductor, Inc.
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
@ -291,7 +284,6 @@
};
&ssi1 {
codec-handle = <&codec>;
status = "okay";
};

16
arch/arm/boot/dts/imx25.dtsi
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
#include <dt-bindings/gpio/gpio.h>
#include "imx25-pinfunc.h"
@ -70,9 +63,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc {
compatible = "fsl,imx-osc", "fixed-clock";
#clock-cells = <0>;

13
arch/arm/boot/dts/imx27-apf27.dts
View File

@ -22,17 +22,10 @@
memory@a0000000 {
reg = <0xa0000000 0x04000000>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
};
};
&clk_osc26m {
clock-frequency = <0>;
};
&iomuxc {

13
arch/arm/boot/dts/imx27-pdk.dts
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Sascha Hauer, Pengutronix
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Sascha Hauer, Pengutronix
/dts-v1/;
#include "imx27.dtsi"

18
arch/arm/boot/dts/imx27.dtsi
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Sascha Hauer, Pengutronix
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Sascha Hauer, Pengutronix
#include "imx27-pinfunc.h"
@ -57,10 +50,7 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
osc26m {
clk_osc26m: osc26m {
compatible = "fsl,imx-osc26m", "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;

2
arch/arm/boot/dts/imx28-cfa10049.dts
View File

@ -398,8 +398,6 @@
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&rotary_btn_pins_cfa10049>;
#address-cells = <1>;
#size-cells = <0>;
rotary_button {
label = "rotary_button";

2
arch/arm/boot/dts/imx28-duckbill-2-enocean.dts
View File

@ -206,8 +206,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&enocean_button>;

13
arch/arm/boot/dts/imx28-evk.dts
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
/dts-v1/;
#include "imx28.dtsi"

14
arch/arm/boot/dts/imx28-tx28.dts
View File

@ -140,15 +140,10 @@
regulator-boot-on;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
mclk: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <26000000>;
};
mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
sound {
@ -345,6 +340,7 @@
interrupts = <5 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio2 6 GPIO_ACTIVE_LOW>;
wake-gpios = <&gpio4 9 GPIO_ACTIVE_HIGH>;
wakeup-source;
};
touchscreen: tsc2007@48 {

13
arch/arm/boot/dts/imx28.dtsi
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
#include <dt-bindings/gpio/gpio.h>
#include "imx28-pinfunc.h"

13
arch/arm/boot/dts/imx31.dtsi
View File

@ -1,13 +1,6 @@
/*
* Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
/ {
#address-cells = <1>;

15
arch/arm/boot/dts/imx35-pdk.dts
View File

@ -1,14 +1,7 @@
/*
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
* Copyright 2014 Freescale Semiconductor, Inc.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
// Copyright 2014 Freescale Semiconductor, Inc.
/dts-v1/;
#include "imx35.dtsi"

14
arch/arm/boot/dts/imx35.dtsi
View File

@ -1,12 +1,8 @@
/*
* Copyright 2012 Steffen Trumtrar, Pengutronix
*
* based on imx27.dtsi
*
* This program is free software; you can redistribute it and/or modify it under
* the terms of the GNU General Public License version 2 as published by the
* Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2012 Steffen Trumtrar, Pengutronix
//
// based on imx27.dtsi
#include "imx35-pinfunc.h"

17
arch/arm/boot/dts/imx50-evk.dts
View File

@ -1,15 +1,8 @@
/*
* Copyright 2013 Greg Ungerer <gerg@uclinux.org>
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2013 Greg Ungerer <gerg@uclinux.org>
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;
#include "imx50.dtsi"

3
arch/arm/boot/dts/imx50.dtsi
View File

@ -60,9 +60,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;

15
arch/arm/boot/dts/imx51-babbage.dts
View File

@ -1,14 +1,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;
#include "imx51.dtsi"

6
arch/arm/boot/dts/imx51-zii-rdu1.dts
View File

@ -207,8 +207,6 @@
switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsa,member = <0 0>;
@ -462,7 +460,10 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>;
bus-width = <4>;
no-1-8-v;
non-removable;
no-sdio;
no-sd;
status = "okay";
};
@ -591,6 +592,7 @@
phy_type = "ulpi";
fsl,usbphy = <&usbh1phy>;
disable-over-current;
maximum-speed = "full-speed";
vbus-supply = <&reg_5p0v_main>;
status = "okay";
};

18
arch/arm/boot/dts/imx51.dtsi
View File

@ -1,14 +1,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
#include "imx51-pinfunc.h"
#include <dt-bindings/clock/imx5-clock.h>
@ -56,9 +49,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;

11
arch/arm/boot/dts/imx53-ard.dts
View File

@ -11,6 +11,7 @@
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx53.dtsi"
/ {
@ -68,34 +69,34 @@
home {
label = "Home";
gpios = <&gpio5 10 0>;
linux,code = <102>; /* KEY_HOME */
linux,code = <KEY_HOME>;
wakeup-source;
};
back {
label = "Back";
gpios = <&gpio5 11 0>;
linux,code = <158>; /* KEY_BACK */
linux,code = <KEY_BACK>;
wakeup-source;
};
program {
label = "Program";
gpios = <&gpio5 12 0>;
linux,code = <362>; /* KEY_PROGRAM */
linux,code = <KEY_PROGRAM >;
wakeup-source;
};
volume-up {
label = "Volume Up";
gpios = <&gpio5 13 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
linux,code = <KEY_VOLUMEUP>;
};
volume-down {
label = "Volume Down";
gpios = <&gpio4 0 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
linux,code = <KEY_VOLUMEDOWN>;
};
};
};

2
arch/arm/boot/dts/imx53-m53.dtsi
View File

@ -53,8 +53,6 @@
stmpe610@41 {
compatible = "st,stmpe610";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41>;
id = <0>;
blocks = <0x5>;

12
arch/arm/boot/dts/imx53-ppd.dts
View File

@ -180,8 +180,6 @@
power-gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
power-button {
label = "Power button";
@ -192,8 +190,6 @@
touch-lock-key {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
touch-lock-button {
label = "Touch lock button";
@ -300,7 +296,7 @@
compatible = "dlg,da9053-aa";
reg = <0>;
interrupt-parent = <&gpio3>;
interrupts = <12 0x8>;
interrupts = <12 IRQ_TYPE_LEVEL_LOW>;
spi-max-frequency = <1000000>;
dlg,tsi-as-adc;
tsiref-supply = <&reg_tsiref>;
@ -473,7 +469,7 @@
compatible = "fsl,mma8453";
reg = <0x1c>;
interrupt-parent = <&gpio1>;
interrupts = <6 0>;
interrupts = <6 IRQ_TYPE_NONE>;
interrupt-names = "INT1";
};
@ -539,7 +535,7 @@
reset-gpio = <&gpio5 19 GPIO_ACTIVE_HIGH>;
reg = <0x4b>;
interrupt-parent = <&gpio5>;
interrupts = <4 0x8>;
interrupts = <4 IRQ_TYPE_LEVEL_LOW>;
};
};
@ -559,8 +555,6 @@
status = "okay";
port@2 {
reg = <2>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in_lvds0>;
};

15
arch/arm/boot/dts/imx53-qsb-common.dtsi
View File

@ -1,14 +1,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
#include "imx53.dtsi"

17
arch/arm/boot/dts/imx53-qsb.dts
View File

@ -1,14 +1,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;
#include "imx53-qsb-common.dtsi"
@ -23,7 +16,7 @@
compatible = "dlg,da9053-aa", "dlg,da9052";
reg = <0x48>;
interrupt-parent = <&gpio7>;
interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
interrupts = <11 IRQ_TYPE_LEVEL_LOW>; /* low-level active IRQ at GPIO7_11 */
regulators {
buck1_reg: buck1 {

15
arch/arm/boot/dts/imx53-qsrb.dts
View File

@ -1,14 +1,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;

20
arch/arm/boot/dts/imx53-smd.dts
View File

@ -1,16 +1,10 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;
#include <dt-bindings/input/input.h>
#include "imx53.dtsi"
/ {
@ -27,13 +21,13 @@
volume-up {
label = "Volume Up";
gpios = <&gpio2 14 0>;
linux,code = <115>; /* KEY_VOLUMEUP */
linux,code = <KEY_VOLUMEUP>;
};
volume-down {
label = "Volume Down";
gpios = <&gpio2 15 0>;
linux,code = <114>; /* KEY_VOLUMEDOWN */
linux,code = <KEY_VOLUMEDOWN>;
};
};
};

1
arch/arm/boot/dts/imx53-tx53-x03x.dts
View File

@ -245,6 +245,7 @@
interrupts = <15 IRQ_TYPE_EDGE_FALLING>;
reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
wake-gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>;
wakeup-source;
};
touchscreen: tsc2007@48 {

14
arch/arm/boot/dts/imx53-tx53.dtsi
View File

@ -58,7 +58,7 @@
can0 = &can2; /* Make the can interface indices consistent with TX28/TX48 modules */
can1 = &can1;
ipu = &ipu;
reg_can_xcvr = &reg_can_xcvr;
reg-can-xcvr = &reg_can_xcvr;
usbh1 = &usbh1;
usbotg = &usbotg;
};
@ -67,13 +67,12 @@
ckih1 {
clock-frequency = <0>;
};
};
mclk: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <26000000>;
};
mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
gpio-keys {
@ -550,7 +549,6 @@
};
&ssi1 {
codec-handle = <&sgtl5000>;
status = "okay";
};

2
arch/arm/boot/dts/imx53-voipac-dmm-668.dtsi
View File

@ -150,7 +150,7 @@
compatible = "dlg,da9053-aa", "dlg,da9052";
reg = <0x48>;
interrupt-parent = <&gpio7>;
interrupts = <11 0x8>; /* low-level active IRQ at GPIO7_11 */
interrupts = <11 IRQ_TYPE_LEVEL_LOW>; /* low-level active IRQ at GPIO7_11 */
regulators {
buck1_reg: buck1 {

11
arch/arm/boot/dts/imx53.dtsi
View File

@ -88,9 +88,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
@ -488,6 +485,10 @@
remote-endpoint = <&ipu_di0_lvds0>;
};
};
port@2 {
reg = <2>;
};
};
lvds-channel@1 {
@ -503,6 +504,10 @@
remote-endpoint = <&ipu_di1_lvds1>;
};
};
port@2 {
reg = <2>;
};
};
};

2
arch/arm/boot/dts/imx6dl-aristainetos2_4.dts
View File

@ -78,8 +78,6 @@
&ecspi1 {
lcd_panel: display@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "lg,lg4573";
spi-max-frequency = <10000000>;
reg = <0>;

15
arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
View File

@ -72,15 +72,12 @@
stdout-path = "serial0:115200n8";
};
clocks {
/* Fixed crystal dedicated to mcp251x */
clk16m: clk@1 {
compatible = "fixed-clock";
reg = <1>;
#clock-cells = <0>;
clock-frequency = <16000000>;
clock-output-names = "clk16m";
};
/* Fixed crystal dedicated to mcp251x */
clk16m: clock-16m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <16000000>;
clock-output-names = "clk16m";
};
gpio-keys {

224
arch/arm/boot/dts/imx6dl-mamoj.dts Normal file
View File

@ -0,0 +1,224 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2018 BTicino
* Copyright (C) 2018 Amarula Solutions B.V.
*/
/dts-v1/;
#include "imx6dl.dtsi"
/ {
model = "BTicino i.MX6DL Mamoj board";
compatible = "bticino,imx6dl-mamoj", "fsl,imx6dl";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "mii";
status = "okay";
};
&i2c3 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
};
&i2c4 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c4>;
status = "okay";
pfuze100: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
/* CPU vdd_arm core */
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
/* SOC vdd_soc */
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
/* I/O power GEN_3V3 */
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
/* DDR memory */
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
/* DDR memory */
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
/* not used */
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
};
/* not used */
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
/* PMIC vsnvs. EX boot mode */
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
/* not used */
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
/* not used */
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
/* not used */
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
};
/* 1v8 general power */
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
/* 2v8 general power IMX6 */
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
/* 3v3 Ethernet */
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
};
&uart3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
bus-width = <8>;
non-removable;
keep-power-in-suspend;
status = "okay";
};
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b1
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_ROW2__ENET_TX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_ROW0__ENET_TX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_GPIO_19__ENET_TX_ER 0x1b0b0
MX6QDL_PAD_GPIO_18__ENET_RX_CLK 0x1b0b1
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_KEY_COL2__ENET_RX_DATA2 0x1b0b0
MX6QDL_PAD_KEY_COL0__ENET_RX_DATA3 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_KEY_COL3__ENET_CRS 0x1b0b0
MX6QDL_PAD_KEY_ROW1__ENET_COL 0x1b0b0
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_i2c4: i2c4grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__I2C4_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_8__I2C4_SDA 0x4001b8b1
>;
};
pinctrl_uart3: uart3grp {
fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};

10
arch/arm/boot/dts/imx6dl-sabreauto.dts
View File

@ -1,10 +1,6 @@
/*
* Copyright (C) 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2013 Freescale Semiconductor, Inc.
/dts-v1/;

10
arch/arm/boot/dts/imx6dl-sabresd.dts
View File

@ -1,10 +1,6 @@
/*
* Copyright (C) 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2013 Freescale Semiconductor, Inc.
/dts-v1/;

6
arch/arm/boot/dts/imx6dl-udoo.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6dl.dtsi"

6
arch/arm/boot/dts/imx6dl-wandboard-revb1.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6dl.dtsi"

6
arch/arm/boot/dts/imx6dl-wandboard-revd1.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6dl.dtsi"

6
arch/arm/boot/dts/imx6dl-wandboard.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6dl.dtsi"

12
arch/arm/boot/dts/imx6dl.dtsi
View File

@ -1,12 +1,6 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2013 Freescale Semiconductor, Inc.
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6dl-pinfunc.h"

4
arch/arm/boot/dts/imx6q-b850v3.dts
View File

@ -156,8 +156,6 @@
stdp2690@72 {
compatible = "megachips,stdp2690-ge-b850v3-fw";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x72>;
ports {
@ -184,8 +182,6 @@
stdp4028@73 {
compatible = "megachips,stdp4028-ge-b850v3-fw";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x73>;
interrupt-parent = <&gpio2>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;

7
arch/arm/boot/dts/imx6q-ba16.dtsi
View File

@ -157,7 +157,12 @@
partition@d0000 {
label = "spare";
reg = <0xd0000 0x130000>;
reg = <0xd0000 0x320000>;
};
partition@3f0000 {
label = "mfg";
reg = <0x3f0000 0x10000>;
};
};
};

13
arch/arm/boot/dts/imx6q-bx50v3.dtsi
View File

@ -43,13 +43,10 @@
#include "imx6q-ba16.dtsi"
/ {
clocks {
mclk: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <22000000>;
};
mclk: clock-mclk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <22000000>;
};
gpio-poweroff {
@ -107,8 +104,6 @@
switch@0 {
compatible = "marvell,mv88e6085"; /* 88e6240*/
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
switch_ports: ports {

151
arch/arm/boot/dts/imx6q-dhcom-pdk2.dts Normal file
View File

@ -0,0 +1,151 @@
// SPDX-License-Identifier: (GPL-2.0+)
/*
* Copyright (C) 2015 DH electronics GmbH
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
/dts-v1/;
#include "imx6q-dhcom-som.dtsi"
/ {
model = "Freescale i.MX6 Quad DHCOM Premium Developer Kit (2)";
compatible = "dh,imx6q-dhcom-pdk2", "dh,imx6q-dhcom-som", "fsl,imx6q";
chosen {
stdout-path = &uart1;
};
clk_ext_audio_codec: clock-codec {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
};
sound {
compatible = "fsl,imx-audio-sgtl5000";
model = "imx-sgtl5000";
ssi-controller = <&ssi1>;
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"LINE_IN", "Line In Jack",
"Headphone Jack", "HP_OUT";
mux-int-port = <1>;
mux-ext-port = <3>;
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux_ext>;
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&i2c2 {
sgtl5000: codec@a {
compatible = "fsl,sgtl5000";
reg = <0x0a>;
#sound-dai-cells = <0>;
clocks = <&clk_ext_audio_codec>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_base &pinctrl_hog>;
pinctrl_hog: hog-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x400120b0
MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x400120b0
MX6QDL_PAD_GPIO_5__GPIO1_IO05 0x400120b0
MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x400120b0
MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x120b0
MX6QDL_PAD_DI0_PIN4__GPIO4_IO20 0x400120b0
MX6QDL_PAD_EIM_D27__GPIO3_IO27 0x120b0
MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x120b0
MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x400120b0
MX6QDL_PAD_NANDF_CS1__GPIO6_IO14 0x400120b0
MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x400120b0
MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x400120b0
MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x400120b0
MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x400120b0
MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x400120b0
MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x400120b0
MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x400120b0
MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x400120b0
MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x400120b0
MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x400120b0
MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x400120b0
MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x400120b0
MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x400120b0
MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x400120b0
>;
};
pinctrl_audmux_ext: audmux-ext-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>;
};
pinctrl_enet_1G: enet-1G-grp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x100b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x100b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_EIM_D29__GPIO3_IO29 0x000b0
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x000b1
MX6QDL_PAD_EIM_D26__GPIO3_IO26 0x000b1
>;
};
pinctrl_pcie: pcie-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1
>;
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pcie>;
reset-gpio = <&gpio6 14 GPIO_ACTIVE_LOW>;
status = "okay";
};
&ssi1 {
status = "okay";
};
&sata {
status = "okay";
};
&usdhc3 {
status = "okay";
};

476
arch/arm/boot/dts/imx6q-dhcom-som.dtsi Normal file
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@ -0,0 +1,476 @@
// SPDX-License-Identifier: (GPL-2.0+)
/*
* Copyright (C) 2015 DH electronics GmbH
* Copyright (C) 2018 Marek Vasut <marex@denx.de>
*/
#include "imx6q.dtsi"
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
mmc0 = &usdhc2;
mmc1 = &usdhc3;
mmc2 = &usdhc4;
mmc3 = &usdhc1;
};
memory@10000000 {
reg = <0x10000000 0x40000000>;
};
reg_usb_otg_vbus: regulator-usb-otg-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
};
reg_usb_h1_vbus: regulator-usb-h1-vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio3 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
reg_3p3v: regulator-3P3V {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
status = "okay";
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
status = "okay";
};
&ecspi1 {
cs-gpios = <&gpio2 30 GPIO_ACTIVE_HIGH>, <&gpio4 11 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi1>;
status = "okay";
flash@0 { /* S25FL116K */
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <50000000>;
reg = <0>;
m25p,fast-read;
};
};
&ecspi2 {
cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi2>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet_100M>;
phy-mode = "rmii";
phy-handle = <&ethphy0>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy0: ethernet-phy@0 { /* SMSC LAN8710Ai */
reg = <0>;
max-speed = <100>;
reset-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>;
reset-delay-us = <1000>;
reset-post-delay-us = <1000>;
};
};
};
&i2c1 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
ltc3676: pmic@3c {
compatible = "lltc,ltc3676";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pmic_hw300>;
reg = <0x3c>;
interrupt-parent = <&gpio5>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>;
regulators {
sw1_reg: sw1 {
regulator-min-microvolt = <787500>;
regulator-max-microvolt = <1527272>;
lltc,fb-voltage-divider = <100000 110000>;
regulator-suspend-mem-microvolt = <1040000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
sw2_reg: sw2 {
regulator-min-microvolt = <1885714>;
regulator-max-microvolt = <3657142>;
lltc,fb-voltage-divider = <100000 28000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
sw3_reg: sw3 {
regulator-min-microvolt = <787500>;
regulator-max-microvolt = <1527272>;
lltc,fb-voltage-divider = <100000 110000>;
regulator-suspend-mem-microvolt = <980000>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <855571>;
regulator-max-microvolt = <1659291>;
lltc,fb-voltage-divider = <100000 93100>;
regulator-ramp-delay = <7000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: ldo1 {
regulator-min-microvolt = <3240306>;
regulator-max-microvolt = <3240306>;
lltc,fb-voltage-divider = <102000 29400>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: ldo2 {
regulator-min-microvolt = <2484708>;
regulator-max-microvolt = <2484708>;
lltc,fb-voltage-divider = <100000 41200>;
regulator-boot-on;
regulator-always-on;
};
};
};
touchscreen@49 { /* TSC2004 */
compatible = "ti,tsc2004";
reg = <0x49>;
vio-supply = <&reg_3p3v>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_tsc2004_hw300>;
interrupts-extended = <&gpio4 14 IRQ_TYPE_EDGE_FALLING>;
status = "disabled";
};
eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
pagesize = <16>;
};
rtc@56 {
compatible = "rv3029c2";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rtc_hw300>;
reg = <0x56>;
interrupt-parent = <&gpio7>;
interrupts = <12 2>;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hog_base>;
pinctrl_hog_base: hog-base-grp {
fsl,pins = <
MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x120b0
MX6QDL_PAD_EIM_A23__GPIO6_IO06 0x120b0
MX6QDL_PAD_EIM_A22__GPIO2_IO16 0x120b0
MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x120b0
MX6QDL_PAD_EIM_A17__GPIO2_IO21 0x120b0
>;
};
pinctrl_ecspi1: ecspi1-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1
MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1
MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1
MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x1b0b0
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
>;
};
pinctrl_ecspi2: ecspi2-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x1b0b0
>;
};
pinctrl_enet_100M: enet-100M-grp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0x000b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x000b1
MX6QDL_PAD_GPIO_7__GPIO1_IO07 0x120b0
>;
};
pinctrl_flexcan1: flexcan1-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
>;
};
pinctrl_flexcan2: flexcan2-grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT0__FLEXCAN2_TX 0x1b0b0
MX6QDL_PAD_SD3_DAT1__FLEXCAN2_RX 0x1b0b0
>;
};
pinctrl_i2c1: i2c1-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_i2c3: i2c3-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
>;
};
pinctrl_pmic_hw300: pmic-hw300-grp {
fsl,pins = <
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1B0B0
>;
};
pinctrl_rtc_hw300: rtc-hw300-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x120B0
>;
};
pinctrl_tsc2004_hw300: tsc2004-hw300-grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x120B0
>;
};
pinctrl_uart1: uart1-grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D20__UART1_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D19__UART1_CTS_B 0x4001b0b1
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x4001b0b1
MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x4001b0b1
MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x4001b0b1
MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x4001b0b1
>;
};
pinctrl_uart4: uart4-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
>;
};
pinctrl_uart5: uart5-grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
MX6QDL_PAD_CSI0_DAT18__UART5_RTS_B 0x1b0b1
MX6QDL_PAD_CSI0_DAT19__UART5_CTS_B 0x4001b0b1
>;
};
pinctrl_usbh1: usbh1-grp {
fsl,pins = <
MX6QDL_PAD_EIM_D31__GPIO3_IO31 0x120B0
>;
};
pinctrl_usbotg: usbotg-grp {
fsl,pins = <
MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
>;
};
pinctrl_usdhc2: usdhc2-grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x120B0
>;
};
pinctrl_usdhc3: usdhc3-grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x120B0
>;
};
pinctrl_usdhc4: usdhc4-grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
};
&reg_arm {
vin-supply = <&sw3_reg>;
};
&reg_soc {
vin-supply = <&sw1_reg>;
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
uart-has-rtscts;
dtr-gpios = <&gpio3 24 GPIO_ACTIVE_LOW>;
dsr-gpios = <&gpio3 25 GPIO_ACTIVE_LOW>;
dcd-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
rng-gpios = <&gpio2 31 GPIO_ACTIVE_LOW>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart4>;
status = "okay";
};
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
uart-has-rtscts;
status = "okay";
};
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
vbus-supply = <&reg_usb_h1_vbus>;
dr_mode = "host";
status = "okay";
};
&usbotg {
vbus-supply = <&reg_usb_otg_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotg>;
disable-over-current;
dr_mode = "otg";
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
cd-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>;
keep-power-in-suspend;
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
cd-gpios = <&gpio7 8 GPIO_ACTIVE_LOW>;
fsl,wp-controller;
keep-power-in-suspend;
status = "disabled";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
non-removable;
bus-width = <8>;
no-1-8-v;
keep-power-in-suspend;
status = "okay";
};

3
arch/arm/boot/dts/imx6q-gk802.dts
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@ -8,6 +8,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "imx6q.dtsi"
/ {
@ -43,7 +44,7 @@
recovery-button {
label = "recovery";
gpios = <&gpio3 16 1>;
linux,code = <0x198>; /* KEY_RESTART */
linux,code = <KEY_RESTART>;
wakeup-source;
};
};

25
arch/arm/boot/dts/imx6q-icore-mipi.dts Normal file
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@ -0,0 +1,25 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (C) 2017 Engicam S.r.l.
* Copyright (C) 2017 Amarula Solutions B.V.
* Author: Jagan Teki <jagan@amarulasolutions.com>
*/
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-icore.dtsi"
/ {
model = "Engicam i.CoreM6 Quad/Dual MIPI Starter Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
};
&hdmi {
ddc-i2c-bus = <&i2c2>;
status = "okay";
};
&usdhc3 {
status = "okay";
};

31
arch/arm/boot/dts/imx6q-icore-ofcap12.dts
View File

@ -48,28 +48,31 @@
/ {
model = "Engicam i.CoreM6 Quad/Dual OpenFrame Capacitive touch 12 Kit";
compatible = "engicam,imx6-icore", "fsl,imx6q";
panel {
compatible = "koe,tx31d200vm0baa";
backlight = <&backlight_lvds>;
port {
panel_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
};
};
};
&ldb {
status = "okay";
lvds-channel@0 {
fsl,data-mapping = "spwg";
fsl,data-width = <18>;
reg = <0>;
status = "okay";
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <46800000>;
hactive = <1280>;
vactive = <480>;
hback-porch = <353>;
hfront-porch = <47>;
vback-porch = <39>;
vfront-porch = <4>;
hsync-len = <8>;
vsync-len = <2>;
port@4 {
reg = <4>;
lvds0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};

22
arch/arm/boot/dts/imx6q-kp-tpc.dts Normal file
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@ -0,0 +1,22 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
/dts-v1/;
#include "imx6q-kp.dtsi"
/ {
model = "Freescale i.MX6 Qwuad K+P TPC Board";
compatible = "kiebackpeter,imx6q-tpc", "fsl,imx6q";
memory@10000000 {
reg = <0x10000000 0x40000000>;
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&lcd_display_in>;
};

432
arch/arm/boot/dts/imx6q-kp.dtsi Normal file
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@ -0,0 +1,432 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright 2018
* Lukasz Majewski, DENX Software Engineering, lukma@denx.de
*/
/dts-v1/;
#include "imx6q.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pwm/pwm.h>
#include <dt-bindings/sound/fsl-imx-audmux.h>
/ {
backlight_lcd: backlight-lcd {
compatible = "pwm-backlight";
pwms = <&pwm1 0 5000000>;
brightness-levels = <0 255>;
num-interpolated-steps = <255>;
default-brightness-level = <250>;
};
beeper {
compatible = "pwm-beeper";
pwms = <&pwm2 0 500000>;
};
lcd_display: display {
compatible = "fsl,imx-parallel-display";
#address-cells = <1>;
#size-cells = <0>;
interface-pix-fmt = "rgb24";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;
port@0 {
reg = <0>;
lcd_display_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
lcd_display_out: endpoint {
remote-endpoint = <&lcd_panel_in>;
};
};
};
lcd_panel: lcd-panel {
compatible = "auo,g070vvn01";
backlight = <&backlight_lcd>;
power-supply = <&reg_display>;
port {
lcd_panel_in: endpoint {
remote-endpoint = <&lcd_display_out>;
};
};
};
leds {
compatible = "gpio-leds";
green {
label = "led1";
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
red {
label = "led0";
gpios = <&gpio3 23 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "3P3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_audio: regulator-audio {
compatible = "regulator-fixed";
regulator-name = "sgtl5000-supply";
gpio = <&gpio6 31 GPIO_ACTIVE_HIGH>;
enable-active-high;
regulator-always-on;
};
reg_display: regulator-display {
compatible = "regulator-fixed";
regulator-name = "display-supply";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
reg_usb_h1_vbus: regulator-usb_h1_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_h1_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
enable-active-high;
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "imx6q-sgtl5000-audio";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&codec_dai>;
simple-audio-card,frame-master = <&codec_dai>;
cpu_dai: simple-audio-card,cpu {
sound-dai = <&ssi1>;
};
codec_dai: simple-audio-card,codec {
sound-dai = <&sgtl5000>;
};
};
};
&audmux {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_audmux>;
status = "okay";
ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSEL(2) |
IMX_AUDMUX_V2_PTCR_TCSEL(2) |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR)
IMX_AUDMUX_V2_PDCR_RXDSEL(2)
>;
};
aud3 {
fsl,audmux-port = <2>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(0)
>;
};
};
&can1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan1>;
};
&can2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flexcan2>;
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
phy-mode = "rgmii";
fsl,magic-packet;
status = "okay";
};
&i2c1 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c1>;
status = "okay";
touchscreen@5d {
compatible = "goodix,gt911";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ts>;
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>;
irq-gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
reset-gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>;
};
ds1307: rtc@32 {
compatible = "dallas,ds1307";
reg = <0x32>;
};
};
&i2c2 {
clock-frequency = <400000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
sgtl5000: audio-codec@a {
compatible = "fsl,sgtl5000";
#sound-dai-cells = <0>;
reg = <0x0a>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_codec>;
clocks = <&clks IMX6QDL_CLK_CKO>;
VDDA-supply = <&reg_3p3v>;
VDDIO-supply = <&reg_3p3v>;
};
};
&iomuxc {
pinctrl_audmux: audmuxgrp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT7__AUD3_RXD 0x130b0
MX6QDL_PAD_CSI0_DAT4__AUD3_TXC 0x130b0
MX6QDL_PAD_CSI0_DAT5__AUD3_TXD 0x110b0
MX6QDL_PAD_CSI0_DAT6__AUD3_TXFS 0x130b0
>;
};
pinctrl_codec: codecgrp {
fsl,pins = <
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0x1b0b0
/* sgtl5000 sys_mclk clock routed to CLKO1 */
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x000b0
>;
};
pinctrl_enet: enetgrp {
fsl,pins = <
MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
>;
};
pinctrl_flexcan1: can1grp {
fsl,pins = <
MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b0
MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b0
>;
};
pinctrl_flexcan2: can2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x1b0b0
MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x1b0b0
>;
};
pinctrl_i2c1: i2c1grp {
fsl,pins = <
MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
>;
};
pinctrl_ipu1: ipu1grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
>;
};
pinctrl_pwm1: pwm1grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT3__PWM1_OUT 0x1b0b1
>;
};
pinctrl_pwm2: pwm2grp {
fsl,pins = <
MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
>;
};
pinctrl_ts: tsgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x1b0b0
MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x1b0b0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1
>;
};
pinctrl_uart2: uart2grp {
fsl,pins = <
MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D28__UART2_CTS_B 0x1b0b1
MX6QDL_PAD_EIM_D29__UART2_RTS_B 0x1b0b1
>;
};
pinctrl_usdhc2: usdhc2grp {
fsl,pins = <
MX6QDL_PAD_SD2_CMD__SD2_CMD 0x17059
MX6QDL_PAD_SD2_CLK__SD2_CLK 0x10059
MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
>;
};
};
&pwm1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm1>;
status = "okay";
};
&pwm2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm2>;
status = "okay";
};
&ssi1 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart2>;
uart-has-rtscts;
};
&usbh1 {
status = "okay";
};
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
bus-width = <4>;
cd-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
status = "okay";
};
&usdhc4 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc4>;
bus-width = <8>;
non-removable;
no-1-8-v;
keep-power-in-suspend;
status = "okay";
};
&wdog1 {
status = "okay";
};

2
arch/arm/boot/dts/imx6q-novena.dts
View File

@ -268,8 +268,6 @@
touch: stmpe811@44 {
compatible = "st,stmpe811";
reg = <0x44>;
#address-cells = <1>;
#size-cells = <0>;
irq-gpio = <&gpio5 13 GPIO_ACTIVE_HIGH>;
id = <0>;
blocks = <0x5>;

2
arch/arm/boot/dts/imx6q-pistachio.dts
View File

@ -614,7 +614,7 @@
&uart5 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart5>;
fsl,uart-has-rtscts;
uart-has-rtscts;
status = "okay";
};

15
arch/arm/boot/dts/imx6q-sabreauto.dts
View File

@ -1,14 +1,7 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;

15
arch/arm/boot/dts/imx6q-sabresd.dts
View File

@ -1,14 +1,7 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
/dts-v1/;

6
arch/arm/boot/dts/imx6q-udoo.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6q.dtsi"

2
arch/arm/boot/dts/imx6q-utilite-pro.dts
View File

@ -61,8 +61,6 @@
encoder {
compatible = "ti,tfp410";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;

2
arch/arm/boot/dts/imx6q-var-dt6customboard.dts
View File

@ -26,8 +26,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat;
back {

6
arch/arm/boot/dts/imx6q-wandboard-revb1.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6q.dtsi"

6
arch/arm/boot/dts/imx6q-wandboard-revd1.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6q.dtsi"

6
arch/arm/boot/dts/imx6q-wandboard.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6q.dtsi"

39
arch/arm/boot/dts/imx6q.dtsi
View File

@ -1,12 +1,6 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2013 Freescale Semiconductor, Inc.
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6q-pinfunc.h"
@ -162,22 +156,27 @@
#size-cells = <0>;
reg = <2>;
ipu2_di0_disp0: disp0-endpoint {
ipu2_di0_disp0: endpoint@0 {
reg = <0>;
};
ipu2_di0_hdmi: hdmi-endpoint {
ipu2_di0_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_mux_2>;
};
ipu2_di0_mipi: mipi-endpoint {
ipu2_di0_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_mux_2>;
};
ipu2_di0_lvds0: lvds0-endpoint {
ipu2_di0_lvds0: endpoint@3 {
reg = <3>;
remote-endpoint = <&lvds0_mux_2>;
};
ipu2_di0_lvds1: lvds1-endpoint {
ipu2_di0_lvds1: endpoint@4 {
reg = <4>;
remote-endpoint = <&lvds1_mux_2>;
};
};
@ -187,19 +186,23 @@
#size-cells = <0>;
reg = <3>;
ipu2_di1_hdmi: hdmi-endpoint {
ipu2_di1_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_mux_3>;
};
ipu2_di1_mipi: mipi-endpoint {
ipu2_di1_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_mux_3>;
};
ipu2_di1_lvds0: lvds0-endpoint {
ipu2_di1_lvds0: endpoint@3 {
reg = <3>;
remote-endpoint = <&lvds0_mux_3>;
};
ipu2_di1_lvds1: lvds1-endpoint {
ipu2_di1_lvds1: endpoint@4 {
reg = <4>;
remote-endpoint = <&lvds1_mux_3>;
};
};

2
arch/arm/boot/dts/imx6qdl-apalis.dtsi
View File

@ -331,8 +331,6 @@
compatible = "st,stmpe811";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touch_int>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio4>;

2
arch/arm/boot/dts/imx6qdl-colibri.dtsi
View File

@ -262,8 +262,6 @@
compatible = "st,stmpe811";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_touch_int>;
#address-cells = <1>;
#size-cells = <0>;
reg = <0x41>;
interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
interrupt-parent = <&gpio6>;

2
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
View File

@ -162,8 +162,6 @@
switch@0 {
compatible = "marvell,mv88e6085";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
ports {

52
arch/arm/boot/dts/imx6qdl-hummingboard.dtsi
View File

@ -38,6 +38,7 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/sound/fsl-imx-audmux.h>
/ {
/* Will be filled by the bootloader */
@ -110,17 +111,27 @@
vin-supply = <&v_5v0>;
};
sound-sgtl5000 {
audio-codec = <&sgtl5000>;
audio-routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
audio: sound-sgtl5000 {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board Codec";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_codec>;
simple-audio-card,frame-master = <&sound_codec>;
simple-audio-card,widgets =
"Microphone", "Headphone Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"MIC_IN", "Headphone Jack",
"Headphone Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
compatible = "fsl,imx-audio-sgtl5000";
model = "On-board Codec";
mux-ext-port = <5>;
mux-int-port = <1>;
ssi-controller = <&ssi1>;
sound_cpu: simple-audio-card,cpu {
sound-dai = <&ssi1>;
};
sound_codec: simple-audio-card,codec {
sound-dai = <&sgtl5000>;
};
};
sound-spdif {
@ -134,6 +145,26 @@
&audmux {
status = "okay";
ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSEL(4) |
IMX_AUDMUX_V2_PTCR_TCSEL(4) |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR)
IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(0)
>;
};
};
&can1 {
@ -166,6 +197,7 @@
compatible = "fsl,sgtl5000";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_sgtl5000>;
#sound-dai-cells = <0>;
reg = <0x0a>;
VDDA-supply = <&v_3v2>;
VDDIO-supply = <&v_3v2>;

47
arch/arm/boot/dts/imx6qdl-hummingboard2.dtsi
View File

@ -38,6 +38,7 @@
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
#include <dt-bindings/sound/fsl-imx-audmux.h>
/ {
/* Will be filled by the bootloader */
@ -150,22 +151,52 @@
vin-supply = <&v_5v0>;
};
sound-sgtl5000 {
audio-codec = <&sgtl5000>;
audio-routing =
audio: sound-sgtl5000 {
compatible = "simple-audio-card";
simple-audio-card,name = "On-board Codec";
simple-audio-card,format = "i2s";
simple-audio-card,bitclock-master = <&sound_codec>;
simple-audio-card,frame-master = <&sound_codec>;
simple-audio-card,widgets =
"Microphone", "Mic Jack",
"Headphone", "Headphone Jack";
simple-audio-card,routing =
"MIC_IN", "Mic Jack",
"Mic Jack", "Mic Bias",
"Headphone Jack", "HP_OUT";
compatible = "fsl,imx-audio-sgtl5000";
model = "On-board Codec";
mux-ext-port = <5>;
mux-int-port = <1>;
ssi-controller = <&ssi1>;
sound_cpu: simple-audio-card,cpu {
sound-dai = <&ssi1>;
};
sound_codec: simple-audio-card,codec {
sound-dai = <&sgtl5000>;
};
};
};
&audmux {
status = "okay";
ssi1 {
fsl,audmux-port = <0>;
fsl,port-config = <
(IMX_AUDMUX_V2_PTCR_SYN |
IMX_AUDMUX_V2_PTCR_TFSEL(4) |
IMX_AUDMUX_V2_PTCR_TCSEL(4) |
IMX_AUDMUX_V2_PTCR_TFSDIR |
IMX_AUDMUX_V2_PTCR_TCLKDIR)
IMX_AUDMUX_V2_PDCR_RXDSEL(4)
>;
};
pins5 {
fsl,audmux-port = <4>;
fsl,port-config = <
IMX_AUDMUX_V2_PTCR_SYN
IMX_AUDMUX_V2_PDCR_RXDSEL(0)
>;
};
};
&ecspi2 {

25
arch/arm/boot/dts/imx6qdl-icore.dtsi
View File

@ -49,7 +49,7 @@
reg = <0x10000000 0x80000000>;
};
backlight {
backlight_lvds: backlight-lvds {
compatible = "pwm-backlight";
pwms = <&pwm3 0 100000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
@ -265,6 +265,14 @@
status = "okay";
};
&usdhc3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc3>;
no-1-8-v;
non-removable;
status = "disabled";
};
&iomuxc {
pinctrl_audmux: audmux {
fsl,pins = <
@ -378,4 +386,19 @@
MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17070
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
>;
};
};

2
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View File

@ -115,7 +115,7 @@
compatible = "dlg,da9063";
reg = <0x58>;
interrupt-parent = <&gpio2>;
interrupts = <9 0x8>; /* active-low GPIO2_9 */
interrupts = <9 IRQ_TYPE_LEVEL_LOW>; /* active-low GPIO2_9 */
regulators {
vddcore_reg: bcore1 {

15
arch/arm/boot/dts/imx6qdl-sabreauto.dtsi
View File

@ -1,14 +1,7 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
#include <dt-bindings/gpio/gpio.h>

3
arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
View File

@ -379,9 +379,6 @@
powerdown-gpios = <&gpio6 9 GPIO_ACTIVE_HIGH>; /* NANDF_WP_B */
port {
#address-cells = <1>;
#size-cells = <0>;
ov5640_to_mipi_csi2: endpoint {
remote-endpoint = <&mipi_csi2_in>;
clock-lanes = <0>;

18
arch/arm/boot/dts/imx6qdl-sabresd.dtsi
View File

@ -1,14 +1,7 @@
/*
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2012 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/gpio/gpio.h>
@ -294,9 +287,6 @@
reset-gpios = <&gpio1 20 GPIO_ACTIVE_LOW>;
port {
#address-cells = <1>;
#size-cells = <0>;
ov5640_to_mipi_csi2: endpoint {
remote-endpoint = <&mipi_csi2_in>;
clock-lanes = <0>;

1
arch/arm/boot/dts/imx6qdl-tx6-lcd.dtsi
View File

@ -77,7 +77,6 @@
enable-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
power-supply = <&reg_3v3>;
backlight = <&backlight>;
bus-format-override = "rgb24";
port {
lcd_panel_in: endpoint {

3
arch/arm/boot/dts/imx6qdl-tx6-mb7.dtsi
View File

@ -54,19 +54,16 @@
lcd-panel {
compatible = "edt,et057090dhu";
bus-format-override = "rgb24";
pixelclk-active = <0>;
};
lvds0-panel {
compatible = "edt,etml1010g0dka";
bus-format-override = "spwg-18";
pixelclk-active = <0>;
};
lvds1-panel {
compatible = "edt,etml1010g0dka";
bus-format-override = "spwg-18";
pixelclk-active = <0>;
};
};

6
arch/arm/boot/dts/imx6qdl-tx6.dtsi
View File

@ -50,11 +50,11 @@
can0 = &can2;
can1 = &can1;
ethernet0 = &fec;
lcdif_23bit_pins_a = &pinctrl_disp0_1;
lcdif_24bit_pins_a = &pinctrl_disp0_2;
lcdif-23bit-pins-a = &pinctrl_disp0_1;
lcdif-24bit-pins-a = &pinctrl_disp0_2;
pwm0 = &pwm1;
pwm1 = &pwm2;
reg_can_xcvr = &reg_can_xcvr;
reg-can-xcvr = &reg_can_xcvr;
stk5led = &user_led;
usbotg = &usbotg;
sdhc0 = &usdhc1;

6
arch/arm/boot/dts/imx6qdl-udoo.dtsi
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/ {

1
arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
View File

@ -17,7 +17,6 @@
imx6qdl-wandboard {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* GPIO_0_CLKO */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
MX6QDL_PAD_EIM_EB1__GPIO2_IO29 0x0f0b0 /* WL_REF_ON */

1
arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
View File

@ -17,7 +17,6 @@
imx6qdl-wandboard {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* GPIO_0_CLKO */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* uSDHC1 CD */
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x0f0b0 /* WIFI_ON (reset, active low) */

1
arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
View File

@ -147,7 +147,6 @@
imx6qdl-wandboard {
pinctrl_hog: hoggrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
MX6QDL_PAD_EIM_D22__USB_OTG_PWR 0x80000000 /* USB Power Enable */
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* USDHC1 CD */
MX6QDL_PAD_EIM_DA9__GPIO3_IO09 0x80000000 /* uSDHC3 CD */

14
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <dt-bindings/gpio/gpio.h>
@ -83,6 +79,8 @@
status = "okay";
codec: sgtl5000@a {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mclk>;
compatible = "fsl,sgtl5000";
reg = <0x0a>;
clocks = <&clks IMX6QDL_CLK_CKO>;
@ -142,6 +140,12 @@
>;
};
pinctrl_mclk: mclkgrp {
fsl,pins = <
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
>;
};
pinctrl_spdif: spdifgrp {
fsl,pins = <
MX6QDL_PAD_ENET_RXD0__SPDIF_OUT 0x1b0b0

24
arch/arm/boot/dts/imx6qdl-zii-rdu2.dtsi
View File

@ -263,6 +263,17 @@
};
};
&cpu0 {
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */
1200000 1300000
996000 1275000
852000 1275000
792000 1200000
396000 1200000
>;
};
&reg_arm {
vin-supply = <&sw1a_reg>;
};
@ -571,6 +582,17 @@
};
};
touchscreen@2a {
compatible = "eeti,egalax_ts";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ts>;
reg = <0x2a>;
interrupt-parent = <&gpio1>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
wakeup-gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
status = "disabled";
};
hpa1: amp@60 {
compatible = "ti,tpa6130a2";
pinctrl-names = "default";
@ -666,8 +688,6 @@
compatible = "marvell,mv88e6085";
pinctrl-0 = <&pinctrl_switch_irq>;
pinctrl-names = "default";
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsa,member = <0 0>;
eeprom-length = <512>;

70
arch/arm/boot/dts/imx6qdl.dtsi
View File

@ -1,14 +1,7 @@
/*
* Copyright 2011 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
// SPDX-License-Identifier: GPL-2.0+
//
// Copyright 2011 Freescale Semiconductor, Inc.
// Copyright 2011 Linaro Ltd.
#include <dt-bindings/clock/imx6qdl-clock.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -58,9 +51,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fsl,imx-ckil", "fixed-clock";
#clock-cells = <0>;
@ -695,11 +685,8 @@
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
<0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
regulator-1p1@20c8110 {
reg = <0x20c8110>;
regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <1000000>;
@ -714,8 +701,7 @@
anatop-enable-bit = <0>;
};
regulator-3p0@20c8120 {
reg = <0x20c8120>;
regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>;
@ -730,8 +716,7 @@
anatop-enable-bit = <0>;
};
regulator-2p5@20c8130 {
reg = <0x20c8130>;
regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2250000>;
@ -746,8 +731,7 @@
anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
reg_arm: regulator-vddcore {
compatible = "fsl,anatop-regulator";
regulator-name = "vddarm";
regulator-min-microvolt = <725000>;
@ -764,8 +748,7 @@
anatop-max-voltage = <1450000>;
};
reg_pu: regulator-vddpu@20c8140 {
reg = <0x20c8140>;
reg_pu: regulator-vddpu {
compatible = "fsl,anatop-regulator";
regulator-name = "vddpu";
regulator-min-microvolt = <725000>;
@ -782,8 +765,7 @@
anatop-max-voltage = <1450000>;
};
reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
reg_soc: regulator-vddsoc {
compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc";
regulator-min-microvolt = <725000>;
@ -1187,8 +1169,6 @@
};
mipi_dsi: mipi@21e0000 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0x021e0000 0x4000>;
status = "disabled";
@ -1300,22 +1280,27 @@
#size-cells = <0>;
reg = <2>;
ipu1_di0_disp0: disp0-endpoint {
ipu1_di0_disp0: endpoint@0 {
reg = <0>;
};
ipu1_di0_hdmi: hdmi-endpoint {
ipu1_di0_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_mux_0>;
};
ipu1_di0_mipi: mipi-endpoint {
ipu1_di0_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_mux_0>;
};
ipu1_di0_lvds0: lvds0-endpoint {
ipu1_di0_lvds0: endpoint@3 {
reg = <3>;
remote-endpoint = <&lvds0_mux_0>;
};
ipu1_di0_lvds1: lvds1-endpoint {
ipu1_di0_lvds1: endpoint@4 {
reg = <4>;
remote-endpoint = <&lvds1_mux_0>;
};
};
@ -1325,22 +1310,27 @@
#size-cells = <0>;
reg = <3>;
ipu1_di1_disp1: disp1-endpoint {
ipu1_di1_disp1: endpoint@0 {
reg = <0>;
};
ipu1_di1_hdmi: hdmi-endpoint {
ipu1_di1_hdmi: endpoint@1 {
reg = <1>;
remote-endpoint = <&hdmi_mux_1>;
};
ipu1_di1_mipi: mipi-endpoint {
ipu1_di1_mipi: endpoint@2 {
reg = <2>;
remote-endpoint = <&mipi_mux_1>;
};
ipu1_di1_lvds0: lvds0-endpoint {
ipu1_di1_lvds0: endpoint@3 {
reg = <3>;
remote-endpoint = <&lvds0_mux_1>;
};
ipu1_di1_lvds1: lvds1-endpoint {
ipu1_di1_lvds1: endpoint@4 {
reg = <4>;
remote-endpoint = <&lvds1_mux_1>;
};
};

44
arch/arm/boot/dts/imx6qp-sabreauto.dts
View File

@ -1,44 +1,6 @@
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.
/dts-v1/;

44
arch/arm/boot/dts/imx6qp-sabresd.dts
View File

@ -1,44 +1,6 @@
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.
/dts-v1/;

6
arch/arm/boot/dts/imx6qp-wandboard-revd1.dts
View File

@ -1,12 +1,8 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
/dts-v1/;
#include "imx6qp.dtsi"

5
arch/arm/boot/dts/imx6qp-zii-rdu2.dts
View File

@ -53,3 +53,8 @@
reg = <0x10000000 0>;
};
};
&gpu_3d {
assigned-clocks = <&clks IMX6QDL_CLK_GPU3D_SHADER_SEL>;
assigned-clock-parents = <&clks IMX6QDL_CLK_PLL2_PFD1_594M>;
};

44
arch/arm/boot/dts/imx6qp.dtsi
View File

@ -1,44 +1,6 @@
/*
* Copyright 2016 Freescale Semiconductor, Inc.
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.
#include "imx6q.dtsi"

10
arch/arm/boot/dts/imx6sl-evk.dts
View File

@ -1,10 +1,6 @@
/*
* Copyright (C) 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
//Copyright (C) 2013 Freescale Semiconductor, Inc.
/dts-v1/;

34
arch/arm/boot/dts/imx6sl.dtsi
View File

@ -1,11 +1,6 @@
/*
* Copyright 2013 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2013 Freescale Semiconductor, Inc.
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6sl-pinfunc.h"
@ -86,9 +81,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil {
compatible = "fixed-clock";
#clock-cells = <0>;
@ -527,11 +519,8 @@
interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
<0 54 IRQ_TYPE_LEVEL_HIGH>,
<0 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
regulator-1p1@20c8110 {
reg = <0x20c8110>;
regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <800000>;
@ -546,8 +535,7 @@
anatop-enable-bit = <0>;
};
regulator-3p0@20c8120 {
reg = <0x20c8120>;
regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>;
@ -562,8 +550,7 @@
anatop-enable-bit = <0>;
};
regulator-2p5@20c8130 {
reg = <0x20c8130>;
regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2100000>;
@ -578,8 +565,7 @@
anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
reg_arm: regulator-vddcore {
compatible = "fsl,anatop-regulator";
regulator-name = "vddarm";
regulator-min-microvolt = <725000>;
@ -596,8 +582,7 @@
anatop-max-voltage = <1450000>;
};
reg_pu: regulator-vddpu@20c8140 {
reg = <0x20c8140>;
reg_pu: regulator-vddpu {
compatible = "fsl,anatop-regulator";
regulator-name = "vddpu";
regulator-min-microvolt = <725000>;
@ -614,8 +599,7 @@
anatop-max-voltage = <1450000>;
};
reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
reg_soc: regulator-vddsoc {
compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc";
regulator-min-microvolt = <725000>;

4
arch/arm/boot/dts/imx6sx-nitrogen6sx.dts
View File

@ -48,8 +48,8 @@
compatible = "boundary,imx6sx-nitrogen6sx", "fsl,imx6sx";
aliases {
fb_lcd = &lcdif1;
t_lcd = &t_lcd;
fb-lcd = &lcdif1;
t-lcd = &t_lcd;
};
memory@80000000 {

429
arch/arm/boot/dts/imx6sx-sabreauto.dts
View File

@ -1,10 +1,6 @@
/*
* Copyright (C) 2014 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2014 Freescale Semiconductor, Inc.
/dts-v1/;
@ -18,25 +14,67 @@
reg = <0x80000000 0x80000000>;
};
regulators {
compatible = "simple-bus";
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led>;
user {
label = "debug";
gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
};
};
vcc_sd3: regulator-vcc-sd3 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_sd3>;
regulator-name = "VCC_SD3";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&anaclk2 {
clock-frequency = <24576000>;
};
&fec1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet1>;
phy-mode = "rgmii";
phy-handle = <&ethphy1>;
fsl,magic-packet;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
vcc_sd3: regulator@0 {
compatible = "regulator-fixed";
ethphy0: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_vcc_sd3>;
regulator-name = "VCC_SD3";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
ethphy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
};
&fec2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet2>;
phy-mode = "rgmii";
phy-handle = <&ethphy0>;
fsl,magic-packet;
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
@ -69,78 +107,297 @@
};
&iomuxc {
imx6x-sabreauto {
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
>;
};
pinctrl_egalax_int: egalax-intgrp {
fsl,pins = <
MX6SX_PAD_SD4_RESET_B__GPIO6_IO_22 0x10b0
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
>;
};
pinctrl_enet1: enet1grp {
fsl,pins = <
MX6SX_PAD_ENET1_MDIO__ENET1_MDIO 0xa0b1
MX6SX_PAD_ENET1_MDC__ENET1_MDC 0xa0b1
MX6SX_PAD_RGMII1_TXC__ENET1_RGMII_TXC 0xa0b9
MX6SX_PAD_RGMII1_TD0__ENET1_TX_DATA_0 0xa0b1
MX6SX_PAD_RGMII1_TD1__ENET1_TX_DATA_1 0xa0b1
MX6SX_PAD_RGMII1_TD2__ENET1_TX_DATA_2 0xa0b1
MX6SX_PAD_RGMII1_TD3__ENET1_TX_DATA_3 0xa0b1
MX6SX_PAD_RGMII1_TX_CTL__ENET1_TX_EN 0xa0b1
MX6SX_PAD_RGMII1_RXC__ENET1_RX_CLK 0x3081
MX6SX_PAD_RGMII1_RD0__ENET1_RX_DATA_0 0x3081
MX6SX_PAD_RGMII1_RD1__ENET1_RX_DATA_1 0x3081
MX6SX_PAD_RGMII1_RD2__ENET1_RX_DATA_2 0x3081
MX6SX_PAD_RGMII1_RD3__ENET1_RX_DATA_3 0x3081
MX6SX_PAD_RGMII1_RX_CTL__ENET1_RX_EN 0x3081
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
>;
};
pinctrl_enet2: enet2grp {
fsl,pins = <
MX6SX_PAD_RGMII2_TXC__ENET2_RGMII_TXC 0xa0b9
MX6SX_PAD_RGMII2_TD0__ENET2_TX_DATA_0 0xa0b1
MX6SX_PAD_RGMII2_TD1__ENET2_TX_DATA_1 0xa0b1
MX6SX_PAD_RGMII2_TD2__ENET2_TX_DATA_2 0xa0b1
MX6SX_PAD_RGMII2_TD3__ENET2_TX_DATA_3 0xa0b1
MX6SX_PAD_RGMII2_TX_CTL__ENET2_TX_EN 0xa0b1
MX6SX_PAD_RGMII2_RXC__ENET2_RX_CLK 0x3081
MX6SX_PAD_RGMII2_RD0__ENET2_RX_DATA_0 0x3081
MX6SX_PAD_RGMII2_RD1__ENET2_RX_DATA_1 0x3081
MX6SX_PAD_RGMII2_RD2__ENET2_RX_DATA_2 0x3081
MX6SX_PAD_RGMII2_RD3__ENET2_RX_DATA_3 0x3081
MX6SX_PAD_RGMII2_RX_CTL__ENET2_RX_EN 0x3081
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
>;
};
pinctrl_i2c2: i2c2grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO03__I2C2_SDA 0x4001b8b1
MX6SX_PAD_GPIO1_IO02__I2C2_SCL 0x4001b8b1
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
>;
};
pinctrl_i2c3: i2c3grp {
fsl,pins = <
MX6SX_PAD_KEY_ROW4__I2C3_SDA 0x4001b8b1
MX6SX_PAD_KEY_COL4__I2C3_SCL 0x4001b8b1
>;
};
pinctrl_vcc_sd3: vccsd3grp {
fsl,pins = <
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
>;
};
pinctrl_led: ledgrp {
fsl,pins = <
MX6SX_PAD_CSI_PIXCLK__GPIO1_IO_24 0x17059
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO04__UART1_TX 0x1b0b1
MX6SX_PAD_GPIO1_IO05__UART1_RX 0x1b0b1
>;
};
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x17059
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x10059
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x17059
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x17059
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x17059
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x17059
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x17059
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x17059
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x17059
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x17059
MX6SX_PAD_KEY_COL0__GPIO2_IO_10 0x17059 /* CD */
MX6SX_PAD_KEY_ROW0__GPIO2_IO_15 0x17059 /* WP */
>;
};
pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170b9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100b9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170b9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170b9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170b9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170b9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170b9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170b9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170b9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170b9
>;
};
pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
fsl,pins = <
MX6SX_PAD_SD3_CMD__USDHC3_CMD 0x170f9
MX6SX_PAD_SD3_CLK__USDHC3_CLK 0x100f9
MX6SX_PAD_SD3_DATA0__USDHC3_DATA0 0x170f9
MX6SX_PAD_SD3_DATA1__USDHC3_DATA1 0x170f9
MX6SX_PAD_SD3_DATA2__USDHC3_DATA2 0x170f9
MX6SX_PAD_SD3_DATA3__USDHC3_DATA3 0x170f9
MX6SX_PAD_SD3_DATA4__USDHC3_DATA4 0x170f9
MX6SX_PAD_SD3_DATA5__USDHC3_DATA5 0x170f9
MX6SX_PAD_SD3_DATA6__USDHC3_DATA6 0x170f9
MX6SX_PAD_SD3_DATA7__USDHC3_DATA7 0x170f9
>;
};
pinctrl_usdhc4: usdhc4grp {
fsl,pins = <
MX6SX_PAD_SD4_CMD__USDHC4_CMD 0x17059
MX6SX_PAD_SD4_CLK__USDHC4_CLK 0x10059
MX6SX_PAD_SD4_DATA0__USDHC4_DATA0 0x17059
MX6SX_PAD_SD4_DATA1__USDHC4_DATA1 0x17059
MX6SX_PAD_SD4_DATA2__USDHC4_DATA2 0x17059
MX6SX_PAD_SD4_DATA3__USDHC4_DATA3 0x17059
MX6SX_PAD_SD4_DATA7__GPIO6_IO_21 0x17059 /* CD */
MX6SX_PAD_SD4_DATA6__GPIO6_IO_20 0x17059 /* WP */
>;
};
pinctrl_vcc_sd3: vccsd3grp {
fsl,pins = <
MX6SX_PAD_KEY_COL1__GPIO2_IO_11 0x17059
>;
};
pinctrl_wdog: wdoggrp {
fsl,pins = <
MX6SX_PAD_GPIO1_IO13__WDOG1_WDOG_ANY 0x30b0
>;
};
};
&i2c2 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
touchscreen@4 {
compatible = "eeti,egalax_ts";
reg = <0x04>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_egalax_int>;
interrupt-parent = <&gpio6>;
interrupts = <22 IRQ_TYPE_EDGE_FALLING>;
wakeup-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>;
};
pfuze100: pmic@8 {
compatible = "fsl,pfuze100";
reg = <0x08>;
regulators {
sw1a_reg: sw1ab {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw1c_reg: sw1c {
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1875000>;
regulator-boot-on;
regulator-always-on;
regulator-ramp-delay = <6250>;
};
sw2_reg: sw2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
sw3a_reg: sw3a {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw3b_reg: sw3b {
regulator-min-microvolt = <400000>;
regulator-max-microvolt = <1975000>;
regulator-boot-on;
regulator-always-on;
};
sw4_reg: sw4 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
swbst_reg: swbst {
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5150000>;
};
snvs_reg: vsnvs {
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <3000000>;
regulator-boot-on;
regulator-always-on;
};
vref_reg: vrefddr {
regulator-boot-on;
regulator-always-on;
};
vgen1_reg: vgen1 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
regulator-always-on;
};
vgen2_reg: vgen2 {
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1550000>;
};
vgen3_reg: vgen3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen4_reg: vgen4 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen5_reg: vgen5 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
vgen6_reg: vgen6 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
};
};
};
max7322: gpio@68 {
compatible = "maxim,max7322";
reg = <0x68>;
gpio-controller;
#gpio-cells = <2>;
};
};
&i2c3 {
clock-frequency = <100000>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c3>;
status = "okay";
max7310_a: gpio@30 {
compatible = "maxim,max7310";
reg = <0x30>;
gpio-controller;
#gpio-cells = <2>;
};
max7310_b: gpio@32 {
compatible = "maxim,max7310";
reg = <0x32>;
gpio-controller;
#gpio-cells = <2>;
};
};
&wdog1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdog>;
fsl,ext-reset-output;
};

101
arch/arm/boot/dts/imx6sx.dtsi
View File

@ -1,10 +1,6 @@
/*
* Copyright 2014 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright 2014 Freescale Semiconductor, Inc.
#include <dt-bindings/clock/imx6sx-clock.h>
#include <dt-bindings/gpio/gpio.h>
@ -104,41 +100,46 @@
interrupt-parent = <&intc>;
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
ckil: clock-ckil {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "ckil";
};
ckil: clock@0 {
compatible = "fixed-clock";
reg = <0>;
#clock-cells = <0>;
clock-frequency = <32768>;
clock-output-names = "ckil";
};
osc: clock-osc {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc";
};
osc: clock@1 {
compatible = "fixed-clock";
reg = <1>;
#clock-cells = <0>;
clock-frequency = <24000000>;
clock-output-names = "osc";
};
ipp_di0: clock-ipp-di0 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di0";
};
ipp_di0: clock@2 {
compatible = "fixed-clock";
reg = <2>;
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di0";
};
ipp_di1: clock-ipp-di1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di1";
};
ipp_di1: clock@3 {
compatible = "fixed-clock";
reg = <3>;
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "ipp_di1";
};
anaclk1: clock-anaclk1 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "anaclk1";
};
anaclk2: clock-anaclk2 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
clock-output-names = "anaclk2";
};
tempmon: tempmon {
@ -575,8 +576,8 @@
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
#clock-cells = <1>;
clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>, <&anaclk1>, <&anaclk2>;
clock-names = "ckil", "osc", "ipp_di0", "ipp_di1", "anaclk1", "anaclk2";
};
anatop: anatop@20c8000 {
@ -586,11 +587,8 @@
interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
regulator-1p1@20c8110 {
reg = <0x20c8110>;
regulator-1p1 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd1p1";
regulator-min-microvolt = <800000>;
@ -605,8 +603,7 @@
anatop-enable-bit = <0>;
};
regulator-3p0@20c8120 {
reg = <0x20c8120>;
regulator-3p0 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd3p0";
regulator-min-microvolt = <2800000>;
@ -621,8 +618,7 @@
anatop-enable-bit = <0>;
};
regulator-2p5@20c8130 {
reg = <0x20c8130>;
regulator-2p5 {
compatible = "fsl,anatop-regulator";
regulator-name = "vdd2p5";
regulator-min-microvolt = <2100000>;
@ -637,8 +633,7 @@
anatop-enable-bit = <0>;
};
reg_arm: regulator-vddcore@20c8140 {
reg = <0x20c8140>;
reg_arm: regulator-vddcore {
compatible = "fsl,anatop-regulator";
regulator-name = "vddarm";
regulator-min-microvolt = <725000>;
@ -655,8 +650,7 @@
anatop-max-voltage = <1450000>;
};
reg_pcie: regulator-vddpcie@20c8140 {
reg = <0x20c8140>;
reg_pcie: regulator-vddpcie {
compatible = "fsl,anatop-regulator";
regulator-name = "vddpcie";
regulator-min-microvolt = <725000>;
@ -672,8 +666,7 @@
anatop-max-voltage = <1450000>;
};
reg_soc: regulator-vddsoc@20c8140 {
reg = <0x20c8140>;
reg_soc: regulator-vddsoc {
compatible = "fsl,anatop-regulator";
regulator-name = "vddsoc";
regulator-min-microvolt = <725000>;

10
arch/arm/boot/dts/imx6ul-14x14-evk.dts
View File

@ -1,10 +1,6 @@
/*
* Copyright (C) 2015 Freescale Semiconductor, Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2015 Freescale Semiconductor, Inc.
/dts-v1/;

2
arch/arm/boot/dts/imx6ul-isiot.dtsi
View File

@ -153,8 +153,6 @@
stmpe811: gpio-expander@44 {
compatible = "st,stmpe811";
reg = <0x44>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_stmpe>;
interrupt-parent = <&gpio1>;

2
arch/arm/boot/dts/imx6ul-tx6ul-mainboard.dts
View File

@ -48,7 +48,7 @@
compatible = "karo,imx6ul-tx6ul", "fsl,imx6ul";
aliases {
lcdif_24bit_pins_a = &pinctrl_disp0_3;
lcdif-24bit-pins-a = &pinctrl_disp0_3;
mmc0 = &usdhc1;
/delete-property/ mmc1;
serial2 = &uart3;

6
arch/arm/boot/dts/imx6ul-tx6ul.dtsi
View File

@ -53,10 +53,10 @@
i2c2 = &i2c1;
i2c3 = &i2c3;
i2c4 = &i2c4;
lcdif_23bit_pins_a = &pinctrl_disp0_1;
lcdif_24bit_pins_a = &pinctrl_disp0_2;
lcdif-23bit-pins-a = &pinctrl_disp0_1;
lcdif-24bit-pins-a = &pinctrl_disp0_2;
pwm0 = &pwm5;
reg_can_xcvr = &reg_can_xcvr;
reg-can-xcvr = &reg_can_xcvr;
serial2 = &uart5;
serial4 = &uart3;
spi0 = &ecspi2;

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