MTD updates #2 for 4.3-rc1:
* SPI NOR: bug fix for a "end of table" check that resulted in a NULL dereference in some cases * SPI NOR: a few new IDs / feature flags * OMAP2 NAND: rename module so it doesn't conflict with onenand omap2.ko -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJV8HKLAAoJEFySrpd9RFgtltcP/A3QdKLyGCxTEDBTB6Zd+Nqg AcJa5R+ZSpDW/ZxOYEVrz2mTs9Js0sGC2aAEs4Phul9RLmnU4BLSr8LgTOWdx7en TPY5KdgNSzf2IBYjmDXrFrkEwEPoYpodGShAmpBeNjGURgRGgMMsYn9DzTt5A+nc 98Qp+Zc7bEIONVKr3dqs3E/zmXKA43qZtC6MIvAd3qrrq2GHttN8ySER3qzVhUFF e3N0TABuzGzESoJwZE0Z64PJz3SgGpH4KeFXC25/O69FjeCRg1RzcR1kkeMr8ZtL qUCuphEQZ9yJorE7cRbsRT8liji6Sk9NaCsPcIXQpMxxTRJTd5TylWGI4ubJegNx 0EYToMz0DsxH0uTjWPEFF7ppJy1skwlkrdgjXzHfNNwV0LpT8tyBuD/RfXxoZgvH X5VVDTh0eqVAweFMCSYSbtGUNxlH9YfnFvIaDItqkO+lawDbadj4XP1YfT8pHGwe ASG0XMXiVGfkY6xW+nX6IhduMFUO+fuYbjp10rDzPg+BytCeiwh5kx9GVjpTZf92 VoZgeIXAfROUx3f20jHfouIHCSoidrAK09reJ7pU0hcIwpJEfhg/TCno2zZkfcCZ MNpRjIZc73cqc+c4j3RnV74/hBBnwZqoAHr/RL6oiIYVWrUxJ+pNUPKJifxMGAyo MOXGXCV1jcHBg1hrgTC6 =aXrv -----END PGP SIGNATURE----- Merge tag 'for-linus-20150909' of git://git.infradead.org/linux-mtd Pull more MTD updates from Brian Norris: "There was one significant bug in my first pull request, fixed here. I also threw in a few trivial ID additions and a small module rename. Details: - SPI NOR: bug fix for a "end of table" check that resulted in a NULL dereference in some cases - SPI NOR: a few new IDs / feature flags - OMAP2 NAND: rename module so it doesn't conflict with onenand omap2.ko" * tag 'for-linus-20150909' of git://git.infradead.org/linux-mtd: mtd: spi-nor: fix NULL dereference when no match found in spi_nor_ids[] mtd: spi-nor: s25sl064p supports both dual and quad I/O mtd: spi-nor: allow dual/quad reads on S25FL129P mtd: nand: omap2: Rename shippable module to omap2_nand mtd: spi-nor: Add support for sst25wf020a mtd: spi-nor: Add support for Micron n25q064a serial flash
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commit
fac33bfdb0
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@ -26,7 +26,8 @@ obj-$(CONFIG_MTD_NAND_CS553X) += cs553x_nand.o
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obj-$(CONFIG_MTD_NAND_NDFC) += ndfc.o
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obj-$(CONFIG_MTD_NAND_ATMEL) += atmel_nand.o
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obj-$(CONFIG_MTD_NAND_GPIO) += gpio.o
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obj-$(CONFIG_MTD_NAND_OMAP2) += omap2.o
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omap2_nand-objs := omap2.o
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obj-$(CONFIG_MTD_NAND_OMAP2) += omap2_nand.o
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obj-$(CONFIG_MTD_NAND_OMAP_BCH_BUILD) += omap_elm.o
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obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o
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obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o
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@ -586,6 +586,7 @@ static const struct flash_info spi_nor_ids[] = {
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/* Micron */
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{ "n25q032", INFO(0x20ba16, 0, 64 * 1024, 64, SPI_NOR_QUAD_READ) },
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{ "n25q064", INFO(0x20ba17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) },
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{ "n25q064a", INFO(0x20bb17, 0, 64 * 1024, 128, SECT_4K | SPI_NOR_QUAD_READ) },
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{ "n25q128a11", INFO(0x20bb18, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ) },
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{ "n25q128a13", INFO(0x20ba18, 0, 64 * 1024, 256, SPI_NOR_QUAD_READ) },
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{ "n25q256a", INFO(0x20ba19, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_QUAD_READ) },
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@ -602,7 +603,7 @@ static const struct flash_info spi_nor_ids[] = {
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* for the chips listed here (without boot sectors).
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*/
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{ "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, 0) },
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{ "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) },
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{ "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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@ -610,8 +611,8 @@ static const struct flash_info spi_nor_ids[] = {
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{ "s25sl12800", INFO(0x012018, 0x0300, 256 * 1024, 64, 0) },
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{ "s25sl12801", INFO(0x012018, 0x0301, 64 * 1024, 256, 0) },
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{ "s25fl128s", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, SECT_4K | SPI_NOR_QUAD_READ) },
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{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, 0) },
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{ "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, 0) },
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{ "s25fl129p0", INFO(0x012018, 0x4d00, 256 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25fl129p1", INFO(0x012018, 0x4d01, 64 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) },
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{ "s25sl004a", INFO(0x010212, 0, 64 * 1024, 8, 0) },
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{ "s25sl008a", INFO(0x010213, 0, 64 * 1024, 16, 0) },
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{ "s25sl016a", INFO(0x010214, 0, 64 * 1024, 32, 0) },
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@ -633,6 +634,7 @@ static const struct flash_info spi_nor_ids[] = {
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{ "sst25wf512", INFO(0xbf2501, 0, 64 * 1024, 1, SECT_4K | SST_WRITE) },
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{ "sst25wf010", INFO(0xbf2502, 0, 64 * 1024, 2, SECT_4K | SST_WRITE) },
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{ "sst25wf020", INFO(0xbf2503, 0, 64 * 1024, 4, SECT_4K | SST_WRITE) },
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{ "sst25wf020a", INFO(0x621612, 0, 64 * 1024, 4, SECT_4K) },
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{ "sst25wf040", INFO(0xbf2504, 0, 64 * 1024, 8, SECT_4K | SST_WRITE) },
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{ "sst25wf080", INFO(0xbf2505, 0, 64 * 1024, 16, SECT_4K | SST_WRITE) },
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@ -1216,7 +1218,7 @@ static const struct flash_info *spi_nor_match_id(const char *name)
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{
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const struct flash_info *id = spi_nor_ids;
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while (id->name[0]) {
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while (id->name) {
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if (!strcmp(name, id->name))
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return id;
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id++;
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