diff --git a/drivers/staging/mt7621-dts/mt7621.dtsi b/drivers/staging/mt7621-dts/mt7621.dtsi index 9e5cf68731bb..82aa93634eda 100644 --- a/drivers/staging/mt7621-dts/mt7621.dtsi +++ b/drivers/staging/mt7621-dts/mt7621.dtsi @@ -523,11 +523,10 @@ 0x01000000 0 0x00000000 0x1e160000 0 0x00010000 /* io space */ >; - #interrupt-cells = <1>; - interrupt-map-mask = <0xF0000 0 0 1>; - interrupt-map = <0x10000 0 0 1 &gic GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH>, - <0x20000 0 0 1 &gic GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH>, - <0x30000 0 0 1 &gic GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>; + interrupt-parent = <&gic>; + interrupts = ; status = "disabled"; diff --git a/drivers/staging/mt7621-pci/pci-mt7621.c b/drivers/staging/mt7621-pci/pci-mt7621.c index b9d460a9c041..36207243a71b 100644 --- a/drivers/staging/mt7621-pci/pci-mt7621.c +++ b/drivers/staging/mt7621-pci/pci-mt7621.c @@ -97,6 +97,7 @@ * @pcie_rst: pointer to port reset control * @gpio_rst: gpio reset * @slot: port slot + * @irq: GIC irq * @enabled: indicates if port is enabled */ struct mt7621_pcie_port { @@ -107,6 +108,7 @@ struct mt7621_pcie_port { struct reset_control *pcie_rst; struct gpio_desc *gpio_rst; u32 slot; + int irq; bool enabled; }; @@ -120,6 +122,7 @@ struct mt7621_pcie_port { * @dev: Pointer to PCIe device * @io_map_base: virtual memory base address for io * @ports: pointer to PCIe port information + * @irq_map: irq mapping info according pcie link status * @resets_inverted: depends on chip revision * reset lines are inverted. */ @@ -135,6 +138,7 @@ struct mt7621_pcie { } offset; unsigned long io_map_base; struct list_head ports; + int irq_map[PCIE_P2P_MAX]; bool resets_inverted; }; @@ -279,6 +283,16 @@ static void setup_cm_memory_region(struct mt7621_pcie *pcie) } } +static int mt7621_map_irq(const struct pci_dev *pdev, u8 slot, u8 pin) +{ + struct mt7621_pcie *pcie = pdev->bus->sysdata; + struct device *dev = pcie->dev; + int irq = pcie->irq_map[slot]; + + dev_info(dev, "bus=%d slot=%d irq=%d\n", pdev->bus->number, slot, irq); + return irq; +} + static int mt7621_pci_parse_request_of_pci_ranges(struct mt7621_pcie *pcie) { struct device *dev = pcie->dev; @@ -330,6 +344,7 @@ static int mt7621_pcie_parse_port(struct mt7621_pcie *pcie, { struct mt7621_pcie_port *port; struct device *dev = pcie->dev; + struct platform_device *pdev = to_platform_device(dev); struct device_node *pnode = dev->of_node; struct resource regs; char name[10]; @@ -371,6 +386,12 @@ static int mt7621_pcie_parse_port(struct mt7621_pcie *pcie, port->slot = slot; port->pcie = pcie; + port->irq = platform_get_irq(pdev, slot); + if (port->irq < 0) { + dev_err(dev, "Failed to get IRQ for PCIe%d\n", slot); + return -ENXIO; + } + INIT_LIST_HEAD(&port->list); list_add_tail(&port->list, &pcie->ports); @@ -585,13 +606,15 @@ static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie) { u32 pcie_link_status = 0; u32 n; - int i; + int i = 0; u32 p2p_br_devnum[PCIE_P2P_MAX]; + int irqs[PCIE_P2P_MAX]; struct mt7621_pcie_port *port; list_for_each_entry(port, &pcie->ports, list) { u32 slot = port->slot; + irqs[i++] = port->irq; if (port->enabled) pcie_link_status |= BIT(slot); } @@ -614,6 +637,15 @@ static int mt7621_pcie_init_virtual_bridges(struct mt7621_pcie *pcie) (p2p_br_devnum[1] << PCIE_P2P_BR_DEVNUM1_SHIFT) | (p2p_br_devnum[2] << PCIE_P2P_BR_DEVNUM2_SHIFT)); + /* Assign IRQs */ + n = 0; + for (i = 0; i < PCIE_P2P_MAX; i++) + if (pcie_link_status & BIT(i)) + pcie->irq_map[n++] = irqs[i]; + + for (i = n; i < PCIE_P2P_MAX; i++) + pcie->irq_map[i] = -1; + return 0; } @@ -638,7 +670,7 @@ static int mt7621_pcie_register_host(struct pci_host_bridge *host, host->busnr = pcie->busn.start; host->dev.parent = pcie->dev; host->ops = &mt7621_pci_ops; - host->map_irq = of_irq_parse_and_map_pci; + host->map_irq = mt7621_map_irq; host->swizzle_irq = pci_common_swizzle; host->sysdata = pcie;