mfd: twl6040: Update register bit definitions
Add define for: HSDRV, HFDAC, HFPGA and HFDRV enable bits Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> CC: Samuel Ortiz <sameo@linux.intel.com> Signed-off-by: Mark Brown <broonie@linaro.org>
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@ -125,8 +125,15 @@
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#define TWL6040_HSDACENA (1 << 0)
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#define TWL6040_HSDACMODE (1 << 1)
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#define TWL6040_HSDRVENA (1 << 2)
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#define TWL6040_HSDRVMODE (1 << 3)
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/* HFLCTL/R (0x14/0x16) fields */
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#define TWL6040_HFDACENA (1 << 0)
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#define TWL6040_HFPGAENA (1 << 1)
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#define TWL6040_HFDRVENA (1 << 4)
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/* VIBCTLL/R (0x18/0x1A) fields */
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#define TWL6040_VIBENA (1 << 0)
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