MIPS: Malta: Setup PM I/O region on boot

This patch ensures that the kernel sets a sane base address for the
PIIX4 PM I/O register region during boot. Without this the kernel may
not successfully claim the region as a resource if the bootloader didn't
configure the region. With this patch the kernel will always succeed
with:

  pci 0000:00:0a.3: quirk: [io  0x1000-0x103f] claimed by PIIX4 ACPI

The lack of the resource claiming is easily reproducible without this
patch using current versions of QEMU.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Tested-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/6641/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Paul Burton 2014-03-21 15:20:31 +00:00 committed by Ralf Baechle
parent 024e6a8b5b
commit fa12b773b7
2 changed files with 18 additions and 0 deletions

View File

@ -50,4 +50,9 @@
#define PIIX4_FUNC1_IDETIM_SECONDARY_HI 0x43
#define PIIX4_FUNC1_IDETIM_SECONDARY_HI_IDE_DECODE_EN (1 << 7)
/* Power Management Configuration Space */
#define PIIX4_FUNC3_PMBA 0x40
#define PIIX4_FUNC3_PMREGMISC 0x80
#define PIIX4_FUNC3_PMREGMISC_EN (1 << 0)
#endif /* __ASM_MIPS_BOARDS_PIIX4_H */

View File

@ -51,6 +51,19 @@ int pcibios_plat_dev_init(struct pci_dev *dev)
return 0;
}
static void malta_piix_func3_base_fixup(struct pci_dev *dev)
{
/* Set a sane PM I/O base address */
pci_write_config_word(dev, PIIX4_FUNC3_PMBA, 0x1000);
/* Enable access to the PM I/O region */
pci_write_config_byte(dev, PIIX4_FUNC3_PMREGMISC,
PIIX4_FUNC3_PMREGMISC_EN);
}
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3,
malta_piix_func3_base_fixup);
static void malta_piix_func0_fixup(struct pci_dev *pdev)
{
unsigned char reg_val;