mvebu soc changes for v4.3 (part #1)
- Extend suspend to RAM support in order to add new mvebu SoC - Add standby support for all Armada 3xx/XP SoCs -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlW7OiYACgkQCwYYjhRyO9WEIgCglOTwI09tYdDRxrW3gETI8RbM cX8An3XYyaPavLOh58x9UMmiXwTBU5EM =YmnC -----END PGP SIGNATURE----- Merge tag 'mvebu-soc-4.3-1' of git://git.infradead.org/linux-mvebu into next/soc mvebu soc changes for v4.3 (part #1) - Extend suspend to RAM support in order to add new mvebu SoC - Add standby support for all Armada 3xx/XP SoCs * tag 'mvebu-soc-4.3-1' of git://git.infradead.org/linux-mvebu: ARM: mvebu: Warn about the wake-up sources not taken into account in suspend ARM: mvebu: Add standby support ARM: mvebu: Use __init for the PM initialization functions ARM: mvebu: prepare pm-board.c for the introduction of Armada 38x support ARM: mvebu: prepare mvebu_pm_store_bootinfo() to support multiple SoCs ARM: mvebu: do not check machine in mvebu_pm_init() ARM: mvebu: prepare set_cpu_coherent() for future extension Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
f9fa55b970
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@ -65,18 +65,6 @@ static const struct of_device_id of_coherency_table[] = {
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int ll_enable_coherency(void);
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void ll_add_cpu_to_smp_group(void);
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int set_cpu_coherent(void)
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{
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if (!coherency_base) {
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pr_warn("Can't make current CPU cache coherent.\n");
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pr_warn("Coherency fabric is not initialized\n");
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return 1;
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}
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ll_add_cpu_to_smp_group();
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return ll_enable_coherency();
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}
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static int mvebu_hwcc_notifier(struct notifier_block *nb,
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unsigned long event, void *__dev)
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{
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@ -206,6 +194,23 @@ static int coherency_type(void)
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return type;
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}
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int set_cpu_coherent(void)
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{
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int type = coherency_type();
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if (type == COHERENCY_FABRIC_TYPE_ARMADA_370_XP) {
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if (!coherency_base) {
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pr_warn("Can't make current CPU cache coherent.\n");
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pr_warn("Coherency fabric is not initialized\n");
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return 1;
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}
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ll_add_cpu_to_smp_group();
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return ll_enable_coherency();
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}
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return 0;
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}
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int coherency_available(void)
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{
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return coherency_type() != COHERENCY_FABRIC_TYPE_NONE;
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@ -25,6 +25,6 @@ int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev);
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void __iomem *mvebu_get_scu_base(void);
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int mvebu_pm_init(void (*board_pm_enter)(void __iomem *sdram_reg, u32 srcmd));
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int mvebu_pm_suspend_init(void (*board_pm_enter)(void __iomem *sdram_reg,
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u32 srcmd));
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#endif
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@ -1,7 +1,7 @@
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/*
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* Board-level suspend/resume support.
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*
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* Copyright (C) 2014 Marvell
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* Copyright (C) 2014-2015 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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@ -20,27 +20,27 @@
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#include <linux/slab.h>
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#include "common.h"
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#define ARMADA_XP_GP_PIC_NR_GPIOS 3
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#define ARMADA_PIC_NR_GPIOS 3
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static void __iomem *gpio_ctrl;
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static int pic_gpios[ARMADA_XP_GP_PIC_NR_GPIOS];
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static int pic_raw_gpios[ARMADA_XP_GP_PIC_NR_GPIOS];
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static int pic_gpios[ARMADA_PIC_NR_GPIOS];
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static int pic_raw_gpios[ARMADA_PIC_NR_GPIOS];
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static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
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static void mvebu_armada_pm_enter(void __iomem *sdram_reg, u32 srcmd)
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{
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u32 reg, ackcmd;
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int i;
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/* Put 001 as value on the GPIOs */
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reg = readl(gpio_ctrl);
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for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
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for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
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reg &= ~BIT(pic_raw_gpios[i]);
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reg |= BIT(pic_raw_gpios[0]);
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writel(reg, gpio_ctrl);
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/* Prepare writing 111 to the GPIOs */
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ackcmd = readl(gpio_ctrl);
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for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++)
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for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++)
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ackcmd |= BIT(pic_raw_gpios[i]);
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srcmd = cpu_to_le32(srcmd);
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@ -76,7 +76,7 @@ static void mvebu_armada_xp_gp_pm_enter(void __iomem *sdram_reg, u32 srcmd)
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[ackcmd] "r" (ackcmd), [gpio_ctrl] "r" (gpio_ctrl) : "r1");
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}
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static int mvebu_armada_xp_gp_pm_init(void)
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static int __init mvebu_armada_pm_init(void)
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{
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struct device_node *np;
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struct device_node *gpio_ctrl_np;
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@ -89,7 +89,7 @@ static int mvebu_armada_xp_gp_pm_init(void)
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if (!np)
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return -ENODEV;
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for (i = 0; i < ARMADA_XP_GP_PIC_NR_GPIOS; i++) {
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for (i = 0; i < ARMADA_PIC_NR_GPIOS; i++) {
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char *name;
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struct of_phandle_args args;
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@ -134,11 +134,19 @@ static int mvebu_armada_xp_gp_pm_init(void)
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if (!gpio_ctrl)
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return -ENOMEM;
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mvebu_pm_init(mvebu_armada_xp_gp_pm_enter);
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mvebu_pm_suspend_init(mvebu_armada_pm_enter);
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out:
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of_node_put(np);
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return ret;
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}
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late_initcall(mvebu_armada_xp_gp_pm_init);
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/*
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* Registering the mvebu_board_pm_enter callback must be done before
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* the platform_suspend_ops will be registered. In the same time we
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* also need to have the gpio devices registered. That's why we use a
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* device_initcall_sync which is called after all the device_initcall
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* (used by the gpio device) but before the late_initcall (used to
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* register the platform_suspend_ops)
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*/
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device_initcall_sync(mvebu_armada_pm_init);
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@ -105,12 +105,10 @@ static phys_addr_t mvebu_internal_reg_base(void)
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return of_translate_address(np, in_addr);
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}
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static void mvebu_pm_store_bootinfo(void)
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static void mvebu_pm_store_armadaxp_bootinfo(u32 *store_addr)
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{
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u32 *store_addr;
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phys_addr_t resume_pc;
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store_addr = phys_to_virt(BOOT_INFO_ADDR);
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resume_pc = virt_to_phys(armada_370_xp_cpu_resume);
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/*
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@ -151,14 +149,30 @@ static void mvebu_pm_store_bootinfo(void)
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writel(BOOT_MAGIC_LIST_END, store_addr);
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}
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static int mvebu_pm_enter(suspend_state_t state)
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static int mvebu_pm_store_bootinfo(void)
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{
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if (state != PM_SUSPEND_MEM)
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return -EINVAL;
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u32 *store_addr;
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store_addr = phys_to_virt(BOOT_INFO_ADDR);
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if (of_machine_is_compatible("marvell,armadaxp"))
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mvebu_pm_store_armadaxp_bootinfo(store_addr);
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else
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return -ENODEV;
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return 0;
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}
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static int mvebu_enter_suspend(void)
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{
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int ret;
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ret = mvebu_pm_store_bootinfo();
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if (ret)
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return ret;
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cpu_pm_enter();
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mvebu_pm_store_bootinfo();
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cpu_suspend(0, mvebu_pm_powerdown);
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outer_resume();
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@ -168,23 +182,62 @@ static int mvebu_pm_enter(suspend_state_t state)
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set_cpu_coherent();
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cpu_pm_exit();
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return 0;
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}
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static int mvebu_pm_enter(suspend_state_t state)
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{
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switch (state) {
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case PM_SUSPEND_STANDBY:
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cpu_do_idle();
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break;
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case PM_SUSPEND_MEM:
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pr_warn("Entering suspend to RAM. Only special wake-up sources will resume the system\n");
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return mvebu_enter_suspend();
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int mvebu_pm_valid(suspend_state_t state)
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{
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if (state == PM_SUSPEND_STANDBY)
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return 1;
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if (state == PM_SUSPEND_MEM && mvebu_board_pm_enter != NULL)
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return 1;
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return 0;
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}
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static const struct platform_suspend_ops mvebu_pm_ops = {
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.enter = mvebu_pm_enter,
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.valid = suspend_valid_only_mem,
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.valid = mvebu_pm_valid,
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};
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int mvebu_pm_init(void (*board_pm_enter)(void __iomem *sdram_reg, u32 srcmd))
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static int __init mvebu_pm_init(void)
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{
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if (!of_machine_is_compatible("marvell,armadaxp") &&
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!of_machine_is_compatible("marvell,armada370") &&
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!of_machine_is_compatible("marvell,armada380") &&
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!of_machine_is_compatible("marvell,armada390"))
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return -ENODEV;
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suspend_set_ops(&mvebu_pm_ops);
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return 0;
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}
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late_initcall(mvebu_pm_init);
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int __init mvebu_pm_suspend_init(void (*board_pm_enter)(void __iomem *sdram_reg,
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u32 srcmd))
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{
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struct device_node *np;
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struct resource res;
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if (!of_machine_is_compatible("marvell,armadaxp"))
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return -ENODEV;
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np = of_find_compatible_node(NULL, NULL,
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"marvell,armada-xp-sdram-controller");
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if (!np)
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@ -212,7 +265,5 @@ int mvebu_pm_init(void (*board_pm_enter)(void __iomem *sdram_reg, u32 srcmd))
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mvebu_board_pm_enter = board_pm_enter;
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suspend_set_ops(&mvebu_pm_ops);
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return 0;
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}
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