locking: Remove spin_lock_flags() etc
parisc, ia64 and powerpc32 are the only remaining architectures that provide custom arch_{spin,read,write}_lock_flags() functions, which are meant to re-enable interrupts while waiting for a spinlock. However, none of these can actually run into this codepath, because it is only called on architectures without CONFIG_GENERIC_LOCKBREAK, or when CONFIG_DEBUG_LOCK_ALLOC is set without CONFIG_LOCKDEP, and none of those combinations are possible on the three architectures. Going back in the git history, it appears that arch/mn10300 may have been able to run into this code path, but there is a good chance that it never worked. On the architectures that still exist, it was already impossible to hit back in 2008 after the introduction of CONFIG_GENERIC_LOCKBREAK, and possibly earlier. As this is all dead code, just remove it and the helper functions built around it. For arch/ia64, the inline asm could be cleaned up, but it seems safer to leave it untouched. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Helge Deller <deller@gmx.de> # parisc Link: https://lore.kernel.org/r/20211022120058.1031690-1-arnd@kernel.org
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@ -124,18 +124,13 @@ static __always_inline void arch_spin_unlock(arch_spinlock_t *lock)
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__ticket_spin_unlock(lock);
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}
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static __always_inline void arch_spin_lock_flags(arch_spinlock_t *lock,
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unsigned long flags)
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{
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arch_spin_lock(lock);
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}
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#define arch_spin_lock_flags arch_spin_lock_flags
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#ifdef ASM_SUPPORTED
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static __always_inline void
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arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags)
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arch_read_lock(arch_rwlock_t *lock)
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{
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unsigned long flags = 0;
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__asm__ __volatile__ (
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"tbit.nz p6, p0 = %1,%2\n"
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"br.few 3f\n"
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@ -157,13 +152,8 @@ arch_read_lock_flags(arch_rwlock_t *lock, unsigned long flags)
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: "p6", "p7", "r2", "memory");
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}
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#define arch_read_lock_flags arch_read_lock_flags
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#define arch_read_lock(lock) arch_read_lock_flags(lock, 0)
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#else /* !ASM_SUPPORTED */
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#define arch_read_lock_flags(rw, flags) arch_read_lock(rw)
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#define arch_read_lock(rw) \
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do { \
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arch_rwlock_t *__read_lock_ptr = (rw); \
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@ -186,8 +176,10 @@ do { \
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#ifdef ASM_SUPPORTED
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static __always_inline void
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arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags)
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arch_write_lock(arch_rwlock_t *lock)
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{
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unsigned long flags = 0;
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__asm__ __volatile__ (
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"tbit.nz p6, p0 = %1, %2\n"
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"mov ar.ccv = r0\n"
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@ -210,9 +202,6 @@ arch_write_lock_flags(arch_rwlock_t *lock, unsigned long flags)
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: "ar.ccv", "p6", "p7", "r2", "r29", "memory");
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}
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#define arch_write_lock_flags arch_write_lock_flags
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#define arch_write_lock(rw) arch_write_lock_flags(rw, 0)
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#define arch_write_trylock(rw) \
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({ \
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register long result; \
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@ -19,9 +19,6 @@
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#include <asm/qrwlock.h>
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#define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
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#define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
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#define arch_spin_relax(lock) cpu_relax()
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#define arch_read_relax(lock) cpu_relax()
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#define arch_write_relax(lock) cpu_relax()
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@ -23,21 +23,6 @@ static inline void arch_spin_lock(arch_spinlock_t *x)
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continue;
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}
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static inline void arch_spin_lock_flags(arch_spinlock_t *x,
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unsigned long flags)
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{
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volatile unsigned int *a;
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a = __ldcw_align(x);
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while (__ldcw(a) == 0)
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while (*a == 0)
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if (flags & PSW_SM_I) {
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local_irq_enable();
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local_irq_disable();
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}
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}
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#define arch_spin_lock_flags arch_spin_lock_flags
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static inline void arch_spin_unlock(arch_spinlock_t *x)
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{
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volatile unsigned int *a;
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@ -123,27 +123,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
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}
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}
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static inline
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void arch_spin_lock_flags(arch_spinlock_t *lock, unsigned long flags)
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{
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unsigned long flags_dis;
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while (1) {
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if (likely(__arch_spin_trylock(lock) == 0))
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break;
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local_save_flags(flags_dis);
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local_irq_restore(flags);
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do {
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HMT_low();
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if (is_shared_processor())
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splpar_spin_yield(lock);
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} while (unlikely(lock->slock != 0));
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HMT_medium();
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local_irq_restore(flags_dis);
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}
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}
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#define arch_spin_lock_flags arch_spin_lock_flags
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static inline void arch_spin_unlock(arch_spinlock_t *lock)
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{
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__asm__ __volatile__("# arch_spin_unlock\n\t"
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@ -67,14 +67,6 @@ static inline void arch_spin_lock(arch_spinlock_t *lp)
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arch_spin_lock_wait(lp);
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}
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static inline void arch_spin_lock_flags(arch_spinlock_t *lp,
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unsigned long flags)
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{
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if (!arch_spin_trylock_once(lp))
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arch_spin_lock_wait(lp);
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}
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#define arch_spin_lock_flags arch_spin_lock_flags
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static inline int arch_spin_trylock(arch_spinlock_t *lp)
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{
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if (!arch_spin_trylock_once(lp))
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@ -481,23 +481,6 @@ do { \
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#endif /* CONFIG_LOCK_STAT */
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#ifdef CONFIG_LOCKDEP
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/*
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* On lockdep we dont want the hand-coded irq-enable of
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* _raw_*_lock_flags() code, because lockdep assumes
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* that interrupts are not re-enabled during lock-acquire:
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*/
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#define LOCK_CONTENDED_FLAGS(_lock, try, lock, lockfl, flags) \
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LOCK_CONTENDED((_lock), (try), (lock))
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#else /* CONFIG_LOCKDEP */
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#define LOCK_CONTENDED_FLAGS(_lock, try, lock, lockfl, flags) \
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lockfl((_lock), (flags))
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#endif /* CONFIG_LOCKDEP */
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#ifdef CONFIG_PROVE_LOCKING
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extern void print_irqtrace_events(struct task_struct *curr);
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#else
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@ -30,31 +30,16 @@ do { \
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#ifdef CONFIG_DEBUG_SPINLOCK
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extern void do_raw_read_lock(rwlock_t *lock) __acquires(lock);
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#define do_raw_read_lock_flags(lock, flags) do_raw_read_lock(lock)
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extern int do_raw_read_trylock(rwlock_t *lock);
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extern void do_raw_read_unlock(rwlock_t *lock) __releases(lock);
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extern void do_raw_write_lock(rwlock_t *lock) __acquires(lock);
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#define do_raw_write_lock_flags(lock, flags) do_raw_write_lock(lock)
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extern int do_raw_write_trylock(rwlock_t *lock);
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extern void do_raw_write_unlock(rwlock_t *lock) __releases(lock);
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#else
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#ifndef arch_read_lock_flags
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# define arch_read_lock_flags(lock, flags) arch_read_lock(lock)
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#endif
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#ifndef arch_write_lock_flags
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# define arch_write_lock_flags(lock, flags) arch_write_lock(lock)
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#endif
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# define do_raw_read_lock(rwlock) do {__acquire(lock); arch_read_lock(&(rwlock)->raw_lock); } while (0)
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# define do_raw_read_lock_flags(lock, flags) \
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do {__acquire(lock); arch_read_lock_flags(&(lock)->raw_lock, *(flags)); } while (0)
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# define do_raw_read_trylock(rwlock) arch_read_trylock(&(rwlock)->raw_lock)
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# define do_raw_read_unlock(rwlock) do {arch_read_unlock(&(rwlock)->raw_lock); __release(lock); } while (0)
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# define do_raw_write_lock(rwlock) do {__acquire(lock); arch_write_lock(&(rwlock)->raw_lock); } while (0)
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# define do_raw_write_lock_flags(lock, flags) \
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do {__acquire(lock); arch_write_lock_flags(&(lock)->raw_lock, *(flags)); } while (0)
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# define do_raw_write_trylock(rwlock) arch_write_trylock(&(rwlock)->raw_lock)
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# define do_raw_write_unlock(rwlock) do {arch_write_unlock(&(rwlock)->raw_lock); __release(lock); } while (0)
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#endif
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@ -157,8 +157,7 @@ static inline unsigned long __raw_read_lock_irqsave(rwlock_t *lock)
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local_irq_save(flags);
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preempt_disable();
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rwlock_acquire_read(&lock->dep_map, 0, 0, _RET_IP_);
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LOCK_CONTENDED_FLAGS(lock, do_raw_read_trylock, do_raw_read_lock,
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do_raw_read_lock_flags, &flags);
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LOCK_CONTENDED(lock, do_raw_read_trylock, do_raw_read_lock);
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return flags;
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}
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@ -184,8 +183,7 @@ static inline unsigned long __raw_write_lock_irqsave(rwlock_t *lock)
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local_irq_save(flags);
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preempt_disable();
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rwlock_acquire(&lock->dep_map, 0, 0, _RET_IP_);
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LOCK_CONTENDED_FLAGS(lock, do_raw_write_trylock, do_raw_write_lock,
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do_raw_write_lock_flags, &flags);
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LOCK_CONTENDED(lock, do_raw_write_trylock, do_raw_write_lock);
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return flags;
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}
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@ -177,7 +177,6 @@ do { \
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#ifdef CONFIG_DEBUG_SPINLOCK
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extern void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock);
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#define do_raw_spin_lock_flags(lock, flags) do_raw_spin_lock(lock)
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extern int do_raw_spin_trylock(raw_spinlock_t *lock);
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extern void do_raw_spin_unlock(raw_spinlock_t *lock) __releases(lock);
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#else
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@ -188,18 +187,6 @@ static inline void do_raw_spin_lock(raw_spinlock_t *lock) __acquires(lock)
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mmiowb_spin_lock();
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}
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#ifndef arch_spin_lock_flags
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#define arch_spin_lock_flags(lock, flags) arch_spin_lock(lock)
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#endif
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static inline void
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do_raw_spin_lock_flags(raw_spinlock_t *lock, unsigned long *flags) __acquires(lock)
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{
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__acquire(lock);
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arch_spin_lock_flags(&lock->raw_lock, *flags);
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mmiowb_spin_lock();
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}
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static inline int do_raw_spin_trylock(raw_spinlock_t *lock)
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{
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int ret = arch_spin_trylock(&(lock)->raw_lock);
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@ -108,16 +108,7 @@ static inline unsigned long __raw_spin_lock_irqsave(raw_spinlock_t *lock)
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local_irq_save(flags);
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preempt_disable();
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spin_acquire(&lock->dep_map, 0, 0, _RET_IP_);
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/*
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* On lockdep we dont want the hand-coded irq-enable of
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* do_raw_spin_lock_flags() code, because lockdep assumes
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* that interrupts are not re-enabled during lock-acquire:
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*/
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#ifdef CONFIG_LOCKDEP
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LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock);
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#else
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do_raw_spin_lock_flags(lock, &flags);
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#endif
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return flags;
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}
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@ -62,7 +62,6 @@ static inline void arch_spin_unlock(arch_spinlock_t *lock)
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#define arch_spin_is_locked(lock) ((void)(lock), 0)
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/* for sched/core.c and kernel_lock.c: */
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# define arch_spin_lock(lock) do { barrier(); (void)(lock); } while (0)
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# define arch_spin_lock_flags(lock, flags) do { barrier(); (void)(lock); } while (0)
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# define arch_spin_unlock(lock) do { barrier(); (void)(lock); } while (0)
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# define arch_spin_trylock(lock) ({ barrier(); (void)(lock); 1; })
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#endif /* DEBUG_SPINLOCK */
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@ -378,8 +378,7 @@ unsigned long __lockfunc _raw_spin_lock_irqsave_nested(raw_spinlock_t *lock,
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local_irq_save(flags);
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preempt_disable();
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spin_acquire(&lock->dep_map, subclass, 0, _RET_IP_);
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LOCK_CONTENDED_FLAGS(lock, do_raw_spin_trylock, do_raw_spin_lock,
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do_raw_spin_lock_flags, &flags);
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LOCK_CONTENDED(lock, do_raw_spin_trylock, do_raw_spin_lock);
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return flags;
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}
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EXPORT_SYMBOL(_raw_spin_lock_irqsave_nested);
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