hollalinux
/
linux-sg2042
mirror of https://github.com/sophgo/linux-riscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

mtd: eLBC NAND: update ecc_stats.corrected when lteccr available 

Signed-off-by: Michael Hench <MichaelHench@gmail.com>
Acked-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
This commit is contained in:
Michael Hench 2011-07-26 15:07:42 -05:00 committed by Artem Bityutskiy
parent 4aa10626ad
commit f975c6bcb0
1 changed files with 19 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
drivers/mtd/nand/fsl_elbc_nand.c
View File

@ -243,6 +243,25 @@ static int fsl_elbc_run_command(struct mtd_info *mtd)
return -EIO;
}
if (chip->ecc.mode != NAND_ECC_HW)
return 0;
if (elbc_fcm_ctrl->read_bytes == mtd->writesize + mtd->oobsize) {
uint32_t lteccr = in_be32(&lbc->lteccr);
/*
* if command was a full page read and the ELBC
* has the LTECCR register, then bits 12-15 (ppc order) of
* LTECCR indicates which 512 byte sub-pages had fixed errors.
* bits 28-31 are uncorrectable errors, marked elsewhere.
* for small page nand only 1 bit is used.
* if the ELBC doesn't have the lteccr register it reads 0
*/
if (lteccr & 0x000F000F)
out_be32(&lbc->lteccr, 0x000F000F); /* clear lteccr */
if (lteccr & 0x000F0000)
mtd->ecc_stats.corrected++;
}
return 0;
}