crypto: twofish-avx - tune assembler code for more performance
Patch replaces 'movb' instructions with 'movzbl' to break false register
dependencies and interleaves instructions better for out-of-order scheduling.
Tested on Intel Core i5-2450M and AMD FX-8100.
tcrypt ECB results:
Intel Core i5-2450M:
size old-vs-new new-vs-3way old-vs-3way
enc dec enc dec enc dec
256 1.12x 1.13x 1.36x 1.37x 1.21x 1.22x
1k 1.14x 1.14x 1.48x 1.49x 1.29x 1.31x
8k 1.14x 1.14x 1.50x 1.52x 1.32x 1.33x
AMD FX-8100:
size old-vs-new new-vs-3way old-vs-3way
enc dec enc dec enc dec
256 1.10x 1.11x 1.01x 1.01x 0.92x 0.91x
1k 1.11x 1.12x 1.08x 1.07x 0.97x 0.96x
8k 1.11x 1.13x 1.10x 1.08x 0.99x 0.97x
[v2]
- Do instruction interleaving another way to avoid adding new FPU<=>CPU
register moves as these cause performance drop on Bulldozer.
- Further interleaving improvements for better out-of-order scheduling.
Tested-by: Borislav Petkov <bp@alien8.de>
Cc: Johannes Goetzfried <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
Signed-off-by: Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Jussi Kivilinna
Herbert Xu
parent
49d30d3d5f
commit
f94a73f8dd
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@ -4,6 +4,8 @@
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* Copyright (C) 2012 Johannes Goetzfried
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* <Johannes.Goetzfried@informatik.stud.uni-erlangen.de>
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*
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* Copyright © 2012 Jussi Kivilinna <jussi.kivilinna@mbnet.fi>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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@ -47,16 +49,22 @@
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#define RC2 %xmm6
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#define RD2 %xmm7
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#define RX %xmm8
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#define RY %xmm9
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#define RX0 %xmm8
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#define RY0 %xmm9
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#define RK1 %xmm10
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#define RK2 %xmm11
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#define RX1 %xmm10
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#define RY1 %xmm11
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#define RID1 %rax
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#define RID1b %al
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#define RID2 %rbx
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#define RID2b %bl
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#define RK1 %xmm12
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#define RK2 %xmm13
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#define RT %xmm14
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#define RR %xmm15
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#define RID1 %rbp
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#define RID1d %ebp
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#define RID2 %rsi
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#define RID2d %esi
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#define RGI1 %rdx
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#define RGI1bl %dl
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@ -65,6 +73,13 @@
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#define RGI2bl %cl
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#define RGI2bh %ch
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#define RGI3 %rax
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#define RGI3bl %al
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#define RGI3bh %ah
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#define RGI4 %rbx
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#define RGI4bl %bl
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#define RGI4bh %bh
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#define RGS1 %r8
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#define RGS1d %r8d
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#define RGS2 %r9
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@ -73,89 +88,123 @@
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#define RGS3d %r10d
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#define lookup_32bit(t0, t1, t2, t3, src, dst) \
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movb src ## bl, RID1b; \
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movb src ## bh, RID2b; \
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movl t0(CTX, RID1, 4), dst ## d; \
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xorl t1(CTX, RID2, 4), dst ## d; \
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#define lookup_32bit(t0, t1, t2, t3, src, dst, interleave_op, il_reg) \
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movzbl src ## bl, RID1d; \
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movzbl src ## bh, RID2d; \
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shrq $16, src; \
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movb src ## bl, RID1b; \
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movb src ## bh, RID2b; \
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movl t0(CTX, RID1, 4), dst ## d; \
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movl t1(CTX, RID2, 4), RID2d; \
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movzbl src ## bl, RID1d; \
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xorl RID2d, dst ## d; \
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movzbl src ## bh, RID2d; \
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interleave_op(il_reg); \
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xorl t2(CTX, RID1, 4), dst ## d; \
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xorl t3(CTX, RID2, 4), dst ## d;
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#define G(a, x, t0, t1, t2, t3) \
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vmovq a, RGI1; \
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vpsrldq $8, a, x; \
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vmovq x, RGI2; \
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\
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lookup_32bit(t0, t1, t2, t3, RGI1, RGS1); \
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shrq $16, RGI1; \
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lookup_32bit(t0, t1, t2, t3, RGI1, RGS2); \
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shlq $32, RGS2; \
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orq RGS1, RGS2; \
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\
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lookup_32bit(t0, t1, t2, t3, RGI2, RGS1); \
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shrq $16, RGI2; \
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lookup_32bit(t0, t1, t2, t3, RGI2, RGS3); \
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shlq $32, RGS3; \
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orq RGS1, RGS3; \
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\
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vmovq RGS2, x; \
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vpinsrq $1, RGS3, x, x;
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#define dummy(d) /* do nothing */
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#define encround(a, b, c, d, x, y) \
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G(a, x, s0, s1, s2, s3); \
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G(b, y, s1, s2, s3, s0); \
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#define shr_next(reg) \
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shrq $16, reg;
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#define G(gi1, gi2, x, t0, t1, t2, t3) \
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lookup_32bit(t0, t1, t2, t3, ##gi1, RGS1, shr_next, ##gi1); \
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lookup_32bit(t0, t1, t2, t3, ##gi2, RGS3, shr_next, ##gi2); \
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\
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lookup_32bit(t0, t1, t2, t3, ##gi1, RGS2, dummy, none); \
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shlq $32, RGS2; \
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orq RGS1, RGS2; \
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lookup_32bit(t0, t1, t2, t3, ##gi2, RGS1, dummy, none); \
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shlq $32, RGS1; \
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orq RGS1, RGS3;
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#define round_head_2(a, b, x1, y1, x2, y2) \
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vmovq b ## 1, RGI3; \
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vpextrq $1, b ## 1, RGI4; \
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\
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G(RGI1, RGI2, x1, s0, s1, s2, s3); \
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vmovq a ## 2, RGI1; \
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vpextrq $1, a ## 2, RGI2; \
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vmovq RGS2, x1; \
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vpinsrq $1, RGS3, x1, x1; \
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\
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G(RGI3, RGI4, y1, s1, s2, s3, s0); \
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vmovq b ## 2, RGI3; \
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vpextrq $1, b ## 2, RGI4; \
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vmovq RGS2, y1; \
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vpinsrq $1, RGS3, y1, y1; \
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\
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G(RGI1, RGI2, x2, s0, s1, s2, s3); \
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vmovq RGS2, x2; \
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vpinsrq $1, RGS3, x2, x2; \
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\
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G(RGI3, RGI4, y2, s1, s2, s3, s0); \
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vmovq RGS2, y2; \
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vpinsrq $1, RGS3, y2, y2;
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#define encround_tail(a, b, c, d, x, y, prerotate) \
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vpaddd x, y, x; \
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vpaddd x, RK1, RT;\
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prerotate(b); \
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vpxor RT, c, c; \
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vpaddd y, x, y; \
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vpaddd x, RK1, x; \
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vpaddd y, RK2, y; \
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vpxor x, c, c; \
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vpsrld $1, c, x; \
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vpsrld $1, c, RT; \
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vpslld $(32 - 1), c, c; \
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vpor c, x, c; \
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vpslld $1, d, x; \
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vpsrld $(32 - 1), d, d; \
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vpor d, x, d; \
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vpxor d, y, d;
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vpor c, RT, c; \
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vpxor d, y, d; \
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#define decround(a, b, c, d, x, y) \
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G(a, x, s0, s1, s2, s3); \
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G(b, y, s1, s2, s3, s0); \
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#define decround_tail(a, b, c, d, x, y, prerotate) \
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vpaddd x, y, x; \
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vpaddd x, RK1, RT;\
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prerotate(a); \
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vpxor RT, c, c; \
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vpaddd y, x, y; \
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vpaddd y, RK2, y; \
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vpxor d, y, d; \
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vpsrld $1, d, y; \
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vpslld $(32 - 1), d, d; \
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vpor d, y, d; \
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vpslld $1, c, y; \
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vpsrld $(32 - 1), c, c; \
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vpor c, y, c; \
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vpaddd x, RK1, x; \
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vpxor x, c, c;
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#define encrypt_round(n, a, b, c, d) \
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vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
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vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
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encround(a ## 1, b ## 1, c ## 1, d ## 1, RX, RY); \
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encround(a ## 2, b ## 2, c ## 2, d ## 2, RX, RY);
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#define rotate_1l(x) \
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vpslld $1, x, RR; \
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vpsrld $(32 - 1), x, x; \
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vpor x, RR, x;
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#define decrypt_round(n, a, b, c, d) \
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vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
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vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
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decround(a ## 1, b ## 1, c ## 1, d ## 1, RX, RY); \
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decround(a ## 2, b ## 2, c ## 2, d ## 2, RX, RY);
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#define preload_rgi(c) \
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vmovq c, RGI1; \
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vpextrq $1, c, RGI2;
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#define encrypt_round(n, a, b, c, d, preload, prerotate) \
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vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
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vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
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round_head_2(a, b, RX0, RY0, RX1, RY1); \
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encround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
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preload(c ## 1); \
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encround_tail(a ## 2, b ## 2, c ## 2, d ## 2, RX1, RY1, prerotate);
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#define decrypt_round(n, a, b, c, d, preload, prerotate) \
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vbroadcastss (k+4*(2*(n)))(CTX), RK1; \
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vbroadcastss (k+4*(2*(n)+1))(CTX), RK2; \
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round_head_2(a, b, RX0, RY0, RX1, RY1); \
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decround_tail(a ## 1, b ## 1, c ## 1, d ## 1, RX0, RY0, prerotate); \
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preload(c ## 1); \
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decround_tail(a ## 2, b ## 2, c ## 2, d ## 2, RX1, RY1, prerotate);
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#define encrypt_cycle(n) \
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encrypt_round((2*n), RA, RB, RC, RD); \
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encrypt_round(((2*n) + 1), RC, RD, RA, RB);
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encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
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encrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l);
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#define encrypt_cycle_last(n) \
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encrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l); \
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encrypt_round(((2*n) + 1), RC, RD, RA, RB, dummy, dummy);
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#define decrypt_cycle(n) \
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decrypt_round(((2*n) + 1), RC, RD, RA, RB); \
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decrypt_round((2*n), RA, RB, RC, RD);
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decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
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decrypt_round((2*n), RA, RB, RC, RD, preload_rgi, rotate_1l);
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#define decrypt_cycle_last(n) \
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decrypt_round(((2*n) + 1), RC, RD, RA, RB, preload_rgi, rotate_1l); \
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decrypt_round((2*n), RA, RB, RC, RD, dummy, dummy);
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#define transpose_4x4(x0, x1, x2, x3, t0, t1, t2) \
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vpunpckldq x1, x0, t0; \
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@ -216,17 +265,20 @@ __twofish_enc_blk_8way:
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* %rcx: bool, if true: xor output
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*/
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pushq %rbp;
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pushq %rbx;
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pushq %rcx;
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vmovdqu w(CTX), RK1;
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leaq (4*4*4)(%rdx), %rax;
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inpack_blocks(%rdx, RA1, RB1, RC1, RD1, RK1, RX, RY, RK2);
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inpack_blocks(%rax, RA2, RB2, RC2, RD2, RK1, RX, RY, RK2);
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inpack_blocks(%rdx, RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
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preload_rgi(RA1);
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rotate_1l(RD1);
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inpack_blocks(%rax, RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
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rotate_1l(RD2);
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xorq RID1, RID1;
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xorq RID2, RID2;
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movq %rsi, %r11;
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encrypt_cycle(0);
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encrypt_cycle(1);
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@ -235,26 +287,27 @@ __twofish_enc_blk_8way:
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encrypt_cycle(4);
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encrypt_cycle(5);
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encrypt_cycle(6);
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encrypt_cycle(7);
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encrypt_cycle_last(7);
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vmovdqu (w+4*4)(CTX), RK1;
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popq %rcx;
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popq %rbx;
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popq %rbp;
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leaq (4*4*4)(%rsi), %rax;
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leaq (4*4*4)(%r11), %rax;
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testb %cl, %cl;
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jnz __enc_xor8;
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outunpack_blocks(%rsi, RC1, RD1, RA1, RB1, RK1, RX, RY, RK2);
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outunpack_blocks(%rax, RC2, RD2, RA2, RB2, RK1, RX, RY, RK2);
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outunpack_blocks(%r11, RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
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outunpack_blocks(%rax, RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
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ret;
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__enc_xor8:
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outunpack_xor_blocks(%rsi, RC1, RD1, RA1, RB1, RK1, RX, RY, RK2);
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outunpack_xor_blocks(%rax, RC2, RD2, RA2, RB2, RK1, RX, RY, RK2);
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outunpack_xor_blocks(%r11, RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
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outunpack_xor_blocks(%rax, RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
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ret;
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@ -269,16 +322,19 @@ twofish_dec_blk_8way:
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* %rdx: src
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*/
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pushq %rbp;
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pushq %rbx;
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vmovdqu (w+4*4)(CTX), RK1;
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leaq (4*4*4)(%rdx), %rax;
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inpack_blocks(%rdx, RC1, RD1, RA1, RB1, RK1, RX, RY, RK2);
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inpack_blocks(%rax, RC2, RD2, RA2, RB2, RK1, RX, RY, RK2);
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inpack_blocks(%rdx, RC1, RD1, RA1, RB1, RK1, RX0, RY0, RK2);
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preload_rgi(RC1);
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rotate_1l(RA1);
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inpack_blocks(%rax, RC2, RD2, RA2, RB2, RK1, RX0, RY0, RK2);
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rotate_1l(RA2);
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xorq RID1, RID1;
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xorq RID2, RID2;
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movq %rsi, %r11;
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decrypt_cycle(7);
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decrypt_cycle(6);
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@ -287,14 +343,15 @@ twofish_dec_blk_8way:
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decrypt_cycle(3);
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decrypt_cycle(2);
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decrypt_cycle(1);
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decrypt_cycle(0);
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decrypt_cycle_last(0);
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vmovdqu (w)(CTX), RK1;
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popq %rbx;
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popq %rbp;
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leaq (4*4*4)(%rsi), %rax;
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outunpack_blocks(%rsi, RA1, RB1, RC1, RD1, RK1, RX, RY, RK2);
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outunpack_blocks(%rax, RA2, RB2, RC2, RD2, RK1, RX, RY, RK2);
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leaq (4*4*4)(%r11), %rax;
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outunpack_blocks(%r11, RA1, RB1, RC1, RD1, RK1, RX0, RY0, RK2);
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outunpack_blocks(%rax, RA2, RB2, RC2, RD2, RK1, RX0, RY0, RK2);
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ret;
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