[PATCH] i386: port ATI timer fix from x86_64 to i386 II
ATI chipsets tend to generate double timer interrupts for the local APIC timer when both the 8254 and the IO-APIC timer pins are enabled. This is because they route it to both and the result is anded together and the CPU ends up processing it twice. This patch changes check_timer to disable the 8254 routing for interrupt 0. I think it would be safe on all chipsets actually (i tested it on a couple and it worked everywhere) and Windows seems to do it in a similar way, but to be conservative this patch only enables this mode on ATI (and adds options to enable/disable too) Ported over from a similar x86-64 change. I reused the ACPI earlyquirk infrastructure for the ATI bridge check, but tweaked it a bit to work even without ACPI. Inspired by a patch from Chuck Ebbert, but redone. Cc: Chuck Ebbert <76306.1226@compuserve.com> Cc: "Brown, Len" <len.brown@intel.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -335,6 +335,12 @@ running once the system is up.
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timesource is not avalible, it defaults to PIT.
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Format: { pit | tsc | cyclone | pmtmr }
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disable_8254_timer
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enable_8254_timer
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[IA32/X86_64] Disable/Enable interrupt 0 timer routing
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over the 8254 in addition to over the IO-APIC. The
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kernel tries to set a sensible default.
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hpet= [IA-32,HPET] option to disable HPET and use PIT.
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Format: disable
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@ -11,7 +11,7 @@ obj-y := process.o semaphore.o signal.o entry.o traps.o irq.o \
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obj-y += cpu/
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obj-y += timers/
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obj-$(CONFIG_ACPI) += acpi/
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obj-y += acpi/
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obj-$(CONFIG_X86_BIOS_REBOOT) += reboot.o
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obj-$(CONFIG_MCA) += mca.o
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obj-$(CONFIG_X86_MSR) += msr.o
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@ -1,4 +1,4 @@
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obj-y := boot.o
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obj-$(CONFIG_ACPI) += boot.o
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obj-$(CONFIG_X86_IO_APIC) += earlyquirk.o
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obj-$(CONFIG_ACPI_SLEEP) += sleep.o wakeup.o
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@ -1111,9 +1111,6 @@ int __init acpi_boot_table_init(void)
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disable_acpi();
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return error;
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}
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#ifdef __i386__
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check_acpi_pci();
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#endif
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acpi_table_parse(ACPI_BOOT, acpi_parse_sbf);
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@ -7,14 +7,22 @@
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#include <linux/pci.h>
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#include <asm/pci-direct.h>
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#include <asm/acpi.h>
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#include <asm/apic.h>
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static int __init check_bridge(int vendor, int device)
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{
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#ifdef CONFIG_ACPI
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/* According to Nvidia all timer overrides are bogus. Just ignore
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them all. */
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if (vendor == PCI_VENDOR_ID_NVIDIA) {
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acpi_skip_timer_override = 1;
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}
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#endif
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if (vendor == PCI_VENDOR_ID_ATI && timer_over_8254 == 1) {
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timer_over_8254 = 0;
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printk(KERN_INFO "ATI board detected. Disabling timer routing "
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"over 8254.\n");
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}
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return 0;
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}
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@ -51,6 +51,8 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
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static DEFINE_SPINLOCK(ioapic_lock);
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int timer_over_8254 __initdata = 1;
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/*
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* Is the SiS APIC rmw bug present ?
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* -1 = don't know, 0 = no, 1 = yes
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@ -2267,7 +2269,8 @@ static inline void check_timer(void)
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apic_write_around(APIC_LVT0, APIC_LVT_MASKED | APIC_DM_EXTINT);
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init_8259A(1);
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timer_ack = 1;
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enable_8259A_irq(0);
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if (timer_over_8254 > 0)
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enable_8259A_irq(0);
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pin1 = find_isa_irq_pin(0, mp_INT);
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apic1 = find_isa_irq_apic(0, mp_INT);
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@ -2392,6 +2395,20 @@ void __init setup_IO_APIC(void)
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print_IO_APIC();
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}
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static int __init setup_disable_8254_timer(char *s)
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{
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timer_over_8254 = -1;
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return 1;
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}
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static int __init setup_enable_8254_timer(char *s)
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{
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timer_over_8254 = 2;
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return 1;
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}
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__setup("disable_8254_timer", setup_disable_8254_timer);
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__setup("enable_8254_timer", setup_enable_8254_timer);
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/*
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* Called after all the initialization is done. If we didnt find any
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* APIC bugs then we can allow the modify fast path
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@ -1599,6 +1599,10 @@ void __init setup_arch(char **cmdline_p)
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if (efi_enabled)
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efi_map_memmap();
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#ifdef CONFIG_X86_IO_APIC
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check_acpi_pci(); /* Checks more than just ACPI actually */
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#endif
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#ifdef CONFIG_ACPI
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/*
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* Parse the ACPI tables for possible boot-time SMP configuration.
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@ -137,6 +137,8 @@ void switch_APIC_timer_to_ipi(void *cpumask);
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void switch_ipi_to_APIC_timer(void *cpumask);
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#define ARCH_APICTIMER_STOPS_ON_C3 1
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extern int timer_over_8254;
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#else /* !CONFIG_X86_LOCAL_APIC */
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static inline void lapic_shutdown(void) { }
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