Blackfin pata-bf54x driver: Add debug information
Signed-off-by: Robin Getz <robin.getz@analog.com> Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bryan Wu <bryan.wu@analog.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
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@ -299,7 +299,7 @@ static void bfin_set_piomode(struct ata_port *ap, struct ata_device *adev)
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*/
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n6 = num_clocks_min(t6min, fsclk);
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if (mode >= 0 && mode <= 4 && n6 >= 1) {
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pr_debug("set piomode: mode=%d, fsclk=%ud\n", mode, fsclk);
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dev_dbg(adev->ap->dev, "set piomode: mode=%d, fsclk=%ud\n", mode, fsclk);
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/* calculate the timing values for register transfers. */
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while (mode > 0 && pio_fsclk[mode] > fsclk)
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mode--;
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@ -376,7 +376,7 @@ static void bfin_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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mode = adev->dma_mode - XFER_UDMA_0;
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if (mode >= 0 && mode <= 5) {
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pr_debug("set udmamode: mode=%d\n", mode);
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dev_dbg(adev->ap->dev, "set udmamode: mode=%d\n", mode);
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/* the most restrictive timing value is t6 and tc,
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* the DIOW - data hold. If one SCLK pulse is longer
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* than this minimum value then register
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@ -433,7 +433,7 @@ static void bfin_set_dmamode(struct ata_port *ap, struct ata_device *adev)
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mode = adev->dma_mode - XFER_MW_DMA_0;
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if (mode >= 0 && mode <= 2) {
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pr_debug("set mdmamode: mode=%d\n", mode);
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dev_dbg(adev->ap->dev, "set mdmamode: mode=%d\n", mode);
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/* the most restrictive timing value is tf, the DMACK to
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* read data released. If one SCLK pulse is longer than
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* this maximum value then the MDMA mode
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@ -697,7 +697,7 @@ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
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write_atapi_register(base, ATA_REG_LBAL, tf->hob_lbal);
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write_atapi_register(base, ATA_REG_LBAM, tf->hob_lbam);
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write_atapi_register(base, ATA_REG_LBAH, tf->hob_lbah);
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pr_debug("hob: feat 0x%X nsect 0x%X, lba 0x%X "
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dev_dbg(ap->dev, "hob: feat 0x%X nsect 0x%X, lba 0x%X "
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"0x%X 0x%X\n",
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tf->hob_feature,
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tf->hob_nsect,
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@ -711,7 +711,7 @@ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
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write_atapi_register(base, ATA_REG_LBAL, tf->lbal);
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write_atapi_register(base, ATA_REG_LBAM, tf->lbam);
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write_atapi_register(base, ATA_REG_LBAH, tf->lbah);
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pr_debug("feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
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dev_dbg(ap->dev, "feat 0x%X nsect 0x%X lba 0x%X 0x%X 0x%X\n",
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tf->feature,
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tf->nsect,
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tf->lbal,
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@ -721,7 +721,7 @@ static void bfin_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
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if (tf->flags & ATA_TFLAG_DEVICE) {
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write_atapi_register(base, ATA_REG_DEVICE, tf->device);
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pr_debug("device 0x%X\n", tf->device);
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dev_dbg(ap->dev, "device 0x%X\n", tf->device);
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}
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ata_wait_idle(ap);
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@ -782,7 +782,7 @@ static void bfin_exec_command(struct ata_port *ap,
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const struct ata_taskfile *tf)
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{
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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pr_debug("ata%u: cmd 0x%X\n", ap->print_id, tf->command);
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dev_dbg(ap->dev, "ata%u: cmd 0x%X\n", ap->print_id, tf->command);
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write_atapi_register(base, ATA_REG_CMD, tf->command);
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ata_pause(ap);
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@ -834,7 +834,7 @@ static void bfin_bmdma_setup(struct ata_queued_cmd *qc)
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struct scatterlist *sg;
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unsigned int si;
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pr_debug("in atapi dma setup\n");
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dev_dbg(qc->ap->dev, "in atapi dma setup\n");
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/* Program the ATA_CTRL register with dir */
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if (qc->tf.flags & ATA_TFLAG_WRITE) {
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/* fill the ATAPI DMA controller */
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@ -870,7 +870,7 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc)
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struct scatterlist *sg;
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unsigned int si;
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pr_debug("in atapi dma start\n");
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dev_dbg(qc->ap->dev, "in atapi dma start\n");
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if (!(ap->udma_mask || ap->mwdma_mask))
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return;
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@ -888,7 +888,7 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc)
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sg_dma_address(sg) + sg_dma_len(sg));
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}
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enable_dma(CH_ATAPI_TX);
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pr_debug("enable udma write\n");
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dev_dbg(qc->ap->dev, "enable udma write\n");
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/* Send ATA DMA write command */
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bfin_exec_command(ap, &qc->tf);
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@ -898,7 +898,7 @@ static void bfin_bmdma_start(struct ata_queued_cmd *qc)
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| XFER_DIR));
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} else {
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enable_dma(CH_ATAPI_RX);
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pr_debug("enable udma read\n");
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dev_dbg(qc->ap->dev, "enable udma read\n");
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/* Send ATA DMA read command */
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bfin_exec_command(ap, &qc->tf);
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@ -936,7 +936,7 @@ static void bfin_bmdma_stop(struct ata_queued_cmd *qc)
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struct scatterlist *sg;
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unsigned int si;
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pr_debug("in atapi dma stop\n");
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dev_dbg(qc->ap->dev, "in atapi dma stop\n");
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if (!(ap->udma_mask || ap->mwdma_mask))
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return;
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@ -1157,6 +1157,8 @@ static unsigned char bfin_bmdma_status(struct ata_port *ap)
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host_stat |= ATA_DMA_ERR;
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}
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dev_dbg(ap->dev, "ATAPI: host_stat=0x%x\n", host_stat);
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return host_stat;
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}
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@ -1213,8 +1215,7 @@ static void bfin_irq_clear(struct ata_port *ap)
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{
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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pr_debug("in atapi irq clear\n");
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dev_dbg(ap->dev, "in atapi irq clear\n");
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ATAPI_SET_INT_STATUS(base, ATAPI_GET_INT_STATUS(base)|ATAPI_DEV_INT
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| MULTI_DONE_INT | UDMAIN_DONE_INT | UDMAOUT_DONE_INT
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| MULTI_TERM_INT | UDMAIN_TERM_INT | UDMAOUT_TERM_INT);
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@ -1232,7 +1233,7 @@ static unsigned char bfin_irq_on(struct ata_port *ap)
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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u8 tmp;
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pr_debug("in atapi irq on\n");
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dev_dbg(ap->dev, "in atapi irq on\n");
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ap->ctl &= ~ATA_NIEN;
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ap->last_ctl = ap->ctl;
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@ -1255,7 +1256,7 @@ static void bfin_bmdma_freeze(struct ata_port *ap)
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{
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void __iomem *base = (void __iomem *)ap->ioaddr.ctl_addr;
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pr_debug("in atapi dma freeze\n");
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dev_dbg(ap->dev, "in atapi dma freeze\n");
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ap->ctl |= ATA_NIEN;
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ap->last_ctl = ap->ctl;
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@ -1328,7 +1329,7 @@ static void bfin_error_handler(struct ata_port *ap)
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static void bfin_port_stop(struct ata_port *ap)
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{
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pr_debug("in atapi port stop\n");
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dev_dbg(ap->dev, "in atapi port stop\n");
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if (ap->udma_mask != 0 || ap->mwdma_mask != 0) {
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free_dma(CH_ATAPI_RX);
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free_dma(CH_ATAPI_TX);
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@ -1337,7 +1338,7 @@ static void bfin_port_stop(struct ata_port *ap)
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static int bfin_port_start(struct ata_port *ap)
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{
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pr_debug("in atapi port start\n");
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dev_dbg(ap->dev, "in atapi port start\n");
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if (!(ap->udma_mask || ap->mwdma_mask))
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return 0;
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