Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc
* master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc: (61 commits) [POWERPC] Use udbg_early_init() on ppc32 [POWERPC] Open Firmware serial port driver [POWERPC] Move MPIC smp routines into mpic.c [POWERPC] Cleanup pseries kexec code [POWERPC] Cleanup pseries smp initialisation code [POWERPC] Consolidate pseries platform header files into pseries.h [POWERPC] 85xx: Drop use of SYNC macro in head_fsl_booke.S [POWERPC] cell: pm_rtas_activat_signals routine cleanup [POWERPC] cell: PPU Oprofile cleanup patch [POWERPC] spufs: avoid accessing kernel memory through mmapped /mem node [POWERPC] spu sched: static timeslicing for SCHED_RR contexts [POWERPC] spu sched: use DECLARE_BITMAP [POWERPC] spu sched: forced preemption at execution [POWERPC] spu sched: update some comments [POWERPC] spu sched: simplity spu_remove_from_active_list [POWERPC] spufs: optimize spu_run [POWERPC] spufs: runqueue simplification [POWERPC] spufs: move prio to spu_context [POWERPC] spufs: state_mutex cleanup [POWERPC] spufs: simplify state_mutex ...
This commit is contained in:
Linus Torvalds
commit
f90203e0cf
|
|
@ -1334,6 +1334,9 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
fsl-usb2-mph compatible controllers. Either this property or
|
||||
"port0" (or both) must be defined for "fsl-usb2-mph" compatible
|
||||
controllers.
|
||||
- dr_mode : indicates the working mode for "fsl-usb2-dr" compatible
|
||||
controllers. Can be "host", "peripheral", or "otg". Default to
|
||||
"host" if not defined for backward compatibility.
|
||||
|
||||
Recommended properties :
|
||||
- interrupts : <a b> where a is the interrupt number and b is a
|
||||
|
|
@ -1367,6 +1370,7 @@ platforms are moved over to use the flattened-device-tree model.
|
|||
#size-cells = <0>;
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||||
interrupt-parent = <700>;
|
||||
interrupts = <26 1>;
|
||||
dr_mode = "otg";
|
||||
phy = "ulpi";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
MPC52xx Device Tree Bindings
|
||||
MPC5200 Device Tree Bindings
|
||||
----------------------------
|
||||
|
||||
(c) 2006 Secret Lab Technologies Ltd
|
||||
(c) 2006-2007 Secret Lab Technologies Ltd
|
||||
Grant Likely <grant.likely at secretlab.ca>
|
||||
|
||||
********** DRAFT ***********
|
||||
|
|
@ -20,11 +20,11 @@ described in Documentation/powerpc/booting-without-of.txt), or passed
|
|||
by Open Firmare (IEEE 1275) compatible firmware using an OF compatible
|
||||
client interface API.
|
||||
|
||||
This document specifies the requirements on the device-tree for mpc52xx
|
||||
This document specifies the requirements on the device-tree for mpc5200
|
||||
based boards. These requirements are above and beyond the details
|
||||
specified in either the OpenFirmware spec or booting-without-of.txt
|
||||
|
||||
All new mpc52xx-based boards are expected to match this document. In
|
||||
All new mpc5200-based boards are expected to match this document. In
|
||||
cases where this document is not sufficient to support a new board port,
|
||||
this document should be updated as part of adding the new board support.
|
||||
|
||||
|
|
@ -32,26 +32,26 @@ II - Philosophy
|
|||
===============
|
||||
The core of this document is naming convention. The whole point of
|
||||
defining this convention is to reduce or eliminate the number of
|
||||
special cases required to support a 52xx board. If all 52xx boards
|
||||
follow the same convention, then generic 52xx support code will work
|
||||
special cases required to support a 5200 board. If all 5200 boards
|
||||
follow the same convention, then generic 5200 support code will work
|
||||
rather than coding special cases for each new board.
|
||||
|
||||
This section tries to capture the thought process behind why the naming
|
||||
convention is what it is.
|
||||
|
||||
1. Node names
|
||||
-------------
|
||||
1. names
|
||||
---------
|
||||
There is strong convention/requirements already established for children
|
||||
of the root node. 'cpus' describes the processor cores, 'memory'
|
||||
describes memory, and 'chosen' provides boot configuration. Other nodes
|
||||
are added to describe devices attached to the processor local bus.
|
||||
Following convention already established with other system-on-chip
|
||||
processors, MPC52xx boards must have an 'soc5200' node as a child of the
|
||||
root node.
|
||||
|
||||
The soc5200 node holds child nodes for all on chip devices. Child nodes
|
||||
are typically named after the configured function. ie. the FEC node is
|
||||
named 'ethernet', and a PSC in uart mode is named 'serial'.
|
||||
Following convention already established with other system-on-chip
|
||||
processors, 5200 device trees should use the name 'soc5200' for the
|
||||
parent node of on chip devices, and the root node should be its parent.
|
||||
|
||||
Child nodes are typically named after the configured function. ie.
|
||||
the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'.
|
||||
|
||||
2. device_type property
|
||||
-----------------------
|
||||
|
|
@ -66,28 +66,47 @@ exactly.
|
|||
Since device_type isn't enough to match devices to drivers, there also
|
||||
needs to be a naming convention for the compatible property. Compatible
|
||||
is an list of device descriptions sorted from specific to generic. For
|
||||
the mpc52xx, the required format for each compatible value is
|
||||
<chip>-<device>[-<mode>]. At the minimum, the list shall contain two
|
||||
items; the first specifying the exact chip, and the second specifying
|
||||
mpc52xx for the chip.
|
||||
the mpc5200, the required format for each compatible value is
|
||||
<chip>-<device>[-<mode>]. The OS should be able to match a device driver
|
||||
to the device based solely on the compatible value. If two drivers
|
||||
match on the compatible list; the 'most compatible' driver should be
|
||||
selected.
|
||||
|
||||
ie. ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc52xx-ethernet"
|
||||
The split between the MPC5200 and the MPC5200B leaves a bit of a
|
||||
connundrum. How should the compatible property be set up to provide
|
||||
maximum compatability information; but still acurately describe the
|
||||
chip? For the MPC5200; the answer is easy. Most of the SoC devices
|
||||
originally appeared on the MPC5200. Since they didn't exist anywhere
|
||||
else; the 5200 compatible properties will contain only one item;
|
||||
"mpc5200-<device>".
|
||||
|
||||
The idea here is that most drivers will match to the most generic field
|
||||
in the compatible list (mpc52xx-*), but can also test the more specific
|
||||
field for enabling bug fixes or extra features.
|
||||
The 5200B is almost the same as the 5200, but not quite. It fixes
|
||||
silicon bugs and it adds a small number of enhancements. Most of the
|
||||
devices either provide exactly the same interface as on the 5200. A few
|
||||
devices have extra functions but still have a backwards compatible mode.
|
||||
To express this infomation as completely as possible, 5200B device trees
|
||||
should have two items in the compatible list;
|
||||
"mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended
|
||||
that 5200B device trees follow this convention (instead of only listing
|
||||
the base mpc5200 item).
|
||||
|
||||
If another chip appear on the market with one of the mpc5200 SoC
|
||||
devices, then the compatible list should include mpc5200-<device>.
|
||||
|
||||
ie. ethernet on mpc5200: compatible = "mpc5200-ethernet"
|
||||
ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet"
|
||||
|
||||
Modal devices, like PSCs, also append the configured function to the
|
||||
end of the compatible field. ie. A PSC in i2s mode would specify
|
||||
"mpc52xx-psc-i2s", not "mpc52xx-i2s". This convention is chosen to
|
||||
"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to
|
||||
avoid naming conflicts with non-psc devices providing the same
|
||||
function. For example, "mpc52xx-spi" and "mpc52xx-psc-spi" describe
|
||||
function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe
|
||||
the mpc5200 simple spi device and a PSC spi mode respectively.
|
||||
|
||||
If the soc device is more generic and present on other SOCs, the
|
||||
compatible property can specify the more generic device type also.
|
||||
|
||||
ie. mscan: compatible = "mpc5200-mscan\0mpc52xx-mscan\0fsl,mscan";
|
||||
ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan";
|
||||
|
||||
At the time of writing, exact chip may be either 'mpc5200' or
|
||||
'mpc5200b'.
|
||||
|
|
@ -96,7 +115,7 @@ Device drivers should always try to match as generically as possible.
|
|||
|
||||
III - Structure
|
||||
===============
|
||||
The device tree for an mpc52xx board follows the structure defined in
|
||||
The device tree for an mpc5200 board follows the structure defined in
|
||||
booting-without-of.txt with the following additional notes:
|
||||
|
||||
0) the root node
|
||||
|
|
@ -115,7 +134,7 @@ Typical memory description node; see booting-without-of.
|
|||
|
||||
3) The soc5200 node
|
||||
-------------------
|
||||
This node describes the on chip SOC peripherals. Every mpc52xx based
|
||||
This node describes the on chip SOC peripherals. Every mpc5200 based
|
||||
board will have this node, and as such there is a common naming
|
||||
convention for SOC devices.
|
||||
|
||||
|
|
@ -125,71 +144,111 @@ name type description
|
|||
device_type string must be "soc"
|
||||
ranges int should be <0 baseaddr baseaddr+10000>
|
||||
reg int must be <baseaddr 10000>
|
||||
compatible string mpc5200: "mpc5200-soc"
|
||||
mpc5200b: "mpc5200b-soc\0mpc5200-soc"
|
||||
system-frequency int Fsystem frequency; source of all
|
||||
other clocks.
|
||||
bus-frequency int IPB bus frequency in HZ. Clock rate
|
||||
used by most of the soc devices.
|
||||
#interrupt-cells int must be <3>.
|
||||
|
||||
Recommended properties:
|
||||
name type description
|
||||
---- ---- -----------
|
||||
compatible string should be "<chip>-soc\0mpc52xx-soc"
|
||||
ie. "mpc5200b-soc\0mpc52xx-soc"
|
||||
#interrupt-cells int must be <3>. If it is not defined
|
||||
here then it must be defined in every
|
||||
soc device node.
|
||||
bus-frequency int IPB bus frequency in HZ. Clock rate
|
||||
used by most of the soc devices.
|
||||
Defining it here avoids needing it
|
||||
added to every device node.
|
||||
model string Exact model of the chip;
|
||||
ie: model="fsl,mpc5200"
|
||||
revision string Silicon revision of chip
|
||||
ie: revision="M08A"
|
||||
|
||||
The 'model' and 'revision' properties are *strongly* recommended. Having
|
||||
them presence acts as a bit of a safety net for working around as yet
|
||||
undiscovered bugs on one version of silicon. For example, device drivers
|
||||
can use the model and revision properties to decide if a bug fix should
|
||||
be turned on.
|
||||
|
||||
4) soc5200 child nodes
|
||||
----------------------
|
||||
Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
|
||||
|
||||
Note: in the tables below, '*' matches all <chip> values. ie.
|
||||
*-pic would translate to "mpc5200-pic\0mpc52xx-pic"
|
||||
Note: The tables below show the value for the mpc5200. A mpc5200b device
|
||||
tree should use the "mpc5200b-<device>\0mpc5200-<device> form.
|
||||
|
||||
Required soc5200 child nodes:
|
||||
name device_type compatible Description
|
||||
---- ----------- ---------- -----------
|
||||
cdm@<addr> cdm *-cmd Clock Distribution
|
||||
pic@<addr> interrupt-controller *-pic need an interrupt
|
||||
cdm@<addr> cdm mpc5200-cmd Clock Distribution
|
||||
pic@<addr> interrupt-controller mpc5200-pic need an interrupt
|
||||
controller to boot
|
||||
bestcomm@<addr> dma-controller *-bestcomm 52xx pic also requires
|
||||
the bestcomm device
|
||||
bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
|
||||
the bestcomm device
|
||||
|
||||
Recommended soc5200 child nodes; populate as needed for your board
|
||||
name device_type compatible Description
|
||||
---- ----------- ---------- -----------
|
||||
gpt@<addr> gpt *-gpt General purpose timers
|
||||
rtc@<addr> rtc *-rtc Real time clock
|
||||
mscan@<addr> mscan *-mscan CAN bus controller
|
||||
pci@<addr> pci *-pci PCI bridge
|
||||
serial@<addr> serial *-psc-uart PSC in serial mode
|
||||
i2s@<addr> sound *-psc-i2s PSC in i2s mode
|
||||
ac97@<addr> sound *-psc-ac97 PSC in ac97 mode
|
||||
spi@<addr> spi *-psc-spi PSC in spi mode
|
||||
irda@<addr> irda *-psc-irda PSC in IrDA mode
|
||||
spi@<addr> spi *-spi MPC52xx spi device
|
||||
ethernet@<addr> network *-fec MPC52xx ethernet device
|
||||
ata@<addr> ata *-ata IDE ATA interface
|
||||
i2c@<addr> i2c *-i2c I2C controller
|
||||
usb@<addr> usb-ohci-be *-ohci,ohci-be USB controller
|
||||
xlb@<addr> xlb *-xlb XLB arbritrator
|
||||
name device_type compatible Description
|
||||
---- ----------- ---------- -----------
|
||||
gpt@<addr> gpt mpc5200-gpt General purpose timers
|
||||
rtc@<addr> rtc mpc5200-rtc Real time clock
|
||||
mscan@<addr> mscan mpc5200-mscan CAN bus controller
|
||||
pci@<addr> pci mpc5200-pci PCI bridge
|
||||
serial@<addr> serial mpc5200-psc-uart PSC in serial mode
|
||||
i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode
|
||||
ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode
|
||||
spi@<addr> spi mpc5200-psc-spi PSC in spi mode
|
||||
irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode
|
||||
spi@<addr> spi mpc5200-spi MPC5200 spi device
|
||||
ethernet@<addr> network mpc5200-fec MPC5200 ethernet device
|
||||
ata@<addr> ata mpc5200-ata IDE ATA interface
|
||||
i2c@<addr> i2c mpc5200-i2c I2C controller
|
||||
usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller
|
||||
xlb@<addr> xlb mpc5200-xlb XLB arbritrator
|
||||
|
||||
Important child node properties
|
||||
name type description
|
||||
---- ---- -----------
|
||||
cell-index int When multiple devices are present, is the
|
||||
index of the device in the hardware (ie. There
|
||||
are 6 PSC on the 5200 numbered PSC1 to PSC6)
|
||||
PSC1 has 'cell-index = <0>'
|
||||
PSC4 has 'cell-index = <3>'
|
||||
|
||||
5) General Purpose Timer nodes (child of soc5200 node)
|
||||
On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
|
||||
design supports the internal wdt, then the device node for GPT0 should
|
||||
include the empty property 'has-wdt'.
|
||||
|
||||
6) PSC nodes (child of soc5200 node)
|
||||
PSC nodes can define the optional 'port-number' property to force assignment
|
||||
order of serial ports. For example, PSC5 might be physically connected to
|
||||
the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would
|
||||
have a "port-number = <0>" property, and PSC1 would have "port-number = <1>".
|
||||
|
||||
PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
|
||||
i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
|
||||
compatible field.
|
||||
|
||||
IV - Extra Notes
|
||||
================
|
||||
|
||||
1. Interrupt mapping
|
||||
--------------------
|
||||
The mpc52xx pic driver splits hardware IRQ numbers into two levels. The
|
||||
The mpc5200 pic driver splits hardware IRQ numbers into two levels. The
|
||||
split reflects the layout of the PIC hardware itself, which groups
|
||||
interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
|
||||
Bestcomm dma engine has it's own set of interrupt sources which are
|
||||
cascaded off of peripheral interrupt 0, which the driver interprets as a
|
||||
fourth group, SDMA.
|
||||
|
||||
The interrupts property for device nodes using the mpc52xx pic consists
|
||||
The interrupts property for device nodes using the mpc5200 pic consists
|
||||
of three cells; <L1 L2 level>
|
||||
|
||||
L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
|
||||
L2 := interrupt number; directly mapped from the value in the
|
||||
"ICTL PerStat, MainStat, CritStat Encoded Register"
|
||||
level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
|
||||
|
||||
2. Shared registers
|
||||
-------------------
|
||||
Some SoC devices share registers between them. ie. the i2c devices use
|
||||
a single clock control register, and almost all device are affected by
|
||||
the port_config register. Devices which need to manipulate shared regs
|
||||
should look to the parent SoC node. The soc node is responsible
|
||||
for arbitrating all shared register access.
|
||||
|
|
|
|||
|
|
@ -876,7 +876,7 @@ config ARCH_SPARSEMEM_ENABLE
|
|||
|
||||
config ARCH_SPARSEMEM_DEFAULT
|
||||
def_bool y
|
||||
depends on (SMP && PPC_PSERIES) || PPC_CELL
|
||||
depends on (SMP && PPC_PSERIES) || PPC_PS3
|
||||
|
||||
config ARCH_POPULATES_NODE_MAP
|
||||
def_bool y
|
||||
|
|
|
|||
|
|
@ -0,0 +1,148 @@
|
|||
/*
|
||||
* Device Tree Souce for Buffalo KuroboxHD
|
||||
*
|
||||
* Choose CONFIG_LINKSTATION to build a kernel for KuroboxHD, or use
|
||||
* the default configuration linkstation_defconfig.
|
||||
*
|
||||
* Based on sandpoint.dts
|
||||
*
|
||||
* 2006 (c) G. Liakhovetski <g.liakhovetski@gmx.de>
|
||||
*
|
||||
* This file is licensed under
|
||||
* the terms of the GNU General Public License version 2. This program
|
||||
* is licensed "as is" without any warranty of any kind, whether express
|
||||
* or implied.
|
||||
|
||||
XXXX add flash parts, rtc, ??
|
||||
|
||||
build with: "dtc -f -I dts -O dtb -o kuroboxHD.dtb -V 16 kuroboxHD.dts"
|
||||
|
||||
|
||||
*/
|
||||
|
||||
/ {
|
||||
linux,phandle = <1000>;
|
||||
model = "KuroboxHD";
|
||||
compatible = "linkstation";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
cpus {
|
||||
linux,phandle = <2000>;
|
||||
#cpus = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,603e { /* Really 8241 */
|
||||
linux,phandle = <2100>;
|
||||
linux,boot-cpu;
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
clock-frequency = <bebc200>; /* Fixed by bootwrapper */
|
||||
timebase-frequency = <1743000>; /* Fixed by bootwrapper */
|
||||
bus-frequency = <0>; /* From bootloader */
|
||||
/* Following required by dtc but not used */
|
||||
i-cache-line-size = <0>;
|
||||
d-cache-line-size = <0>;
|
||||
i-cache-size = <4000>;
|
||||
d-cache-size = <4000>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
linux,phandle = <3000>;
|
||||
device_type = "memory";
|
||||
reg = <00000000 04000000>;
|
||||
};
|
||||
|
||||
soc10x { /* AFAICT need to make soc for 8245's uarts to be defined */
|
||||
linux,phandle = <4000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "soc";
|
||||
compatible = "mpc10x";
|
||||
store-gathering = <0>; /* 0 == off, !0 == on */
|
||||
reg = <80000000 00100000>;
|
||||
ranges = <80000000 80000000 70000000 /* pci mem space */
|
||||
fc000000 fc000000 00100000 /* EUMB */
|
||||
fe000000 fe000000 00c00000 /* pci i/o space */
|
||||
fec00000 fec00000 00300000 /* pci cfg regs */
|
||||
fef00000 fef00000 00100000>; /* pci iack */
|
||||
|
||||
i2c@80003000 {
|
||||
linux,phandle = <4300>;
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <80003000 1000>;
|
||||
interrupts = <5 2>;
|
||||
interrupt-parent = <4400>;
|
||||
};
|
||||
|
||||
serial@80004500 {
|
||||
linux,phandle = <4511>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <80004500 8>;
|
||||
clock-frequency = <5d08d88>;
|
||||
current-speed = <2580>;
|
||||
interrupts = <9 2>;
|
||||
interrupt-parent = <4400>;
|
||||
};
|
||||
|
||||
serial@80004600 {
|
||||
linux,phandle = <4512>;
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <80004600 8>;
|
||||
clock-frequency = <5d08d88>;
|
||||
current-speed = <e100>;
|
||||
interrupts = <a 0>;
|
||||
interrupt-parent = <4400>;
|
||||
};
|
||||
|
||||
pic@80040000 {
|
||||
linux,phandle = <4400>;
|
||||
#interrupt-cells = <2>;
|
||||
#address-cells = <0>;
|
||||
device_type = "open-pic";
|
||||
compatible = "chrp,open-pic";
|
||||
interrupt-controller;
|
||||
reg = <80040000 40000>;
|
||||
built-in;
|
||||
};
|
||||
|
||||
pci@fec00000 {
|
||||
linux,phandle = <4500>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
#interrupt-cells = <1>;
|
||||
device_type = "pci";
|
||||
compatible = "mpc10x-pci";
|
||||
reg = <fec00000 400000>;
|
||||
ranges = <01000000 0 0 fe000000 0 00c00000
|
||||
02000000 0 80000000 80000000 0 70000000>;
|
||||
bus-range = <0 ff>;
|
||||
clock-frequency = <7f28155>;
|
||||
interrupt-parent = <4400>;
|
||||
interrupt-map-mask = <f800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x11 - IRQ0 ETH */
|
||||
5800 0 0 1 4400 0 1
|
||||
5800 0 0 2 4400 1 1
|
||||
5800 0 0 3 4400 2 1
|
||||
5800 0 0 4 4400 3 1
|
||||
/* IDSEL 0x12 - IRQ1 IDE0 */
|
||||
6000 0 0 1 4400 1 1
|
||||
6000 0 0 2 4400 2 1
|
||||
6000 0 0 3 4400 3 1
|
||||
6000 0 0 4 4400 0 1
|
||||
/* IDSEL 0x14 - IRQ3 USB2.0 */
|
||||
7000 0 0 1 4400 3 1
|
||||
7000 0 0 2 4400 3 1
|
||||
7000 0 0 3 4400 3 1
|
||||
7000 0 0 4 4400 3 1
|
||||
>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Lite5200 board Device Tree Source
|
||||
*
|
||||
* Copyright 2006 Secret Lab Technologies Ltd.
|
||||
* Copyright 2006-2007 Secret Lab Technologies Ltd.
|
||||
* Grant Likely <grant.likely@secretlab.ca>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
|
|
@ -17,8 +17,9 @@
|
|||
*/
|
||||
|
||||
/ {
|
||||
model = "Lite5200";
|
||||
compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx";
|
||||
model = "fsl,lite5200";
|
||||
// revision = "1.0";
|
||||
compatible = "fsl,lite5200\0generic-mpc5200";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
@ -47,14 +48,17 @@
|
|||
};
|
||||
|
||||
soc5200@f0000000 {
|
||||
model = "fsl,mpc5200";
|
||||
revision = "" // from bootloader
|
||||
#interrupt-cells = <3>;
|
||||
device_type = "soc";
|
||||
ranges = <0 f0000000 f0010000>;
|
||||
reg = <f0000000 00010000>;
|
||||
bus-frequency = <0>; // from bootloader
|
||||
system-frequency = <0>; // from bootloader
|
||||
|
||||
cdm@200 {
|
||||
compatible = "mpc5200-cdm\0mpc52xx-cdm";
|
||||
compatible = "mpc5200-cdm";
|
||||
reg = <200 38>;
|
||||
};
|
||||
|
||||
|
|
@ -64,77 +68,86 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
device_type = "interrupt-controller";
|
||||
compatible = "mpc5200-pic\0mpc52xx-pic";
|
||||
compatible = "mpc5200-pic";
|
||||
reg = <500 80>;
|
||||
built-in;
|
||||
};
|
||||
|
||||
gpt@600 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <0>;
|
||||
reg = <600 10>;
|
||||
interrupts = <1 9 0>;
|
||||
interrupt-parent = <500>;
|
||||
has-wdt;
|
||||
};
|
||||
|
||||
gpt@610 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <1>;
|
||||
reg = <610 10>;
|
||||
interrupts = <1 a 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@620 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <2>;
|
||||
reg = <620 10>;
|
||||
interrupts = <1 b 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@630 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <3>;
|
||||
reg = <630 10>;
|
||||
interrupts = <1 c 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@640 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <4>;
|
||||
reg = <640 10>;
|
||||
interrupts = <1 d 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@650 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <5>;
|
||||
reg = <650 10>;
|
||||
interrupts = <1 e 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@660 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <6>;
|
||||
reg = <660 10>;
|
||||
interrupts = <1 f 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@670 { // General Purpose Timer
|
||||
compatible = "mpc5200-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <7>;
|
||||
reg = <670 10>;
|
||||
interrupts = <1 10 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
rtc@800 { // Real time clock
|
||||
compatible = "mpc5200-rtc\0mpc52xx-rtc";
|
||||
compatible = "mpc5200-rtc";
|
||||
device_type = "rtc";
|
||||
reg = <800 100>;
|
||||
interrupts = <1 5 0 1 6 0>;
|
||||
|
|
@ -143,7 +156,8 @@
|
|||
|
||||
mscan@900 {
|
||||
device_type = "mscan";
|
||||
compatible = "mpc5200-mscan\0mpc52xx-mscan";
|
||||
compatible = "mpc5200-mscan";
|
||||
cell-index = <0>;
|
||||
interrupts = <2 11 0>;
|
||||
interrupt-parent = <500>;
|
||||
reg = <900 80>;
|
||||
|
|
@ -151,21 +165,22 @@
|
|||
|
||||
mscan@980 {
|
||||
device_type = "mscan";
|
||||
compatible = "mpc5200-mscan\0mpc52xx-mscan";
|
||||
compatible = "mpc5200-mscan";
|
||||
cell-index = <1>;
|
||||
interrupts = <1 12 0>;
|
||||
interrupt-parent = <500>;
|
||||
reg = <980 80>;
|
||||
};
|
||||
|
||||
gpio@b00 {
|
||||
compatible = "mpc5200-gpio\0mpc52xx-gpio";
|
||||
compatible = "mpc5200-gpio";
|
||||
reg = <b00 40>;
|
||||
interrupts = <1 7 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpio-wkup@b00 {
|
||||
compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup";
|
||||
compatible = "mpc5200-gpio-wkup";
|
||||
reg = <c00 40>;
|
||||
interrupts = <1 8 0 0 3 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -176,7 +191,7 @@
|
|||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
compatible = "mpc5200-pci\0mpc52xx-pci";
|
||||
compatible = "mpc5200-pci";
|
||||
reg = <d00 100>;
|
||||
interrupt-map-mask = <f800 0 0 7>;
|
||||
interrupt-map = <c000 0 0 1 500 0 0 3
|
||||
|
|
@ -194,7 +209,7 @@
|
|||
|
||||
spi@f00 {
|
||||
device_type = "spi";
|
||||
compatible = "mpc5200-spi\0mpc52xx-spi";
|
||||
compatible = "mpc5200-spi";
|
||||
reg = <f00 20>;
|
||||
interrupts = <2 d 0 2 e 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -202,7 +217,7 @@
|
|||
|
||||
usb@1000 {
|
||||
device_type = "usb-ohci-be";
|
||||
compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be";
|
||||
compatible = "mpc5200-ohci\0ohci-be";
|
||||
reg = <1000 ff>;
|
||||
interrupts = <2 6 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -210,7 +225,7 @@
|
|||
|
||||
bestcomm@1200 {
|
||||
device_type = "dma-controller";
|
||||
compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm";
|
||||
compatible = "mpc5200-bestcomm";
|
||||
reg = <1200 80>;
|
||||
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
|
||||
3 4 0 3 5 0 3 6 0 3 7 0
|
||||
|
|
@ -220,67 +235,73 @@
|
|||
};
|
||||
|
||||
xlb@1f00 {
|
||||
compatible = "mpc5200-xlb\0mpc52xx-xlb";
|
||||
compatible = "mpc5200-xlb";
|
||||
reg = <1f00 100>;
|
||||
};
|
||||
|
||||
serial@2000 { // PSC1
|
||||
device_type = "serial";
|
||||
compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
|
||||
compatible = "mpc5200-psc-uart";
|
||||
port-number = <0>; // Logical port assignment
|
||||
cell-index = <0>;
|
||||
reg = <2000 100>;
|
||||
interrupts = <2 1 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
// PSC2 in spi mode example
|
||||
spi@2200 { // PSC2
|
||||
device_type = "spi";
|
||||
compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi";
|
||||
reg = <2200 100>;
|
||||
interrupts = <2 2 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
// PSC2 in ac97 mode example
|
||||
//ac97@2200 { // PSC2
|
||||
// device_type = "sound";
|
||||
// compatible = "mpc5200-psc-ac97";
|
||||
// cell-index = <1>;
|
||||
// reg = <2200 100>;
|
||||
// interrupts = <2 2 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC3 in CODEC mode example
|
||||
i2s@2400 { // PSC3
|
||||
device_type = "sound";
|
||||
compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s";
|
||||
reg = <2400 100>;
|
||||
interrupts = <2 3 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
//i2s@2400 { // PSC3
|
||||
// device_type = "sound";
|
||||
// compatible = "mpc5200-psc-i2s";
|
||||
// cell-index = <2>;
|
||||
// reg = <2400 100>;
|
||||
// interrupts = <2 3 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC4 unconfigured
|
||||
// PSC4 in uart mode example
|
||||
//serial@2600 { // PSC4
|
||||
// device_type = "serial";
|
||||
// compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
|
||||
// compatible = "mpc5200-psc-uart";
|
||||
// cell-index = <3>;
|
||||
// reg = <2600 100>;
|
||||
// interrupts = <2 b 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC5 unconfigured
|
||||
// PSC5 in uart mode example
|
||||
//serial@2800 { // PSC5
|
||||
// device_type = "serial";
|
||||
// compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart";
|
||||
// compatible = "mpc5200-psc-uart";
|
||||
// cell-index = <4>;
|
||||
// reg = <2800 100>;
|
||||
// interrupts = <2 c 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC6 in AC97 mode example
|
||||
ac97@2c00 { // PSC6
|
||||
device_type = "sound";
|
||||
compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97";
|
||||
reg = <2c00 100>;
|
||||
interrupts = <2 4 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
// PSC6 in spi mode example
|
||||
//spi@2c00 { // PSC6
|
||||
// device_type = "spi";
|
||||
// compatible = "mpc5200-psc-spi";
|
||||
// cell-index = <5>;
|
||||
// reg = <2c00 100>;
|
||||
// interrupts = <2 4 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
ethernet@3000 {
|
||||
device_type = "network";
|
||||
compatible = "mpc5200-fec\0mpc52xx-fec";
|
||||
compatible = "mpc5200-fec";
|
||||
reg = <3000 800>;
|
||||
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
|
||||
interrupts = <2 5 0>;
|
||||
|
|
@ -289,7 +310,7 @@
|
|||
|
||||
ata@3a00 {
|
||||
device_type = "ata";
|
||||
compatible = "mpc5200-ata\0mpc52xx-ata";
|
||||
compatible = "mpc5200-ata";
|
||||
reg = <3a00 100>;
|
||||
interrupts = <2 7 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -297,7 +318,8 @@
|
|||
|
||||
i2c@3d00 {
|
||||
device_type = "i2c";
|
||||
compatible = "mpc5200-i2c\0mpc52xx-i2c";
|
||||
compatible = "mpc5200-i2c";
|
||||
cell-index = <0>;
|
||||
reg = <3d00 40>;
|
||||
interrupts = <2 f 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -305,14 +327,15 @@
|
|||
|
||||
i2c@3d40 {
|
||||
device_type = "i2c";
|
||||
compatible = "mpc5200-i2c\0mpc52xx-i2c";
|
||||
compatible = "mpc5200-i2c";
|
||||
cell-index = <1>;
|
||||
reg = <3d40 40>;
|
||||
interrupts = <2 10 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
sram@8000 {
|
||||
device_type = "sram";
|
||||
compatible = "mpc5200-sram\0mpc52xx-sram\0sram";
|
||||
compatible = "mpc5200-sram\0sram";
|
||||
reg = <8000 4000>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* Lite5200B board Device Tree Source
|
||||
*
|
||||
* Copyright 2006 Secret Lab Technologies Ltd.
|
||||
* Copyright 2006-2007 Secret Lab Technologies Ltd.
|
||||
* Grant Likely <grant.likely@secretlab.ca>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
|
|
@ -17,8 +17,9 @@
|
|||
*/
|
||||
|
||||
/ {
|
||||
model = "Lite5200b";
|
||||
compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx";
|
||||
model = "fsl,lite5200b";
|
||||
// revision = "1.0";
|
||||
compatible = "fsl,lite5200b\0generic-mpc5200";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
|
|
@ -47,14 +48,17 @@
|
|||
};
|
||||
|
||||
soc5200@f0000000 {
|
||||
model = "fsl,mpc5200b";
|
||||
revision = ""; // from bootloader
|
||||
#interrupt-cells = <3>;
|
||||
device_type = "soc";
|
||||
ranges = <0 f0000000 f0010000>;
|
||||
reg = <f0000000 00010000>;
|
||||
bus-frequency = <0>; // from bootloader
|
||||
system-frequency = <0>; // from bootloader
|
||||
|
||||
cdm@200 {
|
||||
compatible = "mpc5200b-cdm\0mpc52xx-cdm";
|
||||
compatible = "mpc5200b-cdm\0mpc5200-cdm";
|
||||
reg = <200 38>;
|
||||
};
|
||||
|
||||
|
|
@ -64,77 +68,86 @@
|
|||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
device_type = "interrupt-controller";
|
||||
compatible = "mpc5200b-pic\0mpc52xx-pic";
|
||||
compatible = "mpc5200b-pic\0mpc5200-pic";
|
||||
reg = <500 80>;
|
||||
built-in;
|
||||
};
|
||||
|
||||
gpt@600 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <0>;
|
||||
reg = <600 10>;
|
||||
interrupts = <1 9 0>;
|
||||
interrupt-parent = <500>;
|
||||
has-wdt;
|
||||
};
|
||||
|
||||
gpt@610 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <1>;
|
||||
reg = <610 10>;
|
||||
interrupts = <1 a 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@620 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <2>;
|
||||
reg = <620 10>;
|
||||
interrupts = <1 b 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@630 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <3>;
|
||||
reg = <630 10>;
|
||||
interrupts = <1 c 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@640 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <4>;
|
||||
reg = <640 10>;
|
||||
interrupts = <1 d 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@650 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <5>;
|
||||
reg = <650 10>;
|
||||
interrupts = <1 e 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@660 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <6>;
|
||||
reg = <660 10>;
|
||||
interrupts = <1 f 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpt@670 { // General Purpose Timer
|
||||
compatible = "mpc5200b-gpt\0mpc52xx-gpt";
|
||||
compatible = "mpc5200b-gpt\0mpc5200-gpt";
|
||||
device_type = "gpt";
|
||||
cell-index = <7>;
|
||||
reg = <670 10>;
|
||||
interrupts = <1 10 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
rtc@800 { // Real time clock
|
||||
compatible = "mpc5200b-rtc\0mpc52xx-rtc";
|
||||
compatible = "mpc5200b-rtc\0mpc5200-rtc";
|
||||
device_type = "rtc";
|
||||
reg = <800 100>;
|
||||
interrupts = <1 5 0 1 6 0>;
|
||||
|
|
@ -143,7 +156,8 @@
|
|||
|
||||
mscan@900 {
|
||||
device_type = "mscan";
|
||||
compatible = "mpc5200b-mscan\0mpc52xx-mscan";
|
||||
compatible = "mpc5200b-mscan\0mpc5200-mscan";
|
||||
cell-index = <0>;
|
||||
interrupts = <2 11 0>;
|
||||
interrupt-parent = <500>;
|
||||
reg = <900 80>;
|
||||
|
|
@ -151,21 +165,22 @@
|
|||
|
||||
mscan@980 {
|
||||
device_type = "mscan";
|
||||
compatible = "mpc5200b-mscan\0mpc52xx-mscan";
|
||||
compatible = "mpc5200b-mscan\0mpc5200-mscan";
|
||||
cell-index = <1>;
|
||||
interrupts = <1 12 0>;
|
||||
interrupt-parent = <500>;
|
||||
reg = <980 80>;
|
||||
};
|
||||
|
||||
gpio@b00 {
|
||||
compatible = "mpc5200b-gpio\0mpc52xx-gpio";
|
||||
compatible = "mpc5200b-gpio\0mpc5200-gpio";
|
||||
reg = <b00 40>;
|
||||
interrupts = <1 7 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
gpio-wkup@b00 {
|
||||
compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup";
|
||||
compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
|
||||
reg = <c00 40>;
|
||||
interrupts = <1 8 0 0 3 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -176,7 +191,7 @@
|
|||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
device_type = "pci";
|
||||
compatible = "mpc5200b-pci\0mpc52xx-pci";
|
||||
compatible = "mpc5200b-pci\0mpc5200-pci";
|
||||
reg = <d00 100>;
|
||||
interrupt-map-mask = <f800 0 0 7>;
|
||||
interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
|
||||
|
|
@ -199,7 +214,7 @@
|
|||
|
||||
spi@f00 {
|
||||
device_type = "spi";
|
||||
compatible = "mpc5200b-spi\0mpc52xx-spi";
|
||||
compatible = "mpc5200b-spi\0mpc5200-spi";
|
||||
reg = <f00 20>;
|
||||
interrupts = <2 d 0 2 e 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -207,7 +222,7 @@
|
|||
|
||||
usb@1000 {
|
||||
device_type = "usb-ohci-be";
|
||||
compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be";
|
||||
compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
|
||||
reg = <1000 ff>;
|
||||
interrupts = <2 6 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -215,7 +230,7 @@
|
|||
|
||||
bestcomm@1200 {
|
||||
device_type = "dma-controller";
|
||||
compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm";
|
||||
compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
|
||||
reg = <1200 80>;
|
||||
interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
|
||||
3 4 0 3 5 0 3 6 0 3 7 0
|
||||
|
|
@ -225,67 +240,73 @@
|
|||
};
|
||||
|
||||
xlb@1f00 {
|
||||
compatible = "mpc5200b-xlb\0mpc52xx-xlb";
|
||||
compatible = "mpc5200b-xlb\0mpc5200-xlb";
|
||||
reg = <1f00 100>;
|
||||
};
|
||||
|
||||
serial@2000 { // PSC1
|
||||
device_type = "serial";
|
||||
compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
|
||||
compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
|
||||
port-number = <0>; // Logical port assignment
|
||||
cell-index = <0>;
|
||||
reg = <2000 100>;
|
||||
interrupts = <2 1 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
|
||||
// PSC2 in spi mode example
|
||||
spi@2200 { // PSC2
|
||||
device_type = "spi";
|
||||
compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi";
|
||||
reg = <2200 100>;
|
||||
interrupts = <2 2 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
// PSC2 in ac97 mode example
|
||||
//ac97@2200 { // PSC2
|
||||
// device_type = "sound";
|
||||
// compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
|
||||
// cell-index = <1>;
|
||||
// reg = <2200 100>;
|
||||
// interrupts = <2 2 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC3 in CODEC mode example
|
||||
i2s@2400 { // PSC3
|
||||
device_type = "sound";
|
||||
compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s";
|
||||
reg = <2400 100>;
|
||||
interrupts = <2 3 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
//i2s@2400 { // PSC3
|
||||
// device_type = "sound";
|
||||
// compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
|
||||
// cell-index = <2>;
|
||||
// reg = <2400 100>;
|
||||
// interrupts = <2 3 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC4 unconfigured
|
||||
// PSC4 in uart mode example
|
||||
//serial@2600 { // PSC4
|
||||
// device_type = "serial";
|
||||
// compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
|
||||
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
|
||||
// cell-index = <3>;
|
||||
// reg = <2600 100>;
|
||||
// interrupts = <2 b 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC5 unconfigured
|
||||
// PSC5 in uart mode example
|
||||
//serial@2800 { // PSC5
|
||||
// device_type = "serial";
|
||||
// compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart";
|
||||
// compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
|
||||
// cell-index = <4>;
|
||||
// reg = <2800 100>;
|
||||
// interrupts = <2 c 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
// PSC6 in AC97 mode example
|
||||
ac97@2c00 { // PSC6
|
||||
device_type = "sound";
|
||||
compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97";
|
||||
reg = <2c00 100>;
|
||||
interrupts = <2 4 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
// PSC6 in spi mode example
|
||||
//spi@2c00 { // PSC6
|
||||
// device_type = "spi";
|
||||
// compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
|
||||
// cell-index = <5>;
|
||||
// reg = <2c00 100>;
|
||||
// interrupts = <2 4 0>;
|
||||
// interrupt-parent = <500>;
|
||||
//};
|
||||
|
||||
ethernet@3000 {
|
||||
device_type = "network";
|
||||
compatible = "mpc5200b-fec\0mpc52xx-fec";
|
||||
compatible = "mpc5200b-fec\0mpc5200-fec";
|
||||
reg = <3000 800>;
|
||||
mac-address = [ 02 03 04 05 06 07 ]; // Bad!
|
||||
interrupts = <2 5 0>;
|
||||
|
|
@ -294,7 +315,7 @@
|
|||
|
||||
ata@3a00 {
|
||||
device_type = "ata";
|
||||
compatible = "mpc5200b-ata\0mpc52xx-ata";
|
||||
compatible = "mpc5200b-ata\0mpc5200-ata";
|
||||
reg = <3a00 100>;
|
||||
interrupts = <2 7 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -302,7 +323,8 @@
|
|||
|
||||
i2c@3d00 {
|
||||
device_type = "i2c";
|
||||
compatible = "mpc5200b-i2c\0mpc52xx-i2c";
|
||||
compatible = "mpc5200b-i2c\0mpc5200-i2c";
|
||||
cell-index = <0>;
|
||||
reg = <3d00 40>;
|
||||
interrupts = <2 f 0>;
|
||||
interrupt-parent = <500>;
|
||||
|
|
@ -310,14 +332,15 @@
|
|||
|
||||
i2c@3d40 {
|
||||
device_type = "i2c";
|
||||
compatible = "mpc5200b-i2c\0mpc52xx-i2c";
|
||||
compatible = "mpc5200b-i2c\0mpc5200-i2c";
|
||||
cell-index = <1>;
|
||||
reg = <3d40 40>;
|
||||
interrupts = <2 10 0>;
|
||||
interrupt-parent = <500>;
|
||||
};
|
||||
sram@8000 {
|
||||
device_type = "sram";
|
||||
compatible = "mpc5200b-sram\0mpc52xx-sram\0sram";
|
||||
compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
|
||||
reg = <8000 4000>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,219 @@
|
|||
/*
|
||||
* MPC8313E RDB Device Tree Source
|
||||
*
|
||||
* Copyright 2005, 2006, 2007 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
/ {
|
||||
model = "MPC8313ERDB";
|
||||
compatible = "MPC83xx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
cpus {
|
||||
#cpus = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8313@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <20>; // 32 bytes
|
||||
i-cache-line-size = <20>; // 32 bytes
|
||||
d-cache-size = <4000>; // L1, 16K
|
||||
i-cache-size = <4000>; // L1, 16K
|
||||
timebase-frequency = <0>; // from bootloader
|
||||
bus-frequency = <0>; // from bootloader
|
||||
clock-frequency = <0>; // from bootloader
|
||||
32-bit;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <00000000 08000000>; // 128MB at 0
|
||||
};
|
||||
|
||||
soc8313@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "soc";
|
||||
ranges = <0 e0000000 00100000>;
|
||||
reg = <e0000000 00000200>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
wdt@200 {
|
||||
device_type = "watchdog";
|
||||
compatible = "mpc83xx_wdt";
|
||||
reg = <200 100>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <3000 100>;
|
||||
interrupts = <e 8>;
|
||||
interrupt-parent = <700>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <3100 100>;
|
||||
interrupts = <f 8>;
|
||||
interrupt-parent = <700>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
device_type = "spi";
|
||||
compatible = "mpc83xx_spi";
|
||||
reg = <7000 1000>;
|
||||
interrupts = <10 8>;
|
||||
interrupt-parent = <700>;
|
||||
mode = <0>;
|
||||
};
|
||||
|
||||
/* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
|
||||
usb@23000 {
|
||||
device_type = "usb";
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <23000 1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <26 2>;
|
||||
phy_type = "utmi_wide";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
device_type = "mdio";
|
||||
compatible = "gianfar";
|
||||
reg = <24520 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
linux,phandle = <24520>;
|
||||
ethernet-phy@1 {
|
||||
linux,phandle = <2452001>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <13 2>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
ethernet-phy@4 {
|
||||
linux,phandle = <2452004>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <14 2>;
|
||||
reg = <4>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@24000 {
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <24000 1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <25 8 24 8 23 8>;
|
||||
interrupt-parent = <700>;
|
||||
phy-handle = <2452001>;
|
||||
};
|
||||
|
||||
ethernet@25000 {
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <25000 1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <22 8 21 8 20 8>;
|
||||
interrupt-parent = <700>;
|
||||
phy-handle = <2452004>;
|
||||
};
|
||||
|
||||
serial@4500 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <4500 100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <9 8>;
|
||||
interrupt-parent = <700>;
|
||||
};
|
||||
|
||||
serial@4600 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <4600 100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <a 8>;
|
||||
interrupt-parent = <700>;
|
||||
};
|
||||
|
||||
pci@8500 {
|
||||
interrupt-map-mask = <f800 0 0 7>;
|
||||
interrupt-map = <
|
||||
|
||||
/* IDSEL 0x0E -mini PCI */
|
||||
7000 0 0 1 700 12 8
|
||||
7000 0 0 2 700 12 8
|
||||
7000 0 0 3 700 12 8
|
||||
7000 0 0 4 700 12 8
|
||||
|
||||
/* IDSEL 0x0F - PCI slot */
|
||||
7800 0 0 1 700 11 8
|
||||
7800 0 0 2 700 12 8
|
||||
7800 0 0 3 700 11 8
|
||||
7800 0 0 4 700 12 8>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <42 8>;
|
||||
bus-range = <0 0>;
|
||||
ranges = <02000000 0 90000000 90000000 0 10000000
|
||||
42000000 0 80000000 80000000 0 10000000
|
||||
01000000 0 00000000 e2000000 0 00100000>;
|
||||
clock-frequency = <3f940aa>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <8500 100>;
|
||||
compatible = "83xx";
|
||||
device_type = "pci";
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
device_type = "crypto";
|
||||
model = "SEC2";
|
||||
compatible = "talitos";
|
||||
reg = <30000 7000>;
|
||||
interrupts = <b 8>;
|
||||
interrupt-parent = <700>;
|
||||
/* Rev. 2.2 */
|
||||
num-channels = <1>;
|
||||
channel-fifo-len = <18>;
|
||||
exec-units-mask = <0000004c>;
|
||||
descriptor-types-mask = <0122003f>;
|
||||
};
|
||||
|
||||
/* IPIC
|
||||
* interrupts cell = <intr #, sense>
|
||||
* sense values match linux IORESOURCE_IRQ_* defines:
|
||||
* sense == 8: Level, low assertion
|
||||
* sense == 2: Edge, high-to-low change
|
||||
*/
|
||||
pic@700 {
|
||||
linux,phandle = <700>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <700 100>;
|
||||
built-in;
|
||||
device_type = "ipic";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,187 @@
|
|||
/*
|
||||
* MPC8349E-mITX-GP Device Tree Source
|
||||
*
|
||||
* Copyright 2007 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
/ {
|
||||
model = "MPC8349EMITXGP";
|
||||
compatible = "MPC834xMITXGP";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
cpus {
|
||||
#cpus = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
PowerPC,8349@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <20>;
|
||||
i-cache-line-size = <20>;
|
||||
d-cache-size = <8000>;
|
||||
i-cache-size = <8000>;
|
||||
timebase-frequency = <0>; // from bootloader
|
||||
bus-frequency = <0>; // from bootloader
|
||||
clock-frequency = <0>; // from bootloader
|
||||
32-bit;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <00000000 10000000>;
|
||||
};
|
||||
|
||||
soc8349@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "soc";
|
||||
ranges = <0 e0000000 00100000>;
|
||||
reg = <e0000000 00000200>;
|
||||
bus-frequency = <0>; // from bootloader
|
||||
|
||||
wdt@200 {
|
||||
device_type = "watchdog";
|
||||
compatible = "mpc83xx_wdt";
|
||||
reg = <200 100>;
|
||||
};
|
||||
|
||||
i2c@3000 {
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <3000 100>;
|
||||
interrupts = <e 8>;
|
||||
interrupt-parent = <700>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <3100 100>;
|
||||
interrupts = <f 8>;
|
||||
interrupt-parent = <700>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
spi@7000 {
|
||||
device_type = "spi";
|
||||
compatible = "mpc83xx_spi";
|
||||
reg = <7000 1000>;
|
||||
interrupts = <10 8>;
|
||||
interrupt-parent = <700>;
|
||||
mode = <0>;
|
||||
};
|
||||
|
||||
usb@23000 {
|
||||
device_type = "usb";
|
||||
compatible = "fsl-usb2-dr";
|
||||
reg = <23000 1000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <26 2>;
|
||||
dr_mode = "otg";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
device_type = "mdio";
|
||||
compatible = "gianfar";
|
||||
reg = <24520 20>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
linux,phandle = <24520>;
|
||||
|
||||
/* Vitesse 8201 */
|
||||
ethernet-phy@1c {
|
||||
linux,phandle = <245201c>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <12 2>;
|
||||
reg = <1c>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@24000 {
|
||||
device_type = "network";
|
||||
model = "TSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <24000 1000>;
|
||||
local-mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <20 8 21 8 22 8>;
|
||||
interrupt-parent = <700>;
|
||||
phy-handle = <245201c>;
|
||||
};
|
||||
|
||||
serial@4500 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <4500 100>;
|
||||
clock-frequency = <0>; // from bootloader
|
||||
interrupts = <9 8>;
|
||||
interrupt-parent = <700>;
|
||||
};
|
||||
|
||||
serial@4600 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <4600 100>;
|
||||
clock-frequency = <0>; // from bootloader
|
||||
interrupts = <a 8>;
|
||||
interrupt-parent = <700>;
|
||||
};
|
||||
|
||||
pci@8600 {
|
||||
interrupt-map-mask = <f800 0 0 7>;
|
||||
interrupt-map = <
|
||||
/* IDSEL 0x0F - PCI Slot */
|
||||
7800 0 0 1 700 14 8 /* PCI_INTA */
|
||||
7800 0 0 2 700 15 8 /* PCI_INTB */
|
||||
>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <43 8>;
|
||||
bus-range = <1 1>;
|
||||
ranges = <42000000 0 a0000000 a0000000 0 10000000
|
||||
02000000 0 b0000000 b0000000 0 10000000
|
||||
01000000 0 00000000 e3000000 0 01000000>;
|
||||
clock-frequency = <3f940aa>;
|
||||
#interrupt-cells = <1>;
|
||||
#size-cells = <2>;
|
||||
#address-cells = <3>;
|
||||
reg = <8600 100>;
|
||||
compatible = "83xx";
|
||||
device_type = "pci";
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
device_type = "crypto";
|
||||
model = "SEC2";
|
||||
compatible = "talitos";
|
||||
reg = <30000 10000>;
|
||||
interrupts = <b 8>;
|
||||
interrupt-parent = <700>;
|
||||
num-channels = <4>;
|
||||
channel-fifo-len = <18>;
|
||||
exec-units-mask = <0000007e>;
|
||||
descriptor-types-mask = <01010ebf>;
|
||||
};
|
||||
|
||||
pic@700 {
|
||||
linux,phandle = <700>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <700 100>;
|
||||
built-in;
|
||||
device_type = "ipic";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -39,6 +39,11 @@
|
|||
reg = <00000000 10000000>; // 256MB at 0
|
||||
};
|
||||
|
||||
bcsr@e2400000 {
|
||||
device_type = "board-control";
|
||||
reg = <e2400000 8000>;
|
||||
};
|
||||
|
||||
soc8349@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -103,6 +108,7 @@
|
|||
#size-cells = <0>;
|
||||
interrupt-parent = <700>;
|
||||
interrupts = <26 2>;
|
||||
dr_mode = "otg";
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
|
|
@ -0,0 +1,380 @@
|
|||
/*
|
||||
* MPC8568E MDS Device Tree Source
|
||||
*
|
||||
* Copyright 2007 Freescale Semiconductor Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
|
||||
/*
|
||||
/memreserve/ 00000000 1000000;
|
||||
*/
|
||||
|
||||
/ {
|
||||
model = "MPC8568EMDS";
|
||||
compatible = "MPC85xxMDS";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
linux,phandle = <100>;
|
||||
|
||||
cpus {
|
||||
#cpus = <1>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
linux,phandle = <200>;
|
||||
|
||||
PowerPC,8568@0 {
|
||||
device_type = "cpu";
|
||||
reg = <0>;
|
||||
d-cache-line-size = <20>; // 32 bytes
|
||||
i-cache-line-size = <20>; // 32 bytes
|
||||
d-cache-size = <8000>; // L1, 32K
|
||||
i-cache-size = <8000>; // L1, 32K
|
||||
timebase-frequency = <0>;
|
||||
bus-frequency = <0>;
|
||||
clock-frequency = <0>;
|
||||
32-bit;
|
||||
linux,phandle = <201>;
|
||||
};
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
linux,phandle = <300>;
|
||||
reg = <00000000 10000000>;
|
||||
};
|
||||
|
||||
bcsr@f8000000 {
|
||||
device_type = "board-control";
|
||||
reg = <f8000000 8000>;
|
||||
};
|
||||
|
||||
soc8568@e0000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#interrupt-cells = <2>;
|
||||
device_type = "soc";
|
||||
ranges = <0 e0000000 00100000>;
|
||||
reg = <e0000000 00100000>;
|
||||
bus-frequency = <0>;
|
||||
|
||||
i2c@3000 {
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <3000 100>;
|
||||
interrupts = <1b 2>;
|
||||
interrupt-parent = <40000>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
i2c@3100 {
|
||||
device_type = "i2c";
|
||||
compatible = "fsl-i2c";
|
||||
reg = <3100 100>;
|
||||
interrupts = <1b 2>;
|
||||
interrupt-parent = <40000>;
|
||||
dfsrr;
|
||||
};
|
||||
|
||||
mdio@24520 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
device_type = "mdio";
|
||||
compatible = "gianfar";
|
||||
reg = <24520 20>;
|
||||
linux,phandle = <24520>;
|
||||
ethernet-phy@0 {
|
||||
linux,phandle = <2452000>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <31 1>;
|
||||
reg = <0>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
ethernet-phy@1 {
|
||||
linux,phandle = <2452001>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <32 1>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
|
||||
ethernet-phy@2 {
|
||||
linux,phandle = <2452002>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <31 1>;
|
||||
reg = <2>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
ethernet-phy@3 {
|
||||
linux,phandle = <2452003>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <32 1>;
|
||||
reg = <3>;
|
||||
device_type = "ethernet-phy";
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@24000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <24000 1000>;
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
interrupts = <d 2 e 2 12 2>;
|
||||
interrupt-parent = <40000>;
|
||||
phy-handle = <2452002>;
|
||||
};
|
||||
|
||||
ethernet@25000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
device_type = "network";
|
||||
model = "eTSEC";
|
||||
compatible = "gianfar";
|
||||
reg = <25000 1000>;
|
||||
mac-address = [ 00 00 00 00 00 00];
|
||||
interrupts = <13 2 14 2 18 2>;
|
||||
interrupt-parent = <40000>;
|
||||
phy-handle = <2452003>;
|
||||
};
|
||||
|
||||
serial@4500 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <4500 100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <1a 2>;
|
||||
interrupt-parent = <40000>;
|
||||
};
|
||||
|
||||
serial@4600 {
|
||||
device_type = "serial";
|
||||
compatible = "ns16550";
|
||||
reg = <4600 100>;
|
||||
clock-frequency = <0>;
|
||||
interrupts = <1a 2>;
|
||||
interrupt-parent = <40000>;
|
||||
};
|
||||
|
||||
crypto@30000 {
|
||||
device_type = "crypto";
|
||||
model = "SEC2";
|
||||
compatible = "talitos";
|
||||
reg = <30000 f000>;
|
||||
interrupts = <1d 2>;
|
||||
interrupt-parent = <40000>;
|
||||
num-channels = <4>;
|
||||
channel-fifo-len = <18>;
|
||||
exec-units-mask = <000000fe>;
|
||||
descriptor-types-mask = <012b0ebf>;
|
||||
};
|
||||
|
||||
pic@40000 {
|
||||
linux,phandle = <40000>;
|
||||
clock-frequency = <0>;
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <2>;
|
||||
reg = <40000 40000>;
|
||||
built-in;
|
||||
compatible = "chrp,open-pic";
|
||||
device_type = "open-pic";
|
||||
big-endian;
|
||||
};
|
||||
par_io@e0100 {
|
||||
reg = <e0100 100>;
|
||||
device_type = "par_io";
|
||||
num-ports = <7>;
|
||||
|
||||
ucc_pin@01 {
|
||||
linux,phandle = <e010001>;
|
||||
pio-map = <
|
||||
/* port pin dir open_drain assignment has_irq */
|
||||
4 0a 1 0 2 0 /* TxD0 */
|
||||
4 09 1 0 2 0 /* TxD1 */
|
||||
4 08 1 0 2 0 /* TxD2 */
|
||||
4 07 1 0 2 0 /* TxD3 */
|
||||
4 17 1 0 2 0 /* TxD4 */
|
||||
4 16 1 0 2 0 /* TxD5 */
|
||||
4 15 1 0 2 0 /* TxD6 */
|
||||
4 14 1 0 2 0 /* TxD7 */
|
||||
4 0f 2 0 2 0 /* RxD0 */
|
||||
4 0e 2 0 2 0 /* RxD1 */
|
||||
4 0d 2 0 2 0 /* RxD2 */
|
||||
4 0c 2 0 2 0 /* RxD3 */
|
||||
4 1d 2 0 2 0 /* RxD4 */
|
||||
4 1c 2 0 2 0 /* RxD5 */
|
||||
4 1b 2 0 2 0 /* RxD6 */
|
||||
4 1a 2 0 2 0 /* RxD7 */
|
||||
4 0b 1 0 2 0 /* TX_EN */
|
||||
4 18 1 0 2 0 /* TX_ER */
|
||||
4 0f 2 0 2 0 /* RX_DV */
|
||||
4 1e 2 0 2 0 /* RX_ER */
|
||||
4 11 2 0 2 0 /* RX_CLK */
|
||||
4 13 1 0 2 0 /* GTX_CLK */
|
||||
1 1f 2 0 3 0>; /* GTX125 */
|
||||
};
|
||||
ucc_pin@02 {
|
||||
linux,phandle = <e010002>;
|
||||
pio-map = <
|
||||
/* port pin dir open_drain assignment has_irq */
|
||||
5 0a 1 0 2 0 /* TxD0 */
|
||||
5 09 1 0 2 0 /* TxD1 */
|
||||
5 08 1 0 2 0 /* TxD2 */
|
||||
5 07 1 0 2 0 /* TxD3 */
|
||||
5 17 1 0 2 0 /* TxD4 */
|
||||
5 16 1 0 2 0 /* TxD5 */
|
||||
5 15 1 0 2 0 /* TxD6 */
|
||||
5 14 1 0 2 0 /* TxD7 */
|
||||
5 0f 2 0 2 0 /* RxD0 */
|
||||
5 0e 2 0 2 0 /* RxD1 */
|
||||
5 0d 2 0 2 0 /* RxD2 */
|
||||
5 0c 2 0 2 0 /* RxD3 */
|
||||
5 1d 2 0 2 0 /* RxD4 */
|
||||
5 1c 2 0 2 0 /* RxD5 */
|
||||
5 1b 2 0 2 0 /* RxD6 */
|
||||
5 1a 2 0 2 0 /* RxD7 */
|
||||
5 0b 1 0 2 0 /* TX_EN */
|
||||
5 18 1 0 2 0 /* TX_ER */
|
||||
5 10 2 0 2 0 /* RX_DV */
|
||||
5 1e 2 0 2 0 /* RX_ER */
|
||||
5 11 2 0 2 0 /* RX_CLK */
|
||||
5 13 1 0 2 0 /* GTX_CLK */
|
||||
1 1f 2 0 3 0 /* GTX125 */
|
||||
4 06 3 0 2 0 /* MDIO */
|
||||
4 05 1 0 2 0>; /* MDC */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
qe@e0080000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
device_type = "qe";
|
||||
model = "QE";
|
||||
ranges = <0 e0080000 00040000>;
|
||||
reg = <e0080000 480>;
|
||||
brg-frequency = <0>;
|
||||
bus-frequency = <179A7B00>;
|
||||
|
||||
muram@10000 {
|
||||
device_type = "muram";
|
||||
ranges = <0 00010000 0000c000>;
|
||||
|
||||
data-only@0{
|
||||
reg = <0 c000>;
|
||||
};
|
||||
};
|
||||
|
||||
spi@4c0 {
|
||||
device_type = "spi";
|
||||
compatible = "fsl_spi";
|
||||
reg = <4c0 40>;
|
||||
interrupts = <2>;
|
||||
interrupt-parent = <80>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
spi@500 {
|
||||
device_type = "spi";
|
||||
compatible = "fsl_spi";
|
||||
reg = <500 40>;
|
||||
interrupts = <1>;
|
||||
interrupt-parent = <80>;
|
||||
mode = "cpu";
|
||||
};
|
||||
|
||||
ucc@2000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
model = "UCC";
|
||||
device-id = <1>;
|
||||
reg = <2000 200>;
|
||||
interrupts = <20>;
|
||||
interrupt-parent = <80>;
|
||||
mac-address = [ 00 04 9f 00 23 23 ];
|
||||
rx-clock = <0>;
|
||||
tx-clock = <19>;
|
||||
phy-handle = <212000>;
|
||||
pio-handle = <e010001>;
|
||||
};
|
||||
|
||||
ucc@3000 {
|
||||
device_type = "network";
|
||||
compatible = "ucc_geth";
|
||||
model = "UCC";
|
||||
device-id = <2>;
|
||||
reg = <3000 200>;
|
||||
interrupts = <21>;
|
||||
interrupt-parent = <80>;
|
||||
mac-address = [ 00 11 22 33 44 55 ];
|
||||
rx-clock = <0>;
|
||||
tx-clock = <14>;
|
||||
phy-handle = <212001>;
|
||||
pio-handle = <e010002>;
|
||||
};
|
||||
|
||||
mdio@2120 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2120 18>;
|
||||
device_type = "mdio";
|
||||
compatible = "ucc_geth_phy";
|
||||
|
||||
/* These are the same PHYs as on
|
||||
* gianfar's MDIO bus */
|
||||
ethernet-phy@00 {
|
||||
linux,phandle = <212000>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <31 1>;
|
||||
reg = <0>;
|
||||
device_type = "ethernet-phy";
|
||||
interface = <6>; //ENET_1000_GMII
|
||||
};
|
||||
ethernet-phy@01 {
|
||||
linux,phandle = <212001>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <32 1>;
|
||||
reg = <1>;
|
||||
device_type = "ethernet-phy";
|
||||
interface = <6>;
|
||||
};
|
||||
ethernet-phy@02 {
|
||||
linux,phandle = <212002>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <31 1>;
|
||||
reg = <2>;
|
||||
device_type = "ethernet-phy";
|
||||
interface = <6>; //ENET_1000_GMII
|
||||
};
|
||||
ethernet-phy@03 {
|
||||
linux,phandle = <212003>;
|
||||
interrupt-parent = <40000>;
|
||||
interrupts = <32 1>;
|
||||
reg = <3>;
|
||||
device_type = "ethernet-phy";
|
||||
interface = <6>; //ENET_1000_GMII
|
||||
};
|
||||
};
|
||||
|
||||
qeic@80 {
|
||||
linux,phandle = <80>;
|
||||
interrupt-controller;
|
||||
device_type = "qeic";
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
reg = <80 80>;
|
||||
built-in;
|
||||
big-endian;
|
||||
interrupts = <1e 2 1e 2>; //high:30 low:30
|
||||
interrupt-parent = <40000>;
|
||||
};
|
||||
|
||||
};
|
||||
};
|
||||
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.20-rc5
|
||||
# Mon Jan 22 22:17:58 2007
|
||||
# Linux kernel version: 2.6.20-rc6
|
||||
# Sun Jan 28 23:13:56 2007
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
CONFIG_PPC32=y
|
||||
|
|
@ -58,7 +58,7 @@ CONFIG_INIT_ENV_ARG_LIMIT=32
|
|||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION="-kuroboxHG"
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
|
|
@ -206,7 +206,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4
|
|||
CONFIG_PROC_DEVICETREE=y
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
# CONFIG_PM is not set
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_ISA_DMA_API=y
|
||||
|
||||
#
|
||||
|
|
@ -312,39 +312,40 @@ CONFIG_NF_CONNTRACK=m
|
|||
# CONFIG_NF_CT_ACCT is not set
|
||||
# CONFIG_NF_CONNTRACK_MARK is not set
|
||||
# CONFIG_NF_CONNTRACK_EVENTS is not set
|
||||
# CONFIG_NF_CT_PROTO_SCTP is not set
|
||||
# CONFIG_NF_CONNTRACK_AMANDA is not set
|
||||
CONFIG_NF_CT_PROTO_GRE=m
|
||||
CONFIG_NF_CT_PROTO_SCTP=m
|
||||
CONFIG_NF_CONNTRACK_AMANDA=m
|
||||
CONFIG_NF_CONNTRACK_FTP=m
|
||||
# CONFIG_NF_CONNTRACK_H323 is not set
|
||||
CONFIG_NF_CONNTRACK_H323=m
|
||||
CONFIG_NF_CONNTRACK_IRC=m
|
||||
# CONFIG_NF_CONNTRACK_NETBIOS_NS is not set
|
||||
# CONFIG_NF_CONNTRACK_PPTP is not set
|
||||
# CONFIG_NF_CONNTRACK_SIP is not set
|
||||
CONFIG_NF_CONNTRACK_NETBIOS_NS=m
|
||||
CONFIG_NF_CONNTRACK_PPTP=m
|
||||
CONFIG_NF_CONNTRACK_SIP=m
|
||||
CONFIG_NF_CONNTRACK_TFTP=m
|
||||
CONFIG_NETFILTER_XTABLES=m
|
||||
CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m
|
||||
# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
|
||||
# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
|
||||
CONFIG_NETFILTER_XT_TARGET_MARK=m
|
||||
# CONFIG_NETFILTER_XT_TARGET_MARK is not set
|
||||
# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
|
||||
CONFIG_NETFILTER_XT_TARGET_NFLOG=m
|
||||
# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
|
||||
# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m
|
||||
# CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_ESP=m
|
||||
CONFIG_NETFILTER_XT_MATCH_HELPER=m
|
||||
CONFIG_NETFILTER_XT_MATCH_LENGTH=m
|
||||
CONFIG_NETFILTER_XT_MATCH_LIMIT=m
|
||||
# CONFIG_NETFILTER_XT_MATCH_ESP is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_HELPER is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_MAC=m
|
||||
CONFIG_NETFILTER_XT_MATCH_MARK=m
|
||||
# CONFIG_NETFILTER_XT_MATCH_MARK is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m
|
||||
# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m
|
||||
# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_REALM is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_STATE is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_STATE=m
|
||||
# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_STRING is not set
|
||||
# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
|
||||
|
|
@ -359,12 +360,12 @@ CONFIG_NF_CONNTRACK_PROC_COMPAT=y
|
|||
CONFIG_IP_NF_IPTABLES=m
|
||||
CONFIG_IP_NF_MATCH_IPRANGE=m
|
||||
# CONFIG_IP_NF_MATCH_TOS is not set
|
||||
# CONFIG_IP_NF_MATCH_RECENT is not set
|
||||
CONFIG_IP_NF_MATCH_RECENT=m
|
||||
# CONFIG_IP_NF_MATCH_ECN is not set
|
||||
# CONFIG_IP_NF_MATCH_AH is not set
|
||||
# CONFIG_IP_NF_MATCH_TTL is not set
|
||||
# CONFIG_IP_NF_MATCH_OWNER is not set
|
||||
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
|
||||
CONFIG_IP_NF_MATCH_OWNER=m
|
||||
CONFIG_IP_NF_MATCH_ADDRTYPE=m
|
||||
CONFIG_IP_NF_FILTER=m
|
||||
CONFIG_IP_NF_TARGET_REJECT=m
|
||||
# CONFIG_IP_NF_TARGET_LOG is not set
|
||||
|
|
@ -374,16 +375,17 @@ CONFIG_NF_NAT=m
|
|||
CONFIG_NF_NAT_NEEDED=y
|
||||
CONFIG_IP_NF_TARGET_MASQUERADE=m
|
||||
CONFIG_IP_NF_TARGET_REDIRECT=m
|
||||
CONFIG_IP_NF_TARGET_NETMAP=m
|
||||
CONFIG_IP_NF_TARGET_SAME=m
|
||||
# CONFIG_IP_NF_TARGET_NETMAP is not set
|
||||
# CONFIG_IP_NF_TARGET_SAME is not set
|
||||
# CONFIG_NF_NAT_SNMP_BASIC is not set
|
||||
CONFIG_NF_NAT_PROTO_GRE=m
|
||||
CONFIG_NF_NAT_FTP=m
|
||||
CONFIG_NF_NAT_IRC=m
|
||||
CONFIG_NF_NAT_TFTP=m
|
||||
# CONFIG_NF_NAT_AMANDA is not set
|
||||
# CONFIG_NF_NAT_PPTP is not set
|
||||
# CONFIG_NF_NAT_H323 is not set
|
||||
# CONFIG_NF_NAT_SIP is not set
|
||||
CONFIG_NF_NAT_AMANDA=m
|
||||
CONFIG_NF_NAT_PPTP=m
|
||||
CONFIG_NF_NAT_H323=m
|
||||
CONFIG_NF_NAT_SIP=m
|
||||
CONFIG_IP_NF_MANGLE=m
|
||||
CONFIG_IP_NF_TARGET_TOS=m
|
||||
CONFIG_IP_NF_TARGET_ECN=m
|
||||
|
|
@ -472,6 +474,7 @@ CONFIG_MTD_PARTITIONS=y
|
|||
# User Modules And Translation Layers
|
||||
#
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLKDEVS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
# CONFIG_FTL is not set
|
||||
# CONFIG_NFTL is not set
|
||||
|
|
@ -518,6 +521,7 @@ CONFIG_MTD_PHYSMAP=y
|
|||
CONFIG_MTD_PHYSMAP_START=0xffc00000
|
||||
CONFIG_MTD_PHYSMAP_LEN=0x400000
|
||||
CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
||||
# CONFIG_MTD_PHYSMAP_OF is not set
|
||||
# CONFIG_MTD_PLATRAM is not set
|
||||
|
||||
#
|
||||
|
|
@ -540,6 +544,7 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=1
|
|||
# NAND Flash Device Drivers
|
||||
#
|
||||
# CONFIG_MTD_NAND is not set
|
||||
# CONFIG_MTD_NAND_CAFE is not set
|
||||
|
||||
#
|
||||
# OneNAND Flash Device Drivers
|
||||
|
|
@ -696,7 +701,7 @@ CONFIG_ATA=y
|
|||
# CONFIG_PATA_HPT37X is not set
|
||||
# CONFIG_PATA_HPT3X2N is not set
|
||||
# CONFIG_PATA_HPT3X3 is not set
|
||||
# CONFIG_PATA_IT821X is not set
|
||||
CONFIG_PATA_IT821X=y
|
||||
# CONFIG_PATA_JMICRON is not set
|
||||
# CONFIG_PATA_TRIFLEX is not set
|
||||
# CONFIG_PATA_MARVELL is not set
|
||||
|
|
@ -763,11 +768,33 @@ CONFIG_TUN=m
|
|||
#
|
||||
# PHY device support
|
||||
#
|
||||
# CONFIG_PHYLIB is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
# CONFIG_NET_ETHERNET is not set
|
||||
CONFIG_NET_ETHERNET=y
|
||||
# CONFIG_MII is not set
|
||||
# CONFIG_HAPPYMEAL is not set
|
||||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
|
||||
#
|
||||
# Tulip family network device support
|
||||
#
|
||||
CONFIG_NET_TULIP=y
|
||||
# CONFIG_DE2104X is not set
|
||||
CONFIG_TULIP=y
|
||||
# CONFIG_TULIP_MWI is not set
|
||||
CONFIG_TULIP_MMIO=y
|
||||
# CONFIG_TULIP_NAPI is not set
|
||||
# CONFIG_DE4X5 is not set
|
||||
# CONFIG_WINBOND_840 is not set
|
||||
# CONFIG_DM9102 is not set
|
||||
# CONFIG_ULI526X is not set
|
||||
# CONFIG_HP100 is not set
|
||||
# CONFIG_NET_PCI is not set
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
|
|
@ -829,7 +856,8 @@ CONFIG_NET_RADIO=y
|
|||
# CONFIG_USB_ZD1201 is not set
|
||||
# CONFIG_HOSTAP is not set
|
||||
# CONFIG_BCM43XX is not set
|
||||
# CONFIG_ZD1211RW is not set
|
||||
CONFIG_ZD1211RW=m
|
||||
# CONFIG_ZD1211RW_DEBUG is not set
|
||||
CONFIG_NET_WIRELESS=y
|
||||
|
||||
#
|
||||
|
|
@ -1098,7 +1126,7 @@ CONFIG_DUMMY_CONSOLE=y
|
|||
#
|
||||
# HID Devices
|
||||
#
|
||||
CONFIG_HID=y
|
||||
CONFIG_HID=m
|
||||
|
||||
#
|
||||
# USB support
|
||||
|
|
@ -1115,7 +1143,6 @@ CONFIG_USB=y
|
|||
CONFIG_USB_DEVICEFS=y
|
||||
# CONFIG_USB_BANDWIDTH is not set
|
||||
# CONFIG_USB_DYNAMIC_MINORS is not set
|
||||
# CONFIG_USB_MULTITHREAD_PROBE is not set
|
||||
# CONFIG_USB_OTG is not set
|
||||
|
||||
#
|
||||
|
|
@ -1136,7 +1163,7 @@ CONFIG_USB_OHCI_LITTLE_ENDIAN=y
|
|||
# USB Device Class drivers
|
||||
#
|
||||
# CONFIG_USB_ACM is not set
|
||||
# CONFIG_USB_PRINTER is not set
|
||||
CONFIG_USB_PRINTER=m
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
|
|
@ -1371,7 +1398,11 @@ CONFIG_FS_MBCACHE=y
|
|||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
# CONFIG_XFS_FS is not set
|
||||
CONFIG_XFS_FS=m
|
||||
# CONFIG_XFS_QUOTA is not set
|
||||
# CONFIG_XFS_SECURITY is not set
|
||||
# CONFIG_XFS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_RT is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
|
|
@ -1461,7 +1492,12 @@ CONFIG_SUNRPC_GSS=y
|
|||
CONFIG_RPCSEC_GSS_KRB5=y
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
CONFIG_CIFS=m
|
||||
# CONFIG_CIFS_STATS is not set
|
||||
# CONFIG_CIFS_WEAK_PW_HASH is not set
|
||||
# CONFIG_CIFS_XATTR is not set
|
||||
# CONFIG_CIFS_DEBUG2 is not set
|
||||
# CONFIG_CIFS_EXPERIMENTAL is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
|
|
@ -1495,7 +1531,7 @@ CONFIG_NLS_CODEPAGE_437=m
|
|||
# CONFIG_NLS_CODEPAGE_869 is not set
|
||||
# CONFIG_NLS_CODEPAGE_936 is not set
|
||||
# CONFIG_NLS_CODEPAGE_950 is not set
|
||||
# CONFIG_NLS_CODEPAGE_932 is not set
|
||||
CONFIG_NLS_CODEPAGE_932=m
|
||||
# CONFIG_NLS_CODEPAGE_949 is not set
|
||||
# CONFIG_NLS_CODEPAGE_874 is not set
|
||||
# CONFIG_NLS_ISO8859_8 is not set
|
||||
|
|
@ -1526,12 +1562,14 @@ CONFIG_NLS_UTF8=m
|
|||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
CONFIG_CRC_CCITT=m
|
||||
# CONFIG_CRC16 is not set
|
||||
CONFIG_CRC32=y
|
||||
CONFIG_LIBCRC32C=m
|
||||
CONFIG_ZLIB_INFLATE=m
|
||||
CONFIG_ZLIB_DEFLATE=m
|
||||
CONFIG_TEXTSEARCH=y
|
||||
CONFIG_TEXTSEARCH_KMP=m
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_IOMAP_COPY=y
|
||||
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.20-rc5
|
||||
# Fri Jan 26 00:19:02 2007
|
||||
# Linux kernel version: 2.6.20
|
||||
# Wed Feb 7 13:12:18 2007
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
CONFIG_PPC32=y
|
||||
|
|
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
|
|||
CONFIG_PPC_83xx=y
|
||||
# CONFIG_PPC_85xx is not set
|
||||
# CONFIG_PPC_86xx is not set
|
||||
# CONFIG_PPC_8xx is not set
|
||||
# CONFIG_40x is not set
|
||||
# CONFIG_44x is not set
|
||||
# CONFIG_8xx is not set
|
||||
# CONFIG_E200 is not set
|
||||
CONFIG_6xx=y
|
||||
CONFIG_83xx=y
|
||||
|
|
@ -178,7 +178,6 @@ CONFIG_FSL_SOC=y
|
|||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
# CONFIG_PCIEPORTBUS is not set
|
||||
# CONFIG_PCI_DEBUG is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
|
|
@ -303,7 +302,6 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
|
|||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
|
|
@ -523,6 +521,7 @@ CONFIG_SCSI_SPI_ATTRS=y
|
|||
# Serial ATA (prod) and Parallel ATA (experimental) drivers
|
||||
#
|
||||
CONFIG_ATA=y
|
||||
# CONFIG_ATA_NONSTANDARD is not set
|
||||
# CONFIG_SATA_AHCI is not set
|
||||
# CONFIG_SATA_SVW is not set
|
||||
# CONFIG_ATA_PIIX is not set
|
||||
|
|
@ -647,37 +646,7 @@ CONFIG_CICADA_PHY=y
|
|||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
# CONFIG_HAPPYMEAL is not set
|
||||
# CONFIG_SUNGEM is not set
|
||||
# CONFIG_CASSINI is not set
|
||||
# CONFIG_NET_VENDOR_3COM is not set
|
||||
|
||||
#
|
||||
# Tulip family network device support
|
||||
#
|
||||
# CONFIG_NET_TULIP is not set
|
||||
# CONFIG_HP100 is not set
|
||||
CONFIG_NET_PCI=y
|
||||
# CONFIG_PCNET32 is not set
|
||||
# CONFIG_AMD8111_ETH is not set
|
||||
# CONFIG_ADAPTEC_STARFIRE is not set
|
||||
# CONFIG_B44 is not set
|
||||
# CONFIG_FORCEDETH is not set
|
||||
# CONFIG_DGRS is not set
|
||||
# CONFIG_EEPRO100 is not set
|
||||
CONFIG_E100=y
|
||||
# CONFIG_FEALNX is not set
|
||||
# CONFIG_NATSEMI is not set
|
||||
# CONFIG_NE2K_PCI is not set
|
||||
# CONFIG_8139CP is not set
|
||||
# CONFIG_8139TOO is not set
|
||||
# CONFIG_SIS900 is not set
|
||||
# CONFIG_EPIC100 is not set
|
||||
# CONFIG_SUNDANCE is not set
|
||||
# CONFIG_TLAN is not set
|
||||
# CONFIG_VIA_RHINE is not set
|
||||
# CONFIG_NET_ETHERNET is not set
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
|
|
@ -693,7 +662,6 @@ CONFIG_E100=y
|
|||
# CONFIG_SKGE is not set
|
||||
# CONFIG_SKY2 is not set
|
||||
# CONFIG_SK98LIN is not set
|
||||
# CONFIG_VIA_VELOCITY is not set
|
||||
# CONFIG_TIGON3 is not set
|
||||
# CONFIG_BNX2 is not set
|
||||
CONFIG_GIANFAR=y
|
||||
|
|
@ -746,26 +714,7 @@ CONFIG_GFAR_NAPI=y
|
|||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
# CONFIG_INPUT is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
|
|
@ -784,7 +733,7 @@ CONFIG_INPUT=y
|
|||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_PCI=y
|
||||
# CONFIG_SERIAL_8250_PCI is not set
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
|
@ -887,7 +836,7 @@ CONFIG_I2C_MPC=y
|
|||
# CONFIG_SENSORS_DS1337 is not set
|
||||
# CONFIG_SENSORS_DS1374 is not set
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
CONFIG_SENSORS_PCF8574=y
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_M41T00 is not set
|
||||
|
|
@ -901,7 +850,6 @@ CONFIG_I2C_MPC=y
|
|||
# SPI support
|
||||
#
|
||||
CONFIG_SPI=y
|
||||
# CONFIG_SPI_DEBUG is not set
|
||||
CONFIG_SPI_MASTER=y
|
||||
|
||||
#
|
||||
|
|
@ -922,52 +870,8 @@ CONFIG_SPI_MPC83xx=y
|
|||
#
|
||||
# Hardware Monitoring support
|
||||
#
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ADM9240 is not set
|
||||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_ATXP1 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM70 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SIS5595 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47M192 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VIA686A is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_VT8231 is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83791D is not set
|
||||
# CONFIG_SENSORS_W83792D is not set
|
||||
# CONFIG_SENSORS_W83793 is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
|
|
@ -983,7 +887,7 @@ CONFIG_HWMON=y
|
|||
#
|
||||
# Graphics support
|
||||
#
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
# CONFIG_FIRMWARE_EDID is not set
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_FB_IBM_GXT4500 is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
|
@ -993,11 +897,6 @@ CONFIG_FIRMWARE_EDID=y
|
|||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# HID Devices
|
||||
#
|
||||
CONFIG_HID=y
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
|
|
@ -1023,10 +922,8 @@ CONFIG_USB_EHCI_HCD=y
|
|||
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
|
||||
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
|
||||
# CONFIG_USB_ISP116X_HCD is not set
|
||||
CONFIG_USB_OHCI_HCD=y
|
||||
# CONFIG_USB_OHCI_BIG_ENDIAN is not set
|
||||
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
|
||||
CONFIG_USB_UHCI_HCD=y
|
||||
# CONFIG_USB_OHCI_HCD is not set
|
||||
# CONFIG_USB_UHCI_HCD is not set
|
||||
# CONFIG_USB_SL811_HCD is not set
|
||||
|
||||
#
|
||||
|
|
@ -1058,25 +955,10 @@ CONFIG_USB_STORAGE=y
|
|||
#
|
||||
# USB Input Devices
|
||||
#
|
||||
# CONFIG_USB_HID is not set
|
||||
|
||||
#
|
||||
# USB HID Boot Protocol drivers
|
||||
#
|
||||
# CONFIG_USB_KBD is not set
|
||||
# CONFIG_USB_MOUSE is not set
|
||||
# CONFIG_USB_AIPTEK is not set
|
||||
# CONFIG_USB_WACOM is not set
|
||||
# CONFIG_USB_ACECAD is not set
|
||||
# CONFIG_USB_KBTAB is not set
|
||||
# CONFIG_USB_POWERMATE is not set
|
||||
# CONFIG_USB_TOUCHSCREEN is not set
|
||||
# CONFIG_USB_YEALINK is not set
|
||||
# CONFIG_USB_XPAD is not set
|
||||
# CONFIG_USB_ATI_REMOTE is not set
|
||||
# CONFIG_USB_ATI_REMOTE2 is not set
|
||||
# CONFIG_USB_KEYSPAN_REMOTE is not set
|
||||
# CONFIG_USB_APPLETOUCH is not set
|
||||
|
||||
#
|
||||
# USB Imaging devices
|
||||
|
|
@ -1133,25 +1015,7 @@ CONFIG_USB_MON=y
|
|||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
CONFIG_USB_GADGET=y
|
||||
# CONFIG_USB_GADGET_DEBUG_FILES is not set
|
||||
CONFIG_USB_GADGET_SELECTED=y
|
||||
CONFIG_USB_GADGET_NET2280=y
|
||||
CONFIG_USB_NET2280=y
|
||||
# CONFIG_USB_GADGET_PXA2XX is not set
|
||||
# CONFIG_USB_GADGET_GOKU is not set
|
||||
# CONFIG_USB_GADGET_LH7A40X is not set
|
||||
# CONFIG_USB_GADGET_OMAP is not set
|
||||
# CONFIG_USB_GADGET_AT91 is not set
|
||||
# CONFIG_USB_GADGET_DUMMY_HCD is not set
|
||||
CONFIG_USB_GADGET_DUALSPEED=y
|
||||
# CONFIG_USB_ZERO is not set
|
||||
CONFIG_USB_ETH=y
|
||||
CONFIG_USB_ETH_RNDIS=y
|
||||
# CONFIG_USB_GADGETFS is not set
|
||||
# CONFIG_USB_FILE_STORAGE is not set
|
||||
# CONFIG_USB_G_SERIAL is not set
|
||||
# CONFIG_USB_MIDI_GADGET is not set
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
|
|
@ -1273,8 +1137,11 @@ CONFIG_DNOTIFY=y
|
|||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
CONFIG_FAT_FS=y
|
||||
CONFIG_MSDOS_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_FAT_DEFAULT_CODEPAGE=437
|
||||
CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
|
|
@ -1340,7 +1207,7 @@ CONFIG_PARTITION_ADVANCED=y
|
|||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
CONFIG_MAC_PARTITION=y
|
||||
CONFIG_MSDOS_PARTITION=y
|
||||
# CONFIG_BSD_DISKLABEL is not set
|
||||
# CONFIG_MINIX_SUBPARTITION is not set
|
||||
|
|
@ -1356,7 +1223,46 @@ CONFIG_MSDOS_PARTITION=y
|
|||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NLS_DEFAULT="iso8859-1"
|
||||
# CONFIG_NLS_CODEPAGE_437 is not set
|
||||
# CONFIG_NLS_CODEPAGE_737 is not set
|
||||
# CONFIG_NLS_CODEPAGE_775 is not set
|
||||
# CONFIG_NLS_CODEPAGE_850 is not set
|
||||
# CONFIG_NLS_CODEPAGE_852 is not set
|
||||
# CONFIG_NLS_CODEPAGE_855 is not set
|
||||
# CONFIG_NLS_CODEPAGE_857 is not set
|
||||
# CONFIG_NLS_CODEPAGE_860 is not set
|
||||
# CONFIG_NLS_CODEPAGE_861 is not set
|
||||
# CONFIG_NLS_CODEPAGE_862 is not set
|
||||
# CONFIG_NLS_CODEPAGE_863 is not set
|
||||
# CONFIG_NLS_CODEPAGE_864 is not set
|
||||
# CONFIG_NLS_CODEPAGE_865 is not set
|
||||
# CONFIG_NLS_CODEPAGE_866 is not set
|
||||
# CONFIG_NLS_CODEPAGE_869 is not set
|
||||
# CONFIG_NLS_CODEPAGE_936 is not set
|
||||
# CONFIG_NLS_CODEPAGE_950 is not set
|
||||
# CONFIG_NLS_CODEPAGE_932 is not set
|
||||
# CONFIG_NLS_CODEPAGE_949 is not set
|
||||
# CONFIG_NLS_CODEPAGE_874 is not set
|
||||
# CONFIG_NLS_ISO8859_8 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1250 is not set
|
||||
# CONFIG_NLS_CODEPAGE_1251 is not set
|
||||
# CONFIG_NLS_ASCII is not set
|
||||
# CONFIG_NLS_ISO8859_1 is not set
|
||||
# CONFIG_NLS_ISO8859_2 is not set
|
||||
# CONFIG_NLS_ISO8859_3 is not set
|
||||
# CONFIG_NLS_ISO8859_4 is not set
|
||||
# CONFIG_NLS_ISO8859_5 is not set
|
||||
# CONFIG_NLS_ISO8859_6 is not set
|
||||
# CONFIG_NLS_ISO8859_7 is not set
|
||||
# CONFIG_NLS_ISO8859_9 is not set
|
||||
# CONFIG_NLS_ISO8859_13 is not set
|
||||
# CONFIG_NLS_ISO8859_14 is not set
|
||||
# CONFIG_NLS_ISO8859_15 is not set
|
||||
# CONFIG_NLS_KOI8_R is not set
|
||||
# CONFIG_NLS_KOI8_U is not set
|
||||
# CONFIG_NLS_UTF8 is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
|
|
@ -1388,27 +1294,9 @@ CONFIG_ENABLE_MUST_CHECK=y
|
|||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
# CONFIG_DEBUG_KERNEL is not set
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_RWSEMS is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_DEBUG_INFO is not set
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
CONFIG_FORCED_INLINING=y
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
# CONFIG_DEBUGGER is not set
|
||||
# CONFIG_BDI_SWITCH is not set
|
||||
# CONFIG_BOOTX_TEXT is not set
|
||||
# CONFIG_SERIAL_TEXT_DEBUG is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG is not set
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -1,7 +1,7 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.20-rc5
|
||||
# Fri Jan 26 00:19:27 2007
|
||||
# Linux kernel version: 2.6.20
|
||||
# Thu Feb 8 01:00:48 2007
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
CONFIG_PPC32=y
|
||||
|
|
@ -34,9 +34,9 @@ CONFIG_DEFAULT_UIMAGE=y
|
|||
CONFIG_PPC_83xx=y
|
||||
# CONFIG_PPC_85xx is not set
|
||||
# CONFIG_PPC_86xx is not set
|
||||
# CONFIG_PPC_8xx is not set
|
||||
# CONFIG_40x is not set
|
||||
# CONFIG_44x is not set
|
||||
# CONFIG_8xx is not set
|
||||
# CONFIG_E200 is not set
|
||||
CONFIG_6xx=y
|
||||
CONFIG_83xx=y
|
||||
|
|
@ -128,8 +128,9 @@ CONFIG_PPC_GEN550=y
|
|||
#
|
||||
# Platform support
|
||||
#
|
||||
# CONFIG_MPC8313_RDB is not set
|
||||
# CONFIG_MPC832x_MDS is not set
|
||||
CONFIG_MPC834x_SYS=y
|
||||
CONFIG_MPC834x_MDS=y
|
||||
# CONFIG_MPC834x_ITX is not set
|
||||
# CONFIG_MPC8360E_PB is not set
|
||||
CONFIG_MPC834x=y
|
||||
|
|
|
|||
|
|
@ -0,0 +1,992 @@
|
|||
#
|
||||
# Automatically generated make config: don't edit
|
||||
# Linux kernel version: 2.6.20-rc5
|
||||
# Wed Feb 7 23:54:25 2007
|
||||
#
|
||||
# CONFIG_PPC64 is not set
|
||||
CONFIG_PPC32=y
|
||||
CONFIG_PPC_MERGE=y
|
||||
CONFIG_MMU=y
|
||||
CONFIG_GENERIC_HARDIRQS=y
|
||||
CONFIG_IRQ_PER_CPU=y
|
||||
CONFIG_RWSEM_XCHGADD_ALGORITHM=y
|
||||
CONFIG_ARCH_HAS_ILOG2_U32=y
|
||||
CONFIG_GENERIC_HWEIGHT=y
|
||||
CONFIG_GENERIC_CALIBRATE_DELAY=y
|
||||
CONFIG_GENERIC_FIND_NEXT_BIT=y
|
||||
CONFIG_PPC=y
|
||||
CONFIG_EARLY_PRINTK=y
|
||||
CONFIG_GENERIC_NVRAM=y
|
||||
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
|
||||
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
|
||||
CONFIG_PPC_OF=y
|
||||
CONFIG_PPC_UDBG_16550=y
|
||||
# CONFIG_GENERIC_TBSYNC is not set
|
||||
CONFIG_AUDIT_ARCH=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_DEFAULT_UIMAGE=y
|
||||
|
||||
#
|
||||
# Processor support
|
||||
#
|
||||
# CONFIG_CLASSIC32 is not set
|
||||
# CONFIG_PPC_82xx is not set
|
||||
# CONFIG_PPC_83xx is not set
|
||||
CONFIG_PPC_85xx=y
|
||||
# CONFIG_PPC_86xx is not set
|
||||
# CONFIG_40x is not set
|
||||
# CONFIG_44x is not set
|
||||
# CONFIG_8xx is not set
|
||||
# CONFIG_E200 is not set
|
||||
CONFIG_85xx=y
|
||||
CONFIG_E500=y
|
||||
# CONFIG_PPC_DCR_NATIVE is not set
|
||||
# CONFIG_PPC_DCR_MMIO is not set
|
||||
CONFIG_BOOKE=y
|
||||
CONFIG_FSL_BOOKE=y
|
||||
# CONFIG_PHYS_64BIT is not set
|
||||
CONFIG_SPE=y
|
||||
CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
|
||||
|
||||
#
|
||||
# Code maturity level options
|
||||
#
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_BROKEN_ON_SMP=y
|
||||
CONFIG_INIT_ENV_ARG_LIMIT=32
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_LOCALVERSION_AUTO=y
|
||||
CONFIG_SWAP=y
|
||||
CONFIG_SYSVIPC=y
|
||||
# CONFIG_IPC_NS is not set
|
||||
# CONFIG_POSIX_MQUEUE is not set
|
||||
# CONFIG_BSD_PROCESS_ACCT is not set
|
||||
# CONFIG_TASKSTATS is not set
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_AUDIT is not set
|
||||
# CONFIG_IKCONFIG is not set
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
# CONFIG_RELAY is not set
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
|
||||
CONFIG_SYSCTL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SYSCTL_SYSCALL=y
|
||||
# CONFIG_KALLSYMS is not set
|
||||
CONFIG_HOTPLUG=y
|
||||
CONFIG_PRINTK=y
|
||||
CONFIG_BUG=y
|
||||
CONFIG_ELF_CORE=y
|
||||
CONFIG_BASE_FULL=y
|
||||
CONFIG_FUTEX=y
|
||||
# CONFIG_EPOLL is not set
|
||||
CONFIG_SHMEM=y
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_RT_MUTEXES=y
|
||||
# CONFIG_TINY_SHMEM is not set
|
||||
CONFIG_BASE_SMALL=0
|
||||
# CONFIG_SLOB is not set
|
||||
|
||||
#
|
||||
# Loadable module support
|
||||
#
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_MODULE_FORCE_UNLOAD is not set
|
||||
# CONFIG_MODVERSIONS is not set
|
||||
# CONFIG_MODULE_SRCVERSION_ALL is not set
|
||||
# CONFIG_KMOD is not set
|
||||
|
||||
#
|
||||
# Block layer
|
||||
#
|
||||
CONFIG_BLOCK=y
|
||||
# CONFIG_LBD is not set
|
||||
# CONFIG_BLK_DEV_IO_TRACE is not set
|
||||
# CONFIG_LSF is not set
|
||||
|
||||
#
|
||||
# IO Schedulers
|
||||
#
|
||||
CONFIG_IOSCHED_NOOP=y
|
||||
CONFIG_IOSCHED_AS=y
|
||||
CONFIG_IOSCHED_DEADLINE=y
|
||||
CONFIG_IOSCHED_CFQ=y
|
||||
CONFIG_DEFAULT_AS=y
|
||||
# CONFIG_DEFAULT_DEADLINE is not set
|
||||
# CONFIG_DEFAULT_CFQ is not set
|
||||
# CONFIG_DEFAULT_NOOP is not set
|
||||
CONFIG_DEFAULT_IOSCHED="anticipatory"
|
||||
# CONFIG_WANT_EARLY_SERIAL is not set
|
||||
|
||||
#
|
||||
# Platform support
|
||||
#
|
||||
# CONFIG_MPC8540_ADS is not set
|
||||
# CONFIG_MPC8560_ADS is not set
|
||||
# CONFIG_MPC85xx_CDS is not set
|
||||
CONFIG_MPC8568_MDS=y
|
||||
CONFIG_MPC85xx=y
|
||||
CONFIG_PPC_INDIRECT_PCI_BE=y
|
||||
CONFIG_MPIC=y
|
||||
|
||||
#
|
||||
# Kernel options
|
||||
#
|
||||
# CONFIG_HIGHMEM is not set
|
||||
# CONFIG_HZ_100 is not set
|
||||
CONFIG_HZ_250=y
|
||||
# CONFIG_HZ_300 is not set
|
||||
# CONFIG_HZ_1000 is not set
|
||||
CONFIG_HZ=250
|
||||
CONFIG_PREEMPT_NONE=y
|
||||
# CONFIG_PREEMPT_VOLUNTARY is not set
|
||||
# CONFIG_PREEMPT is not set
|
||||
CONFIG_BINFMT_ELF=y
|
||||
# CONFIG_BINFMT_MISC is not set
|
||||
CONFIG_MATH_EMULATION=y
|
||||
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
|
||||
CONFIG_ARCH_FLATMEM_ENABLE=y
|
||||
CONFIG_ARCH_POPULATES_NODE_MAP=y
|
||||
CONFIG_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_FLATMEM_MANUAL=y
|
||||
# CONFIG_DISCONTIGMEM_MANUAL is not set
|
||||
# CONFIG_SPARSEMEM_MANUAL is not set
|
||||
CONFIG_FLATMEM=y
|
||||
CONFIG_FLAT_NODE_MEM_MAP=y
|
||||
# CONFIG_SPARSEMEM_STATIC is not set
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=4
|
||||
# CONFIG_RESOURCES_64BIT is not set
|
||||
CONFIG_PROC_DEVICETREE=y
|
||||
# CONFIG_CMDLINE_BOOL is not set
|
||||
# CONFIG_PM is not set
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_ISA_DMA_API=y
|
||||
|
||||
#
|
||||
# Bus options
|
||||
#
|
||||
# CONFIG_MPIC_WEIRD is not set
|
||||
# CONFIG_PPC_I8259 is not set
|
||||
CONFIG_PPC_INDIRECT_PCI=y
|
||||
CONFIG_FSL_SOC=y
|
||||
# CONFIG_PCI is not set
|
||||
# CONFIG_PCI_DOMAINS is not set
|
||||
|
||||
#
|
||||
# PCCARD (PCMCIA/CardBus) support
|
||||
#
|
||||
# CONFIG_PCCARD is not set
|
||||
|
||||
#
|
||||
# PCI Hotplug Support
|
||||
#
|
||||
|
||||
#
|
||||
# Advanced setup
|
||||
#
|
||||
# CONFIG_ADVANCED_OPTIONS is not set
|
||||
|
||||
#
|
||||
# Default settings for advanced configuration options are used
|
||||
#
|
||||
CONFIG_HIGHMEM_START=0xfe000000
|
||||
CONFIG_LOWMEM_SIZE=0x30000000
|
||||
CONFIG_KERNEL_START=0xc0000000
|
||||
CONFIG_TASK_SIZE=0x80000000
|
||||
CONFIG_BOOT_LOAD=0x00800000
|
||||
|
||||
#
|
||||
# Networking
|
||||
#
|
||||
CONFIG_NET=y
|
||||
|
||||
#
|
||||
# Networking options
|
||||
#
|
||||
# CONFIG_NETDEBUG is not set
|
||||
CONFIG_PACKET=y
|
||||
# CONFIG_PACKET_MMAP is not set
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_XFRM=y
|
||||
# CONFIG_XFRM_USER is not set
|
||||
# CONFIG_XFRM_SUB_POLICY is not set
|
||||
# CONFIG_NET_KEY is not set
|
||||
CONFIG_INET=y
|
||||
CONFIG_IP_MULTICAST=y
|
||||
# CONFIG_IP_ADVANCED_ROUTER is not set
|
||||
CONFIG_IP_FIB_HASH=y
|
||||
CONFIG_IP_PNP=y
|
||||
CONFIG_IP_PNP_DHCP=y
|
||||
CONFIG_IP_PNP_BOOTP=y
|
||||
# CONFIG_IP_PNP_RARP is not set
|
||||
# CONFIG_NET_IPIP is not set
|
||||
# CONFIG_NET_IPGRE is not set
|
||||
# CONFIG_IP_MROUTE is not set
|
||||
# CONFIG_ARPD is not set
|
||||
CONFIG_SYN_COOKIES=y
|
||||
# CONFIG_INET_AH is not set
|
||||
# CONFIG_INET_ESP is not set
|
||||
# CONFIG_INET_IPCOMP is not set
|
||||
# CONFIG_INET_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET_TUNNEL is not set
|
||||
CONFIG_INET_XFRM_MODE_TRANSPORT=y
|
||||
CONFIG_INET_XFRM_MODE_TUNNEL=y
|
||||
CONFIG_INET_XFRM_MODE_BEET=y
|
||||
CONFIG_INET_DIAG=y
|
||||
CONFIG_INET_TCP_DIAG=y
|
||||
# CONFIG_TCP_CONG_ADVANCED is not set
|
||||
CONFIG_TCP_CONG_CUBIC=y
|
||||
CONFIG_DEFAULT_TCP_CONG="cubic"
|
||||
# CONFIG_TCP_MD5SIG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_INET6_XFRM_TUNNEL is not set
|
||||
# CONFIG_INET6_TUNNEL is not set
|
||||
# CONFIG_NETWORK_SECMARK is not set
|
||||
# CONFIG_NETFILTER is not set
|
||||
|
||||
#
|
||||
# DCCP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_DCCP is not set
|
||||
|
||||
#
|
||||
# SCTP Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_IP_SCTP is not set
|
||||
|
||||
#
|
||||
# TIPC Configuration (EXPERIMENTAL)
|
||||
#
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
# CONFIG_DECNET is not set
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
# CONFIG_X25 is not set
|
||||
# CONFIG_LAPB is not set
|
||||
# CONFIG_ECONET is not set
|
||||
# CONFIG_WAN_ROUTER is not set
|
||||
|
||||
#
|
||||
# QoS and/or fair queueing
|
||||
#
|
||||
# CONFIG_NET_SCHED is not set
|
||||
|
||||
#
|
||||
# Network testing
|
||||
#
|
||||
# CONFIG_NET_PKTGEN is not set
|
||||
# CONFIG_HAMRADIO is not set
|
||||
# CONFIG_IRDA is not set
|
||||
# CONFIG_BT is not set
|
||||
# CONFIG_IEEE80211 is not set
|
||||
|
||||
#
|
||||
# Device Drivers
|
||||
#
|
||||
|
||||
#
|
||||
# Generic Driver Options
|
||||
#
|
||||
CONFIG_STANDALONE=y
|
||||
CONFIG_PREVENT_FIRMWARE_BUILD=y
|
||||
# CONFIG_FW_LOADER is not set
|
||||
# CONFIG_DEBUG_DRIVER is not set
|
||||
# CONFIG_SYS_HYPERVISOR is not set
|
||||
|
||||
#
|
||||
# Connector - unified userspace <-> kernelspace linker
|
||||
#
|
||||
# CONFIG_CONNECTOR is not set
|
||||
|
||||
#
|
||||
# Memory Technology Devices (MTD)
|
||||
#
|
||||
# CONFIG_MTD is not set
|
||||
|
||||
#
|
||||
# Parallel port support
|
||||
#
|
||||
# CONFIG_PARPORT is not set
|
||||
|
||||
#
|
||||
# Plug and Play support
|
||||
#
|
||||
|
||||
#
|
||||
# Block devices
|
||||
#
|
||||
# CONFIG_BLK_DEV_FD is not set
|
||||
# CONFIG_BLK_DEV_COW_COMMON is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
# CONFIG_BLK_DEV_CRYPTOLOOP is not set
|
||||
# CONFIG_BLK_DEV_NBD is not set
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=32768
|
||||
CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_CDROM_PKTCDVD is not set
|
||||
# CONFIG_ATA_OVER_ETH is not set
|
||||
|
||||
#
|
||||
# Misc devices
|
||||
#
|
||||
# CONFIG_TIFM_CORE is not set
|
||||
|
||||
#
|
||||
# ATA/ATAPI/MFM/RLL support
|
||||
#
|
||||
# CONFIG_IDE is not set
|
||||
|
||||
#
|
||||
# SCSI device support
|
||||
#
|
||||
# CONFIG_RAID_ATTRS is not set
|
||||
CONFIG_SCSI=y
|
||||
# CONFIG_SCSI_TGT is not set
|
||||
# CONFIG_SCSI_NETLINK is not set
|
||||
CONFIG_SCSI_PROC_FS=y
|
||||
|
||||
#
|
||||
# SCSI support type (disk, tape, CD-ROM)
|
||||
#
|
||||
# CONFIG_BLK_DEV_SD is not set
|
||||
# CONFIG_CHR_DEV_ST is not set
|
||||
# CONFIG_CHR_DEV_OSST is not set
|
||||
# CONFIG_BLK_DEV_SR is not set
|
||||
# CONFIG_CHR_DEV_SG is not set
|
||||
# CONFIG_CHR_DEV_SCH is not set
|
||||
|
||||
#
|
||||
# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
|
||||
#
|
||||
# CONFIG_SCSI_MULTI_LUN is not set
|
||||
# CONFIG_SCSI_CONSTANTS is not set
|
||||
# CONFIG_SCSI_LOGGING is not set
|
||||
# CONFIG_SCSI_SCAN_ASYNC is not set
|
||||
|
||||
#
|
||||
# SCSI Transports
|
||||
#
|
||||
# CONFIG_SCSI_SPI_ATTRS is not set
|
||||
# CONFIG_SCSI_FC_ATTRS is not set
|
||||
# CONFIG_SCSI_ISCSI_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_ATTRS is not set
|
||||
# CONFIG_SCSI_SAS_LIBSAS is not set
|
||||
|
||||
#
|
||||
# SCSI low-level drivers
|
||||
#
|
||||
# CONFIG_ISCSI_TCP is not set
|
||||
# CONFIG_SCSI_DEBUG is not set
|
||||
|
||||
#
|
||||
# Serial ATA (prod) and Parallel ATA (experimental) drivers
|
||||
#
|
||||
# CONFIG_ATA is not set
|
||||
|
||||
#
|
||||
# Multi-device support (RAID and LVM)
|
||||
#
|
||||
# CONFIG_MD is not set
|
||||
|
||||
#
|
||||
# Fusion MPT device support
|
||||
#
|
||||
# CONFIG_FUSION is not set
|
||||
|
||||
#
|
||||
# IEEE 1394 (FireWire) support
|
||||
#
|
||||
|
||||
#
|
||||
# I2O device support
|
||||
#
|
||||
|
||||
#
|
||||
# Macintosh device drivers
|
||||
#
|
||||
# CONFIG_MAC_EMUMOUSEBTN is not set
|
||||
# CONFIG_WINDFARM is not set
|
||||
|
||||
#
|
||||
# Network device support
|
||||
#
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_DUMMY is not set
|
||||
# CONFIG_BONDING is not set
|
||||
# CONFIG_EQUALIZER is not set
|
||||
# CONFIG_TUN is not set
|
||||
|
||||
#
|
||||
# PHY device support
|
||||
#
|
||||
CONFIG_PHYLIB=y
|
||||
|
||||
#
|
||||
# MII PHY device drivers
|
||||
#
|
||||
CONFIG_MARVELL_PHY=y
|
||||
# CONFIG_DAVICOM_PHY is not set
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_LXT_PHY is not set
|
||||
# CONFIG_CICADA_PHY is not set
|
||||
# CONFIG_VITESSE_PHY is not set
|
||||
# CONFIG_SMSC_PHY is not set
|
||||
# CONFIG_BROADCOM_PHY is not set
|
||||
# CONFIG_FIXED_PHY is not set
|
||||
|
||||
#
|
||||
# Ethernet (10 or 100Mbit)
|
||||
#
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_MII=y
|
||||
|
||||
#
|
||||
# Ethernet (1000 Mbit)
|
||||
#
|
||||
CONFIG_GIANFAR=y
|
||||
CONFIG_GFAR_NAPI=y
|
||||
|
||||
#
|
||||
# Ethernet (10000 Mbit)
|
||||
#
|
||||
|
||||
#
|
||||
# Token Ring devices
|
||||
#
|
||||
|
||||
#
|
||||
# Wireless LAN (non-hamradio)
|
||||
#
|
||||
# CONFIG_NET_RADIO is not set
|
||||
|
||||
#
|
||||
# Wan interfaces
|
||||
#
|
||||
# CONFIG_WAN is not set
|
||||
# CONFIG_PPP is not set
|
||||
# CONFIG_SLIP is not set
|
||||
# CONFIG_SHAPER is not set
|
||||
# CONFIG_NETCONSOLE is not set
|
||||
# CONFIG_NETPOLL is not set
|
||||
# CONFIG_NET_POLL_CONTROLLER is not set
|
||||
|
||||
#
|
||||
# ISDN subsystem
|
||||
#
|
||||
# CONFIG_ISDN is not set
|
||||
|
||||
#
|
||||
# Telephony Support
|
||||
#
|
||||
# CONFIG_PHONE is not set
|
||||
|
||||
#
|
||||
# Input device support
|
||||
#
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_FF_MEMLESS is not set
|
||||
|
||||
#
|
||||
# Userland interfaces
|
||||
#
|
||||
# CONFIG_INPUT_MOUSEDEV is not set
|
||||
# CONFIG_INPUT_JOYDEV is not set
|
||||
# CONFIG_INPUT_TSDEV is not set
|
||||
# CONFIG_INPUT_EVDEV is not set
|
||||
# CONFIG_INPUT_EVBUG is not set
|
||||
|
||||
#
|
||||
# Input Device Drivers
|
||||
#
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_INPUT_JOYSTICK is not set
|
||||
# CONFIG_INPUT_TOUCHSCREEN is not set
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
|
||||
#
|
||||
# Hardware I/O ports
|
||||
#
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_GAMEPORT is not set
|
||||
|
||||
#
|
||||
# Character devices
|
||||
#
|
||||
# CONFIG_VT is not set
|
||||
# CONFIG_SERIAL_NONSTANDARD is not set
|
||||
|
||||
#
|
||||
# Serial drivers
|
||||
#
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
# CONFIG_SERIAL_8250_EXTENDED is not set
|
||||
|
||||
#
|
||||
# Non-8250 serial port support
|
||||
#
|
||||
# CONFIG_SERIAL_UARTLITE is not set
|
||||
CONFIG_SERIAL_CORE=y
|
||||
CONFIG_SERIAL_CORE_CONSOLE=y
|
||||
CONFIG_UNIX98_PTYS=y
|
||||
CONFIG_LEGACY_PTYS=y
|
||||
CONFIG_LEGACY_PTY_COUNT=256
|
||||
|
||||
#
|
||||
# IPMI
|
||||
#
|
||||
# CONFIG_IPMI_HANDLER is not set
|
||||
|
||||
#
|
||||
# Watchdog Cards
|
||||
#
|
||||
CONFIG_WATCHDOG=y
|
||||
# CONFIG_WATCHDOG_NOWAYOUT is not set
|
||||
|
||||
#
|
||||
# Watchdog Device Drivers
|
||||
#
|
||||
# CONFIG_SOFT_WATCHDOG is not set
|
||||
# CONFIG_BOOKE_WDT is not set
|
||||
CONFIG_HW_RANDOM=y
|
||||
# CONFIG_NVRAM is not set
|
||||
CONFIG_GEN_RTC=y
|
||||
# CONFIG_GEN_RTC_X is not set
|
||||
# CONFIG_DTLK is not set
|
||||
# CONFIG_R3964 is not set
|
||||
# CONFIG_RAW_DRIVER is not set
|
||||
|
||||
#
|
||||
# TPM devices
|
||||
#
|
||||
# CONFIG_TCG_TPM is not set
|
||||
|
||||
#
|
||||
# I2C support
|
||||
#
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_CHARDEV=y
|
||||
|
||||
#
|
||||
# I2C Algorithms
|
||||
#
|
||||
# CONFIG_I2C_ALGOBIT is not set
|
||||
# CONFIG_I2C_ALGOPCF is not set
|
||||
# CONFIG_I2C_ALGOPCA is not set
|
||||
|
||||
#
|
||||
# I2C Hardware Bus support
|
||||
#
|
||||
CONFIG_I2C_MPC=y
|
||||
# CONFIG_I2C_OCORES is not set
|
||||
# CONFIG_I2C_PARPORT_LIGHT is not set
|
||||
# CONFIG_I2C_STUB is not set
|
||||
# CONFIG_I2C_PCA_ISA is not set
|
||||
|
||||
#
|
||||
# Miscellaneous I2C Chip support
|
||||
#
|
||||
# CONFIG_SENSORS_DS1337 is not set
|
||||
# CONFIG_SENSORS_DS1374 is not set
|
||||
# CONFIG_SENSORS_EEPROM is not set
|
||||
# CONFIG_SENSORS_PCF8574 is not set
|
||||
# CONFIG_SENSORS_PCA9539 is not set
|
||||
# CONFIG_SENSORS_PCF8591 is not set
|
||||
# CONFIG_SENSORS_M41T00 is not set
|
||||
# CONFIG_SENSORS_MAX6875 is not set
|
||||
# CONFIG_I2C_DEBUG_CORE is not set
|
||||
# CONFIG_I2C_DEBUG_ALGO is not set
|
||||
# CONFIG_I2C_DEBUG_BUS is not set
|
||||
# CONFIG_I2C_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# SPI support
|
||||
#
|
||||
# CONFIG_SPI is not set
|
||||
# CONFIG_SPI_MASTER is not set
|
||||
|
||||
#
|
||||
# Dallas's 1-wire bus
|
||||
#
|
||||
# CONFIG_W1 is not set
|
||||
|
||||
#
|
||||
# Hardware Monitoring support
|
||||
#
|
||||
CONFIG_HWMON=y
|
||||
# CONFIG_HWMON_VID is not set
|
||||
# CONFIG_SENSORS_ABITUGURU is not set
|
||||
# CONFIG_SENSORS_ADM1021 is not set
|
||||
# CONFIG_SENSORS_ADM1025 is not set
|
||||
# CONFIG_SENSORS_ADM1026 is not set
|
||||
# CONFIG_SENSORS_ADM1031 is not set
|
||||
# CONFIG_SENSORS_ADM9240 is not set
|
||||
# CONFIG_SENSORS_ASB100 is not set
|
||||
# CONFIG_SENSORS_ATXP1 is not set
|
||||
# CONFIG_SENSORS_DS1621 is not set
|
||||
# CONFIG_SENSORS_F71805F is not set
|
||||
# CONFIG_SENSORS_FSCHER is not set
|
||||
# CONFIG_SENSORS_FSCPOS is not set
|
||||
# CONFIG_SENSORS_GL518SM is not set
|
||||
# CONFIG_SENSORS_GL520SM is not set
|
||||
# CONFIG_SENSORS_IT87 is not set
|
||||
# CONFIG_SENSORS_LM63 is not set
|
||||
# CONFIG_SENSORS_LM75 is not set
|
||||
# CONFIG_SENSORS_LM77 is not set
|
||||
# CONFIG_SENSORS_LM78 is not set
|
||||
# CONFIG_SENSORS_LM80 is not set
|
||||
# CONFIG_SENSORS_LM83 is not set
|
||||
# CONFIG_SENSORS_LM85 is not set
|
||||
# CONFIG_SENSORS_LM87 is not set
|
||||
# CONFIG_SENSORS_LM90 is not set
|
||||
# CONFIG_SENSORS_LM92 is not set
|
||||
# CONFIG_SENSORS_MAX1619 is not set
|
||||
# CONFIG_SENSORS_PC87360 is not set
|
||||
# CONFIG_SENSORS_PC87427 is not set
|
||||
# CONFIG_SENSORS_SMSC47M1 is not set
|
||||
# CONFIG_SENSORS_SMSC47M192 is not set
|
||||
# CONFIG_SENSORS_SMSC47B397 is not set
|
||||
# CONFIG_SENSORS_VT1211 is not set
|
||||
# CONFIG_SENSORS_W83781D is not set
|
||||
# CONFIG_SENSORS_W83791D is not set
|
||||
# CONFIG_SENSORS_W83792D is not set
|
||||
# CONFIG_SENSORS_W83793 is not set
|
||||
# CONFIG_SENSORS_W83L785TS is not set
|
||||
# CONFIG_SENSORS_W83627HF is not set
|
||||
# CONFIG_SENSORS_W83627EHF is not set
|
||||
# CONFIG_HWMON_DEBUG_CHIP is not set
|
||||
|
||||
#
|
||||
# Multimedia devices
|
||||
#
|
||||
# CONFIG_VIDEO_DEV is not set
|
||||
|
||||
#
|
||||
# Digital Video Broadcasting Devices
|
||||
#
|
||||
# CONFIG_DVB is not set
|
||||
|
||||
#
|
||||
# Graphics support
|
||||
#
|
||||
CONFIG_FIRMWARE_EDID=y
|
||||
# CONFIG_FB is not set
|
||||
# CONFIG_FB_IBM_GXT4500 is not set
|
||||
# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
|
||||
|
||||
#
|
||||
# Sound
|
||||
#
|
||||
# CONFIG_SOUND is not set
|
||||
|
||||
#
|
||||
# HID Devices
|
||||
#
|
||||
CONFIG_HID=y
|
||||
|
||||
#
|
||||
# USB support
|
||||
#
|
||||
# CONFIG_USB_ARCH_HAS_HCD is not set
|
||||
# CONFIG_USB_ARCH_HAS_OHCI is not set
|
||||
# CONFIG_USB_ARCH_HAS_EHCI is not set
|
||||
|
||||
#
|
||||
# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
|
||||
#
|
||||
|
||||
#
|
||||
# USB Gadget Support
|
||||
#
|
||||
# CONFIG_USB_GADGET is not set
|
||||
|
||||
#
|
||||
# MMC/SD Card support
|
||||
#
|
||||
# CONFIG_MMC is not set
|
||||
|
||||
#
|
||||
# LED devices
|
||||
#
|
||||
# CONFIG_NEW_LEDS is not set
|
||||
|
||||
#
|
||||
# LED drivers
|
||||
#
|
||||
|
||||
#
|
||||
# LED Triggers
|
||||
#
|
||||
|
||||
#
|
||||
# InfiniBand support
|
||||
#
|
||||
|
||||
#
|
||||
# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
|
||||
#
|
||||
|
||||
#
|
||||
# Real Time Clock
|
||||
#
|
||||
# CONFIG_RTC_CLASS is not set
|
||||
|
||||
#
|
||||
# DMA Engine support
|
||||
#
|
||||
# CONFIG_DMA_ENGINE is not set
|
||||
|
||||
#
|
||||
# DMA Clients
|
||||
#
|
||||
|
||||
#
|
||||
# DMA Devices
|
||||
#
|
||||
|
||||
#
|
||||
# Virtualization
|
||||
#
|
||||
|
||||
#
|
||||
# File systems
|
||||
#
|
||||
CONFIG_EXT2_FS=y
|
||||
# CONFIG_EXT2_FS_XATTR is not set
|
||||
# CONFIG_EXT2_FS_XIP is not set
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_EXT3_FS_XATTR=y
|
||||
# CONFIG_EXT3_FS_POSIX_ACL is not set
|
||||
# CONFIG_EXT3_FS_SECURITY is not set
|
||||
# CONFIG_EXT4DEV_FS is not set
|
||||
CONFIG_JBD=y
|
||||
# CONFIG_JBD_DEBUG is not set
|
||||
CONFIG_FS_MBCACHE=y
|
||||
# CONFIG_REISERFS_FS is not set
|
||||
# CONFIG_JFS_FS is not set
|
||||
# CONFIG_FS_POSIX_ACL is not set
|
||||
# CONFIG_XFS_FS is not set
|
||||
# CONFIG_GFS2_FS is not set
|
||||
# CONFIG_OCFS2_FS is not set
|
||||
# CONFIG_MINIX_FS is not set
|
||||
# CONFIG_ROMFS_FS is not set
|
||||
CONFIG_INOTIFY=y
|
||||
CONFIG_INOTIFY_USER=y
|
||||
# CONFIG_QUOTA is not set
|
||||
CONFIG_DNOTIFY=y
|
||||
# CONFIG_AUTOFS_FS is not set
|
||||
# CONFIG_AUTOFS4_FS is not set
|
||||
# CONFIG_FUSE_FS is not set
|
||||
|
||||
#
|
||||
# CD-ROM/DVD Filesystems
|
||||
#
|
||||
# CONFIG_ISO9660_FS is not set
|
||||
# CONFIG_UDF_FS is not set
|
||||
|
||||
#
|
||||
# DOS/FAT/NT Filesystems
|
||||
#
|
||||
# CONFIG_MSDOS_FS is not set
|
||||
# CONFIG_VFAT_FS is not set
|
||||
# CONFIG_NTFS_FS is not set
|
||||
|
||||
#
|
||||
# Pseudo filesystems
|
||||
#
|
||||
CONFIG_PROC_FS=y
|
||||
CONFIG_PROC_KCORE=y
|
||||
CONFIG_PROC_SYSCTL=y
|
||||
CONFIG_SYSFS=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_TMPFS_POSIX_ACL is not set
|
||||
# CONFIG_HUGETLB_PAGE is not set
|
||||
CONFIG_RAMFS=y
|
||||
# CONFIG_CONFIGFS_FS is not set
|
||||
|
||||
#
|
||||
# Miscellaneous filesystems
|
||||
#
|
||||
# CONFIG_ADFS_FS is not set
|
||||
# CONFIG_AFFS_FS is not set
|
||||
# CONFIG_HFS_FS is not set
|
||||
# CONFIG_HFSPLUS_FS is not set
|
||||
# CONFIG_BEFS_FS is not set
|
||||
# CONFIG_BFS_FS is not set
|
||||
# CONFIG_EFS_FS is not set
|
||||
# CONFIG_CRAMFS is not set
|
||||
# CONFIG_VXFS_FS is not set
|
||||
# CONFIG_HPFS_FS is not set
|
||||
# CONFIG_QNX4FS_FS is not set
|
||||
# CONFIG_SYSV_FS is not set
|
||||
# CONFIG_UFS_FS is not set
|
||||
|
||||
#
|
||||
# Network File Systems
|
||||
#
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
# CONFIG_NFS_V3_ACL is not set
|
||||
CONFIG_NFS_V4=y
|
||||
# CONFIG_NFS_DIRECTIO is not set
|
||||
# CONFIG_NFSD is not set
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_LOCKD=y
|
||||
CONFIG_LOCKD_V4=y
|
||||
CONFIG_NFS_COMMON=y
|
||||
CONFIG_SUNRPC=y
|
||||
CONFIG_SUNRPC_GSS=y
|
||||
CONFIG_RPCSEC_GSS_KRB5=y
|
||||
# CONFIG_RPCSEC_GSS_SPKM3 is not set
|
||||
# CONFIG_SMB_FS is not set
|
||||
# CONFIG_CIFS is not set
|
||||
# CONFIG_NCP_FS is not set
|
||||
# CONFIG_CODA_FS is not set
|
||||
# CONFIG_AFS_FS is not set
|
||||
# CONFIG_9P_FS is not set
|
||||
|
||||
#
|
||||
# Partition Types
|
||||
#
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_ACORN_PARTITION is not set
|
||||
# CONFIG_OSF_PARTITION is not set
|
||||
# CONFIG_AMIGA_PARTITION is not set
|
||||
# CONFIG_ATARI_PARTITION is not set
|
||||
# CONFIG_MAC_PARTITION is not set
|
||||
# CONFIG_MSDOS_PARTITION is not set
|
||||
# CONFIG_LDM_PARTITION is not set
|
||||
# CONFIG_SGI_PARTITION is not set
|
||||
# CONFIG_ULTRIX_PARTITION is not set
|
||||
# CONFIG_SUN_PARTITION is not set
|
||||
# CONFIG_KARMA_PARTITION is not set
|
||||
# CONFIG_EFI_PARTITION is not set
|
||||
|
||||
#
|
||||
# Native Language Support
|
||||
#
|
||||
# CONFIG_NLS is not set
|
||||
|
||||
#
|
||||
# Distributed Lock Manager
|
||||
#
|
||||
# CONFIG_DLM is not set
|
||||
|
||||
#
|
||||
# Library routines
|
||||
#
|
||||
CONFIG_BITREVERSE=y
|
||||
# CONFIG_CRC_CCITT is not set
|
||||
# CONFIG_CRC16 is not set
|
||||
CONFIG_CRC32=y
|
||||
# CONFIG_LIBCRC32C is not set
|
||||
CONFIG_PLIST=y
|
||||
CONFIG_IOMAP_COPY=y
|
||||
|
||||
#
|
||||
# Instrumentation Support
|
||||
#
|
||||
CONFIG_PROFILING=y
|
||||
CONFIG_OPROFILE=y
|
||||
|
||||
#
|
||||
# Kernel hacking
|
||||
#
|
||||
# CONFIG_PRINTK_TIME is not set
|
||||
CONFIG_ENABLE_MUST_CHECK=y
|
||||
# CONFIG_MAGIC_SYSRQ is not set
|
||||
# CONFIG_UNUSED_SYMBOLS is not set
|
||||
# CONFIG_DEBUG_FS is not set
|
||||
# CONFIG_HEADERS_CHECK is not set
|
||||
CONFIG_DEBUG_KERNEL=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_DETECT_SOFTLOCKUP=y
|
||||
# CONFIG_SCHEDSTATS is not set
|
||||
# CONFIG_DEBUG_SLAB is not set
|
||||
# CONFIG_DEBUG_RT_MUTEXES is not set
|
||||
# CONFIG_RT_MUTEX_TESTER is not set
|
||||
# CONFIG_DEBUG_SPINLOCK is not set
|
||||
# CONFIG_DEBUG_MUTEXES is not set
|
||||
# CONFIG_DEBUG_RWSEMS is not set
|
||||
# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
|
||||
# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
|
||||
# CONFIG_DEBUG_KOBJECT is not set
|
||||
# CONFIG_DEBUG_BUGVERBOSE is not set
|
||||
# CONFIG_DEBUG_INFO is not set
|
||||
# CONFIG_DEBUG_VM is not set
|
||||
# CONFIG_DEBUG_LIST is not set
|
||||
CONFIG_FORCED_INLINING=y
|
||||
# CONFIG_RCU_TORTURE_TEST is not set
|
||||
CONFIG_DEBUGGER=y
|
||||
# CONFIG_XMON is not set
|
||||
# CONFIG_BDI_SWITCH is not set
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG_G5 is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
|
||||
# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
|
||||
|
||||
#
|
||||
# Security options
|
||||
#
|
||||
# CONFIG_KEYS is not set
|
||||
# CONFIG_SECURITY is not set
|
||||
|
||||
#
|
||||
# Cryptographic options
|
||||
#
|
||||
CONFIG_CRYPTO=y
|
||||
CONFIG_CRYPTO_ALGAPI=y
|
||||
CONFIG_CRYPTO_BLKCIPHER=y
|
||||
CONFIG_CRYPTO_MANAGER=y
|
||||
# CONFIG_CRYPTO_HMAC is not set
|
||||
# CONFIG_CRYPTO_XCBC is not set
|
||||
# CONFIG_CRYPTO_NULL is not set
|
||||
# CONFIG_CRYPTO_MD4 is not set
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
# CONFIG_CRYPTO_SHA1 is not set
|
||||
# CONFIG_CRYPTO_SHA256 is not set
|
||||
# CONFIG_CRYPTO_SHA512 is not set
|
||||
# CONFIG_CRYPTO_WP512 is not set
|
||||
# CONFIG_CRYPTO_TGR192 is not set
|
||||
# CONFIG_CRYPTO_GF128MUL is not set
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_CBC=y
|
||||
# CONFIG_CRYPTO_LRW is not set
|
||||
CONFIG_CRYPTO_DES=y
|
||||
# CONFIG_CRYPTO_BLOWFISH is not set
|
||||
# CONFIG_CRYPTO_TWOFISH is not set
|
||||
# CONFIG_CRYPTO_SERPENT is not set
|
||||
# CONFIG_CRYPTO_AES is not set
|
||||
# CONFIG_CRYPTO_CAST5 is not set
|
||||
# CONFIG_CRYPTO_CAST6 is not set
|
||||
# CONFIG_CRYPTO_TEA is not set
|
||||
# CONFIG_CRYPTO_ARC4 is not set
|
||||
# CONFIG_CRYPTO_KHAZAD is not set
|
||||
# CONFIG_CRYPTO_ANUBIS is not set
|
||||
# CONFIG_CRYPTO_DEFLATE is not set
|
||||
# CONFIG_CRYPTO_MICHAEL_MIC is not set
|
||||
# CONFIG_CRYPTO_CRC32C is not set
|
||||
# CONFIG_CRYPTO_TEST is not set
|
||||
|
||||
#
|
||||
# Hardware crypto devices
|
||||
#
|
||||
|
|
@ -18,6 +18,7 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/lmb.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/udbg.h>
|
||||
|
||||
#define NO_SCROLL
|
||||
|
||||
|
|
@ -912,3 +913,11 @@ static unsigned char vga_font[cmapsz] = {
|
|||
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
|
||||
0x00, 0x00, 0x00, 0x00,
|
||||
};
|
||||
|
||||
void __init udbg_init_btext(void)
|
||||
{
|
||||
/* If btext is enabled, we might have a BAT setup for early display,
|
||||
* thus we do enable some very basic udbg output
|
||||
*/
|
||||
udbg_putc = btext_drawchar;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
|
|||
extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
|
||||
extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
|
||||
extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
|
||||
extern void __restore_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
|
||||
extern void __restore_cpu_pa6t(void);
|
||||
extern void __restore_cpu_ppc970(void);
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
|
|
|
|||
|
|
@ -32,8 +32,6 @@
|
|||
#include <asm/page.h>
|
||||
#include <asm/mmu.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/ibm4xx.h>
|
||||
#include <asm/ibm44x.h>
|
||||
#include <asm/cputable.h>
|
||||
#include <asm/thread_info.h>
|
||||
#include <asm/ppc_asm.h>
|
||||
|
|
|
|||
|
|
@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
|
||||
mtspr SPRN_MAS0,r7
|
||||
tlbre
|
||||
li r6,0
|
||||
mfspr r6,SPRN_MAS1
|
||||
rlwinm r6,r6,0,2,0 /* clear IPROT */
|
||||
mtspr SPRN_MAS1,r6
|
||||
tlbwe
|
||||
/* Invalidate TLB1 */
|
||||
|
|
@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
|
||||
mtspr SPRN_MAS0,r7
|
||||
tlbre
|
||||
mfspr r8,SPRN_MAS1
|
||||
rlwinm r8,r8,0,2,0 /* clear IPROT */
|
||||
mtspr SPRN_MAS1,r8
|
||||
tlbwe
|
||||
/* Invalidate TLB1 */
|
||||
|
|
@ -889,7 +892,6 @@ load_up_spe:
|
|||
REST_GPR(9, r11)
|
||||
REST_GPR(12, r11)
|
||||
lwz r11,GPR11(r11)
|
||||
SYNC
|
||||
rfi
|
||||
|
||||
/*
|
||||
|
|
@ -953,7 +955,6 @@ _GLOBAL(giveup_altivec)
|
|||
_GLOBAL(giveup_spe)
|
||||
mfmsr r5
|
||||
oris r5,r5,MSR_SPE@h
|
||||
SYNC
|
||||
mtmsr r5 /* enable use of SPE now */
|
||||
isync
|
||||
cmpi 0,r3,0
|
||||
|
|
|
|||
|
|
@ -124,6 +124,10 @@ static int __init add_legacy_soc_port(struct device_node *np,
|
|||
if (get_property(np, "clock-frequency", NULL) == NULL)
|
||||
return -1;
|
||||
|
||||
/* if rtas uses this device, don't try to use it as well */
|
||||
if (get_property(np, "used-by-rtas", NULL) != NULL)
|
||||
return -1;
|
||||
|
||||
/* Get the address */
|
||||
addrp = of_get_address(soc_dev, 0, NULL, NULL);
|
||||
if (addrp == NULL)
|
||||
|
|
@ -334,6 +338,17 @@ void __init find_legacy_serial_ports(void)
|
|||
of_node_put(tsi);
|
||||
}
|
||||
|
||||
/* First fill our array with opb bus ports */
|
||||
for (np = NULL; (np = of_find_compatible_node(np, "serial", "ns16750")) != NULL;) {
|
||||
struct device_node *opb = of_get_parent(np);
|
||||
if (opb && !strcmp(opb->type, "opb")) {
|
||||
index = add_legacy_soc_port(np, np);
|
||||
if (index >= 0 && np == stdout)
|
||||
legacy_serial_console = index;
|
||||
}
|
||||
of_node_put(opb);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/* Next, try to locate PCI ports */
|
||||
for (np = NULL; (np = of_find_all_nodes(np));) {
|
||||
|
|
|
|||
|
|
@ -2117,11 +2117,92 @@ static void __init fixup_device_tree_pmac(void)
|
|||
#define fixup_device_tree_pmac()
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_PPC_EFIKA
|
||||
/* The current fw of the Efika has a device tree needs quite a few
|
||||
* fixups to be compliant with the mpc52xx bindings. It's currently
|
||||
* unknown if it will ever be compliant (come on bPlan ...) so we do fixups.
|
||||
* NOTE that we (barely) tolerate it because the EFIKA was out before
|
||||
* the bindings were finished, for any new boards -> RTFM ! */
|
||||
|
||||
struct subst_entry {
|
||||
char *path;
|
||||
char *property;
|
||||
void *value;
|
||||
int value_len;
|
||||
};
|
||||
|
||||
static void __init fixup_device_tree_efika(void)
|
||||
{
|
||||
/* Substitution table */
|
||||
#define prop_cstr(x) x, sizeof(x)
|
||||
int prop_sound_irq[3] = { 2, 2, 0 };
|
||||
int prop_bcomm_irq[3*16] = { 3,0,0, 3,1,0, 3,2,0, 3,3,0,
|
||||
3,4,0, 3,5,0, 3,6,0, 3,7,0,
|
||||
3,8,0, 3,9,0, 3,10,0, 3,11,0,
|
||||
3,12,0, 3,13,0, 3,14,0, 3,15,0 };
|
||||
struct subst_entry efika_subst_table[] = {
|
||||
{ "/", "device_type", prop_cstr("efika") },
|
||||
{ "/builtin", "compatible", prop_cstr("soc") },
|
||||
{ "/builtin/ata", "compatible", prop_cstr("mpc5200b-ata\0mpc5200-ata"), },
|
||||
{ "/builtin/bestcomm", "compatible", prop_cstr("mpc5200b-bestcomm\0mpc5200-bestcomm") },
|
||||
{ "/builtin/bestcomm", "interrupts", prop_bcomm_irq, sizeof(prop_bcomm_irq) },
|
||||
{ "/builtin/ethernet", "compatible", prop_cstr("mpc5200b-fec\0mpc5200-fec") },
|
||||
{ "/builtin/pic", "compatible", prop_cstr("mpc5200b-pic\0mpc5200-pic") },
|
||||
{ "/builtin/serial", "compatible", prop_cstr("mpc5200b-psc-uart\0mpc5200-psc-uart") },
|
||||
{ "/builtin/sound", "compatible", prop_cstr("mpc5200b-psc-ac97\0mpc5200-psc-ac97") },
|
||||
{ "/builtin/sound", "interrupts", prop_sound_irq, sizeof(prop_sound_irq) },
|
||||
{ "/builtin/sram", "compatible", prop_cstr("mpc5200b-sram\0mpc5200-sram") },
|
||||
{ "/builtin/sram", "device_type", prop_cstr("sram") },
|
||||
{}
|
||||
};
|
||||
#undef prop_cstr
|
||||
|
||||
/* Vars */
|
||||
u32 node;
|
||||
char prop[64];
|
||||
int rv, i;
|
||||
|
||||
/* Check if we're really running on a EFIKA */
|
||||
node = call_prom("finddevice", 1, 1, ADDR("/"));
|
||||
if (!PHANDLE_VALID(node))
|
||||
return;
|
||||
|
||||
rv = prom_getprop(node, "model", prop, sizeof(prop));
|
||||
if (rv == PROM_ERROR)
|
||||
return;
|
||||
if (strcmp(prop, "EFIKA5K2"))
|
||||
return;
|
||||
|
||||
prom_printf("Applying EFIKA device tree fixups\n");
|
||||
|
||||
/* Process substitution table */
|
||||
for (i=0; efika_subst_table[i].path; i++) {
|
||||
struct subst_entry *se = &efika_subst_table[i];
|
||||
|
||||
node = call_prom("finddevice", 1, 1, ADDR(se->path));
|
||||
if (!PHANDLE_VALID(node)) {
|
||||
prom_printf("fixup_device_tree_efika: ",
|
||||
"skipped entry %x - not found\n", i);
|
||||
continue;
|
||||
}
|
||||
|
||||
rv = prom_setprop(node, se->path, se->property,
|
||||
se->value, se->value_len );
|
||||
if (rv == PROM_ERROR)
|
||||
prom_printf("fixup_device_tree_efika: ",
|
||||
"skipped entry %x - setprop error\n", i);
|
||||
}
|
||||
}
|
||||
#else
|
||||
#define fixup_device_tree_efika()
|
||||
#endif
|
||||
|
||||
static void __init fixup_device_tree(void)
|
||||
{
|
||||
fixup_device_tree_maple();
|
||||
fixup_device_tree_chrp();
|
||||
fixup_device_tree_pmac();
|
||||
fixup_device_tree_efika();
|
||||
}
|
||||
|
||||
static void __init prom_find_boot_cpu(void)
|
||||
|
|
|
|||
|
|
@ -116,12 +116,8 @@ unsigned long __init early_init(unsigned long dt_ptr)
|
|||
*/
|
||||
void __init machine_init(unsigned long dt_ptr, unsigned long phys)
|
||||
{
|
||||
/* If btext is enabled, we might have a BAT setup for early display,
|
||||
* thus we do enable some very basic udbg output
|
||||
*/
|
||||
#ifdef CONFIG_BOOTX_TEXT
|
||||
udbg_putc = btext_drawchar;
|
||||
#endif
|
||||
/* Enable early debugging if any specified (see udbg.h) */
|
||||
udbg_early_init();
|
||||
|
||||
/* Do some early initialization based on the flat device tree */
|
||||
early_init_devtree(__va(dt_ptr));
|
||||
|
|
|
|||
|
|
@ -78,29 +78,6 @@ int smt_enabled_at_boot = 1;
|
|||
|
||||
static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
|
||||
|
||||
#ifdef CONFIG_MPIC
|
||||
int __init smp_mpic_probe(void)
|
||||
{
|
||||
int nr_cpus;
|
||||
|
||||
DBG("smp_mpic_probe()...\n");
|
||||
|
||||
nr_cpus = cpus_weight(cpu_possible_map);
|
||||
|
||||
DBG("nr_cpus: %d\n", nr_cpus);
|
||||
|
||||
if (nr_cpus > 1)
|
||||
mpic_request_ipis();
|
||||
|
||||
return nr_cpus;
|
||||
}
|
||||
|
||||
void __devinit smp_mpic_setup_cpu(int cpu)
|
||||
{
|
||||
mpic_setup_this_cpu();
|
||||
}
|
||||
#endif /* CONFIG_MPIC */
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
void __devinit smp_generic_kick_cpu(int nr)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -49,6 +49,8 @@ void __init udbg_early_init(void)
|
|||
udbg_init_debug_beat();
|
||||
#elif defined(CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE)
|
||||
udbg_init_pas_realmode();
|
||||
#elif defined(CONFIG_BOOTX_TEXT)
|
||||
udbg_init_btext();
|
||||
#endif
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -49,24 +49,23 @@
|
|||
/* Max supported size for symbol names */
|
||||
#define MAX_SYMNAME 64
|
||||
|
||||
#define VDSO32_MAXPAGES (((0x3000 + PAGE_MASK) >> PAGE_SHIFT) + 2)
|
||||
#define VDSO64_MAXPAGES (((0x3000 + PAGE_MASK) >> PAGE_SHIFT) + 2)
|
||||
|
||||
extern char vdso32_start, vdso32_end;
|
||||
static void *vdso32_kbase = &vdso32_start;
|
||||
unsigned int vdso32_pages;
|
||||
static struct page *vdso32_pagelist[VDSO32_MAXPAGES];
|
||||
static unsigned int vdso32_pages;
|
||||
static struct page **vdso32_pagelist;
|
||||
unsigned long vdso32_sigtramp;
|
||||
unsigned long vdso32_rt_sigtramp;
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
extern char vdso64_start, vdso64_end;
|
||||
static void *vdso64_kbase = &vdso64_start;
|
||||
unsigned int vdso64_pages;
|
||||
static struct page *vdso64_pagelist[VDSO64_MAXPAGES];
|
||||
static unsigned int vdso64_pages;
|
||||
static struct page **vdso64_pagelist;
|
||||
unsigned long vdso64_rt_sigtramp;
|
||||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
static int vdso_ready;
|
||||
|
||||
/*
|
||||
* The vdso data page (aka. systemcfg for old ppc64 fans) is here.
|
||||
* Once the early boot kernel code no longer needs to muck around
|
||||
|
|
@ -182,6 +181,9 @@ int arch_setup_additional_pages(struct linux_binprm *bprm,
|
|||
unsigned long vdso_base;
|
||||
int rc;
|
||||
|
||||
if (!vdso_ready)
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
if (test_thread_flag(TIF_32BIT)) {
|
||||
vdso_pagelist = vdso32_pagelist;
|
||||
|
|
@ -661,7 +663,7 @@ static void __init vdso_setup_syscall_map(void)
|
|||
}
|
||||
|
||||
|
||||
void __init vdso_init(void)
|
||||
static int __init vdso_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
|
|
@ -716,11 +718,13 @@ void __init vdso_init(void)
|
|||
#ifdef CONFIG_PPC64
|
||||
vdso64_pages = 0;
|
||||
#endif
|
||||
return;
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Make sure pages are in the correct state */
|
||||
BUG_ON(vdso32_pages + 2 > VDSO32_MAXPAGES);
|
||||
vdso32_pagelist = kzalloc(sizeof(struct page *) * (vdso32_pages + 2),
|
||||
GFP_KERNEL);
|
||||
BUG_ON(vdso32_pagelist == NULL);
|
||||
for (i = 0; i < vdso32_pages; i++) {
|
||||
struct page *pg = virt_to_page(vdso32_kbase + i*PAGE_SIZE);
|
||||
ClearPageReserved(pg);
|
||||
|
|
@ -731,7 +735,9 @@ void __init vdso_init(void)
|
|||
vdso32_pagelist[i] = NULL;
|
||||
|
||||
#ifdef CONFIG_PPC64
|
||||
BUG_ON(vdso64_pages + 2 > VDSO64_MAXPAGES);
|
||||
vdso64_pagelist = kzalloc(sizeof(struct page *) * (vdso64_pages + 2),
|
||||
GFP_KERNEL);
|
||||
BUG_ON(vdso64_pagelist == NULL);
|
||||
for (i = 0; i < vdso64_pages; i++) {
|
||||
struct page *pg = virt_to_page(vdso64_kbase + i*PAGE_SIZE);
|
||||
ClearPageReserved(pg);
|
||||
|
|
@ -743,7 +749,13 @@ void __init vdso_init(void)
|
|||
#endif /* CONFIG_PPC64 */
|
||||
|
||||
get_page(virt_to_page(vdso_data));
|
||||
|
||||
smp_wmb();
|
||||
vdso_ready = 1;
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(vdso_init);
|
||||
|
||||
int in_gate_area_no_task(unsigned long addr)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -384,9 +384,6 @@ void __init mem_init(void)
|
|||
initsize >> 10);
|
||||
|
||||
mem_init_done = 1;
|
||||
|
||||
/* Initialize the vDSO */
|
||||
vdso_init();
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -295,7 +295,7 @@ void __init mapin_ram(void)
|
|||
}
|
||||
|
||||
/* is x a power of 4? */
|
||||
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1))
|
||||
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
|
||||
|
||||
/*
|
||||
* Set up a mapping for a block of I/O.
|
||||
|
|
|
|||
|
|
@ -39,10 +39,17 @@
|
|||
#include "../platforms/cell/interrupt.h"
|
||||
|
||||
#define PPU_CYCLES_EVENT_NUM 1 /* event number for CYCLES */
|
||||
#define PPU_CYCLES_GRP_NUM 1 /* special group number for identifying
|
||||
* PPU_CYCLES event
|
||||
*/
|
||||
#define CBE_COUNT_ALL_CYCLES 0x42800000 /* PPU cycle event specifier */
|
||||
|
||||
#define NUM_THREADS 2
|
||||
#define VIRT_CNTR_SW_TIME_NS 100000000 // 0.5 seconds
|
||||
#define NUM_THREADS 2 /* number of physical threads in
|
||||
* physical processor
|
||||
*/
|
||||
#define NUM_TRACE_BUS_WORDS 4
|
||||
#define NUM_INPUT_BUS_WORDS 2
|
||||
|
||||
|
||||
struct pmc_cntrl_data {
|
||||
unsigned long vcntr;
|
||||
|
|
@ -58,7 +65,7 @@ struct pmc_cntrl_data {
|
|||
struct pm_signal {
|
||||
u16 cpu; /* Processor to modify */
|
||||
u16 sub_unit; /* hw subunit this applies to (if applicable) */
|
||||
u16 signal_group; /* Signal Group to Enable/Disable */
|
||||
short int signal_group; /* Signal Group to Enable/Disable */
|
||||
u8 bus_word; /* Enable/Disable on this Trace/Trigger/Event
|
||||
* Bus Word(s) (bitmask)
|
||||
*/
|
||||
|
|
@ -93,7 +100,6 @@ static struct {
|
|||
u32 pm07_cntrl[NR_PHYS_CTRS];
|
||||
} pm_regs;
|
||||
|
||||
|
||||
#define GET_SUB_UNIT(x) ((x & 0x0000f000) >> 12)
|
||||
#define GET_BUS_WORD(x) ((x & 0x000000f0) >> 4)
|
||||
#define GET_BUS_TYPE(x) ((x & 0x00000300) >> 8)
|
||||
|
|
@ -101,7 +107,6 @@ static struct {
|
|||
#define GET_COUNT_CYCLES(x) (x & 0x00000001)
|
||||
#define GET_INPUT_CONTROL(x) ((x & 0x00000004) >> 2)
|
||||
|
||||
|
||||
static DEFINE_PER_CPU(unsigned long[NR_PHYS_CTRS], pmc_values);
|
||||
|
||||
static struct pmc_cntrl_data pmc_cntrl[NUM_THREADS][NR_PHYS_CTRS];
|
||||
|
|
@ -129,8 +134,8 @@ static spinlock_t virt_cntr_lock = SPIN_LOCK_UNLOCKED;
|
|||
|
||||
static u32 ctr_enabled;
|
||||
|
||||
static unsigned char trace_bus[4];
|
||||
static unsigned char input_bus[2];
|
||||
static unsigned char trace_bus[NUM_TRACE_BUS_WORDS];
|
||||
static unsigned char input_bus[NUM_INPUT_BUS_WORDS];
|
||||
|
||||
/*
|
||||
* Firmware interface functions
|
||||
|
|
@ -177,25 +182,40 @@ static void pm_rtas_reset_signals(u32 node)
|
|||
static void pm_rtas_activate_signals(u32 node, u32 count)
|
||||
{
|
||||
int ret;
|
||||
int j;
|
||||
int i, j;
|
||||
struct pm_signal pm_signal_local[NR_PHYS_CTRS];
|
||||
|
||||
/* There is no debug setup required for the cycles event.
|
||||
* Note that only events in the same group can be used.
|
||||
* Otherwise, there will be conflicts in correctly routing
|
||||
* the signals on the debug bus. It is the responsiblity
|
||||
* of the OProfile user tool to check the events are in
|
||||
* the same group.
|
||||
*/
|
||||
i = 0;
|
||||
for (j = 0; j < count; j++) {
|
||||
/* fw expects physical cpu # */
|
||||
pm_signal_local[j].cpu = node;
|
||||
pm_signal_local[j].signal_group = pm_signal[j].signal_group;
|
||||
pm_signal_local[j].bus_word = pm_signal[j].bus_word;
|
||||
pm_signal_local[j].sub_unit = pm_signal[j].sub_unit;
|
||||
pm_signal_local[j].bit = pm_signal[j].bit;
|
||||
if (pm_signal[j].signal_group != PPU_CYCLES_GRP_NUM) {
|
||||
|
||||
/* fw expects physical cpu # */
|
||||
pm_signal_local[i].cpu = node;
|
||||
pm_signal_local[i].signal_group
|
||||
= pm_signal[j].signal_group;
|
||||
pm_signal_local[i].bus_word = pm_signal[j].bus_word;
|
||||
pm_signal_local[i].sub_unit = pm_signal[j].sub_unit;
|
||||
pm_signal_local[i].bit = pm_signal[j].bit;
|
||||
i++;
|
||||
}
|
||||
}
|
||||
|
||||
ret = rtas_ibm_cbe_perftools(SUBFUNC_ACTIVATE, PASSTHRU_ENABLE,
|
||||
pm_signal_local,
|
||||
count * sizeof(struct pm_signal));
|
||||
if (i != 0) {
|
||||
ret = rtas_ibm_cbe_perftools(SUBFUNC_ACTIVATE, PASSTHRU_ENABLE,
|
||||
pm_signal_local,
|
||||
i * sizeof(struct pm_signal));
|
||||
|
||||
if (ret)
|
||||
printk(KERN_WARNING "%s: rtas returned: %d\n",
|
||||
__FUNCTION__, ret);
|
||||
if (ret)
|
||||
printk(KERN_WARNING "%s: rtas returned: %d\n",
|
||||
__FUNCTION__, ret);
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
@ -212,7 +232,7 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask)
|
|||
/* Special Event: Count all cpu cycles */
|
||||
pm_regs.pm07_cntrl[ctr] = CBE_COUNT_ALL_CYCLES;
|
||||
p = &(pm_signal[ctr]);
|
||||
p->signal_group = 21;
|
||||
p->signal_group = PPU_CYCLES_GRP_NUM;
|
||||
p->bus_word = 1;
|
||||
p->sub_unit = 0;
|
||||
p->bit = 0;
|
||||
|
|
@ -232,13 +252,21 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask)
|
|||
|
||||
p->signal_group = event / 100;
|
||||
p->bus_word = bus_word;
|
||||
p->sub_unit = unit_mask & 0x0000f000;
|
||||
p->sub_unit = (unit_mask & 0x0000f000) >> 12;
|
||||
|
||||
pm_regs.pm07_cntrl[ctr] = 0;
|
||||
pm_regs.pm07_cntrl[ctr] |= PM07_CTR_COUNT_CYCLES(count_cycles);
|
||||
pm_regs.pm07_cntrl[ctr] |= PM07_CTR_POLARITY(polarity);
|
||||
pm_regs.pm07_cntrl[ctr] |= PM07_CTR_INPUT_CONTROL(input_control);
|
||||
|
||||
/* Some of the islands signal selection is based on 64 bit words.
|
||||
* The debug bus words are 32 bits, the input words to the performance
|
||||
* counters are defined as 32 bits. Need to convert the 64 bit island
|
||||
* specification to the appropriate 32 input bit and bus word for the
|
||||
* performance counter event selection. See the CELL Performance
|
||||
* monitoring signals manual and the Perf cntr hardware descriptions
|
||||
* for the details.
|
||||
*/
|
||||
if (input_control == 0) {
|
||||
if (signal_bit > 31) {
|
||||
signal_bit -= 32;
|
||||
|
|
@ -259,12 +287,12 @@ static void set_pm_event(u32 ctr, int event, u32 unit_mask)
|
|||
p->bit = signal_bit;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++) {
|
||||
for (i = 0; i < NUM_TRACE_BUS_WORDS; i++) {
|
||||
if (bus_word & (1 << i)) {
|
||||
pm_regs.debug_bus_control |=
|
||||
(bus_type << (31 - (2 * i) + 1));
|
||||
|
||||
for (j = 0; j < 2; j++) {
|
||||
for (j = 0; j < NUM_INPUT_BUS_WORDS; j++) {
|
||||
if (input_bus[j] == 0xff) {
|
||||
input_bus[j] = i;
|
||||
pm_regs.group_control |=
|
||||
|
|
@ -278,52 +306,58 @@ out:
|
|||
;
|
||||
}
|
||||
|
||||
static void write_pm_cntrl(int cpu, struct pm_cntrl *pm_cntrl)
|
||||
static void write_pm_cntrl(int cpu)
|
||||
{
|
||||
/* Oprofile will use 32 bit counters, set bits 7:10 to 0 */
|
||||
/* Oprofile will use 32 bit counters, set bits 7:10 to 0
|
||||
* pmregs.pm_cntrl is a global
|
||||
*/
|
||||
|
||||
u32 val = 0;
|
||||
if (pm_cntrl->enable == 1)
|
||||
if (pm_regs.pm_cntrl.enable == 1)
|
||||
val |= CBE_PM_ENABLE_PERF_MON;
|
||||
|
||||
if (pm_cntrl->stop_at_max == 1)
|
||||
if (pm_regs.pm_cntrl.stop_at_max == 1)
|
||||
val |= CBE_PM_STOP_AT_MAX;
|
||||
|
||||
if (pm_cntrl->trace_mode == 1)
|
||||
val |= CBE_PM_TRACE_MODE_SET(pm_cntrl->trace_mode);
|
||||
if (pm_regs.pm_cntrl.trace_mode == 1)
|
||||
val |= CBE_PM_TRACE_MODE_SET(pm_regs.pm_cntrl.trace_mode);
|
||||
|
||||
if (pm_cntrl->freeze == 1)
|
||||
if (pm_regs.pm_cntrl.freeze == 1)
|
||||
val |= CBE_PM_FREEZE_ALL_CTRS;
|
||||
|
||||
/* Routine set_count_mode must be called previously to set
|
||||
* the count mode based on the user selection of user and kernel.
|
||||
*/
|
||||
val |= CBE_PM_COUNT_MODE_SET(pm_cntrl->count_mode);
|
||||
val |= CBE_PM_COUNT_MODE_SET(pm_regs.pm_cntrl.count_mode);
|
||||
cbe_write_pm(cpu, pm_control, val);
|
||||
}
|
||||
|
||||
static inline void
|
||||
set_count_mode(u32 kernel, u32 user, struct pm_cntrl *pm_cntrl)
|
||||
set_count_mode(u32 kernel, u32 user)
|
||||
{
|
||||
/* The user must specify user and kernel if they want them. If
|
||||
* neither is specified, OProfile will count in hypervisor mode
|
||||
* neither is specified, OProfile will count in hypervisor mode.
|
||||
* pm_regs.pm_cntrl is a global
|
||||
*/
|
||||
if (kernel) {
|
||||
if (user)
|
||||
pm_cntrl->count_mode = CBE_COUNT_ALL_MODES;
|
||||
pm_regs.pm_cntrl.count_mode = CBE_COUNT_ALL_MODES;
|
||||
else
|
||||
pm_cntrl->count_mode = CBE_COUNT_SUPERVISOR_MODE;
|
||||
pm_regs.pm_cntrl.count_mode =
|
||||
CBE_COUNT_SUPERVISOR_MODE;
|
||||
} else {
|
||||
if (user)
|
||||
pm_cntrl->count_mode = CBE_COUNT_PROBLEM_MODE;
|
||||
pm_regs.pm_cntrl.count_mode = CBE_COUNT_PROBLEM_MODE;
|
||||
else
|
||||
pm_cntrl->count_mode = CBE_COUNT_HYPERVISOR_MODE;
|
||||
pm_regs.pm_cntrl.count_mode =
|
||||
CBE_COUNT_HYPERVISOR_MODE;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void enable_ctr(u32 cpu, u32 ctr, u32 * pm07_cntrl)
|
||||
{
|
||||
|
||||
pm07_cntrl[ctr] |= PM07_CTR_ENABLE(1);
|
||||
pm07_cntrl[ctr] |= CBE_PM_CTR_ENABLE;
|
||||
cbe_write_pm07_control(cpu, ctr, pm07_cntrl[ctr]);
|
||||
}
|
||||
|
||||
|
|
@ -365,6 +399,14 @@ static void cell_virtual_cntr(unsigned long data)
|
|||
hdw_thread = 1 ^ hdw_thread;
|
||||
next_hdw_thread = hdw_thread;
|
||||
|
||||
for (i = 0; i < num_counters; i++)
|
||||
/* There are some per thread events. Must do the
|
||||
* set event, for the thread that is being started
|
||||
*/
|
||||
set_pm_event(i,
|
||||
pmc_cntrl[next_hdw_thread][i].evnts,
|
||||
pmc_cntrl[next_hdw_thread][i].masks);
|
||||
|
||||
/* The following is done only once per each node, but
|
||||
* we need cpu #, not node #, to pass to the cbe_xxx functions.
|
||||
*/
|
||||
|
|
@ -385,12 +427,13 @@ static void cell_virtual_cntr(unsigned long data)
|
|||
== 0xFFFFFFFF)
|
||||
/* If the cntr value is 0xffffffff, we must
|
||||
* reset that to 0xfffffff0 when the current
|
||||
* thread is restarted. This will generate a new
|
||||
* interrupt and make sure that we never restore
|
||||
* the counters to the max value. If the counters
|
||||
* were restored to the max value, they do not
|
||||
* increment and no interrupts are generated. Hence
|
||||
* no more samples will be collected on that cpu.
|
||||
* thread is restarted. This will generate a
|
||||
* new interrupt and make sure that we never
|
||||
* restore the counters to the max value. If
|
||||
* the counters were restored to the max value,
|
||||
* they do not increment and no interrupts are
|
||||
* generated. Hence no more samples will be
|
||||
* collected on that cpu.
|
||||
*/
|
||||
cbe_write_ctr(cpu, i, 0xFFFFFFF0);
|
||||
else
|
||||
|
|
@ -410,9 +453,6 @@ static void cell_virtual_cntr(unsigned long data)
|
|||
* Must do the set event, enable_cntr
|
||||
* for each cpu.
|
||||
*/
|
||||
set_pm_event(i,
|
||||
pmc_cntrl[next_hdw_thread][i].evnts,
|
||||
pmc_cntrl[next_hdw_thread][i].masks);
|
||||
enable_ctr(cpu, i,
|
||||
pm_regs.pm07_cntrl);
|
||||
} else {
|
||||
|
|
@ -465,8 +505,7 @@ cell_reg_setup(struct op_counter_config *ctr,
|
|||
pm_regs.pm_cntrl.trace_mode = 0;
|
||||
pm_regs.pm_cntrl.freeze = 1;
|
||||
|
||||
set_count_mode(sys->enable_kernel, sys->enable_user,
|
||||
&pm_regs.pm_cntrl);
|
||||
set_count_mode(sys->enable_kernel, sys->enable_user);
|
||||
|
||||
/* Setup the thread 0 events */
|
||||
for (i = 0; i < num_ctrs; ++i) {
|
||||
|
|
@ -498,10 +537,10 @@ cell_reg_setup(struct op_counter_config *ctr,
|
|||
pmc_cntrl[1][i].vcntr = i;
|
||||
}
|
||||
|
||||
for (i = 0; i < 4; i++)
|
||||
for (i = 0; i < NUM_TRACE_BUS_WORDS; i++)
|
||||
trace_bus[i] = 0xff;
|
||||
|
||||
for (i = 0; i < 2; i++)
|
||||
for (i = 0; i < NUM_INPUT_BUS_WORDS; i++)
|
||||
input_bus[i] = 0xff;
|
||||
|
||||
/* Our counters count up, and "count" refers to
|
||||
|
|
@ -560,7 +599,7 @@ static void cell_cpu_setup(struct op_counter_config *cntr)
|
|||
cbe_write_pm(cpu, pm_start_stop, 0);
|
||||
cbe_write_pm(cpu, group_control, pm_regs.group_control);
|
||||
cbe_write_pm(cpu, debug_bus_control, pm_regs.debug_bus_control);
|
||||
write_pm_cntrl(cpu, &pm_regs.pm_cntrl);
|
||||
write_pm_cntrl(cpu);
|
||||
|
||||
for (i = 0; i < num_counters; ++i) {
|
||||
if (ctr_enabled & (1 << i)) {
|
||||
|
|
@ -602,7 +641,7 @@ static void cell_global_start(struct op_counter_config *ctr)
|
|||
}
|
||||
}
|
||||
|
||||
cbe_clear_pm_interrupts(cpu);
|
||||
cbe_get_and_clear_pm_interrupts(cpu);
|
||||
cbe_enable_pm_interrupts(cpu, hdw_thread, interrupt_mask);
|
||||
cbe_enable_pm(cpu);
|
||||
}
|
||||
|
|
@ -672,7 +711,7 @@ cell_handle_interrupt(struct pt_regs *regs, struct op_counter_config *ctr)
|
|||
|
||||
cbe_disable_pm(cpu);
|
||||
|
||||
interrupt_mask = cbe_clear_pm_interrupts(cpu);
|
||||
interrupt_mask = cbe_get_and_clear_pm_interrupts(cpu);
|
||||
|
||||
/* If the interrupt mask has been cleared, then the virt cntr
|
||||
* has cleared the interrupt. When the thread that generated
|
||||
|
|
|
|||
|
|
@ -6,5 +6,5 @@ obj-y += mpc52xx_pic.o mpc52xx_common.o
|
|||
obj-$(CONFIG_PCI) += mpc52xx_pci.o
|
||||
endif
|
||||
|
||||
obj-$(CONFIG_PPC_EFIKA) += efika-setup.o efika-pci.o
|
||||
obj-$(CONFIG_PPC_EFIKA) += efika.o
|
||||
obj-$(CONFIG_PPC_LITE5200) += lite5200.o
|
||||
|
|
|
|||
|
|
@ -1,119 +0,0 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/rtas.h>
|
||||
|
||||
#include "efika.h"
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
/*
|
||||
* Access functions for PCI config space using RTAS calls.
|
||||
*/
|
||||
static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
|
||||
int len, u32 * val)
|
||||
{
|
||||
struct pci_controller *hose = bus->sysdata;
|
||||
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
|
||||
| (((bus->number - hose->first_busno) & 0xff) << 16)
|
||||
| (hose->index << 24);
|
||||
int ret = -1;
|
||||
int rval;
|
||||
|
||||
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
|
||||
*val = ret;
|
||||
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
|
||||
int offset, int len, u32 val)
|
||||
{
|
||||
struct pci_controller *hose = bus->sysdata;
|
||||
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
|
||||
| (((bus->number - hose->first_busno) & 0xff) << 16)
|
||||
| (hose->index << 24);
|
||||
int rval;
|
||||
|
||||
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
|
||||
addr, len, val);
|
||||
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static struct pci_ops rtas_pci_ops = {
|
||||
rtas_read_config,
|
||||
rtas_write_config
|
||||
};
|
||||
|
||||
void __init efika_pcisetup(void)
|
||||
{
|
||||
const int *bus_range;
|
||||
int len;
|
||||
struct pci_controller *hose;
|
||||
struct device_node *root;
|
||||
struct device_node *pcictrl;
|
||||
|
||||
root = of_find_node_by_path("/");
|
||||
if (root == NULL) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Unable to find the root node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (pcictrl = NULL;;) {
|
||||
pcictrl = of_get_next_child(root, pcictrl);
|
||||
if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
|
||||
break;
|
||||
}
|
||||
|
||||
of_node_put(root);
|
||||
|
||||
if (pcictrl == NULL) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Unable to find the PCI bridge node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
bus_range = get_property(pcictrl, "bus-range", &len);
|
||||
if (bus_range == NULL || len < 2 * sizeof(int)) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Can't get bus-range for %s\n", pcictrl->full_name);
|
||||
return;
|
||||
}
|
||||
|
||||
if (bus_range[1] == bus_range[0])
|
||||
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
|
||||
bus_range[0]);
|
||||
else
|
||||
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
|
||||
bus_range[0], bus_range[1]);
|
||||
printk(" controlled by %s\n", pcictrl->full_name);
|
||||
printk("\n");
|
||||
|
||||
hose = pcibios_alloc_controller();
|
||||
if (!hose) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Can't allocate PCI controller structure for %s\n",
|
||||
pcictrl->full_name);
|
||||
return;
|
||||
}
|
||||
|
||||
hose->arch_data = of_node_get(pcictrl);
|
||||
hose->first_busno = bus_range[0];
|
||||
hose->last_busno = bus_range[1];
|
||||
hose->ops = &rtas_pci_ops;
|
||||
|
||||
pci_process_bridge_OF_ranges(hose, pcictrl, 0);
|
||||
}
|
||||
|
||||
#else
|
||||
void __init efika_pcisetup(void)
|
||||
{}
|
||||
#endif
|
||||
|
|
@ -1,150 +0,0 @@
|
|||
/*
|
||||
*
|
||||
* Efika 5K2 platform setup
|
||||
* Some code really inspired from the lite5200b platform.
|
||||
*
|
||||
* Copyright (C) 2006 bplan GmbH
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/errno.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/utsrelease.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/rtas.h>
|
||||
#include <asm/of_device.h>
|
||||
#include <asm/of_platform.h>
|
||||
#include <asm/mpc52xx.h>
|
||||
|
||||
#include "efika.h"
|
||||
|
||||
static void efika_show_cpuinfo(struct seq_file *m)
|
||||
{
|
||||
struct device_node *root;
|
||||
const char *revision = NULL;
|
||||
const char *codegendescription = NULL;
|
||||
const char *codegenvendor = NULL;
|
||||
|
||||
root = of_find_node_by_path("/");
|
||||
if (root) {
|
||||
revision = get_property(root, "revision", NULL);
|
||||
codegendescription =
|
||||
get_property(root, "CODEGEN,description", NULL);
|
||||
codegenvendor = get_property(root, "CODEGEN,vendor", NULL);
|
||||
|
||||
of_node_put(root);
|
||||
}
|
||||
|
||||
if (codegendescription)
|
||||
seq_printf(m, "machine\t\t: %s\n", codegendescription);
|
||||
else
|
||||
seq_printf(m, "machine\t\t: Efika\n");
|
||||
|
||||
if (revision)
|
||||
seq_printf(m, "revision\t: %s\n", revision);
|
||||
|
||||
if (codegenvendor)
|
||||
seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
|
||||
|
||||
of_node_put(root);
|
||||
}
|
||||
|
||||
static void __init efika_setup_arch(void)
|
||||
{
|
||||
rtas_initialize();
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
initrd_below_start_ok = 1;
|
||||
|
||||
if (initrd_start)
|
||||
ROOT_DEV = Root_RAM0;
|
||||
else
|
||||
#endif
|
||||
ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
|
||||
|
||||
efika_pcisetup();
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("Linux/PPC " UTS_RELEASE " runnung on Efika ;-)\n", 0x0);
|
||||
}
|
||||
|
||||
static void __init efika_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct device_node *cnp = NULL;
|
||||
const u32 *base;
|
||||
|
||||
/* Find every child of the SOC node and add it to of_platform */
|
||||
np = of_find_node_by_name(NULL, "builtin");
|
||||
if (np) {
|
||||
char name[BUS_ID_SIZE];
|
||||
while ((cnp = of_get_next_child(np, cnp))) {
|
||||
strcpy(name, cnp->name);
|
||||
|
||||
base = get_property(cnp, "reg", NULL);
|
||||
if (base == NULL)
|
||||
continue;
|
||||
|
||||
snprintf(name+strlen(name), BUS_ID_SIZE, "@%x", *base);
|
||||
of_platform_device_create(cnp, name, NULL);
|
||||
|
||||
printk(KERN_INFO EFIKA_PLATFORM_NAME" : Added %s (type '%s' at '%s') to the known devices\n", name, cnp->type, cnp->full_name);
|
||||
}
|
||||
}
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress(" Have fun with your Efika! ", 0x7777);
|
||||
}
|
||||
|
||||
static int __init efika_probe(void)
|
||||
{
|
||||
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
|
||||
"model", NULL);
|
||||
|
||||
if (model == NULL)
|
||||
return 0;
|
||||
if (strcmp(model, "EFIKA5K2"))
|
||||
return 0;
|
||||
|
||||
ISA_DMA_THRESHOLD = ~0L;
|
||||
DMA_MODE_READ = 0x44;
|
||||
DMA_MODE_WRITE = 0x48;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
define_machine(efika)
|
||||
{
|
||||
.name = EFIKA_PLATFORM_NAME,
|
||||
.probe = efika_probe,
|
||||
.setup_arch = efika_setup_arch,
|
||||
.init = efika_init,
|
||||
.show_cpuinfo = efika_show_cpuinfo,
|
||||
.init_IRQ = mpc52xx_init_irq,
|
||||
.get_irq = mpc52xx_get_irq,
|
||||
.restart = rtas_restart,
|
||||
.power_off = rtas_power_off,
|
||||
.halt = rtas_halt,
|
||||
.set_rtc_time = rtas_set_rtc_time,
|
||||
.get_rtc_time = rtas_get_rtc_time,
|
||||
.progress = rtas_progress,
|
||||
.get_boot_time = rtas_get_boot_time,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.phys_mem_access_prot = pci_phys_mem_access_prot,
|
||||
};
|
||||
|
|
@ -0,0 +1,243 @@
|
|||
/*
|
||||
* Efika 5K2 platform code
|
||||
* Some code really inspired from the lite5200b platform.
|
||||
*
|
||||
* Copyright (C) 2006 bplan GmbH
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*/
|
||||
|
||||
#include <linux/errno.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/utsrelease.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/timer.h>
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/pgtable.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/rtas.h>
|
||||
#include <asm/of_device.h>
|
||||
#include <asm/of_platform.h>
|
||||
#include <asm/mpc52xx.h>
|
||||
|
||||
|
||||
#define EFIKA_PLATFORM_NAME "Efika"
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------------ */
|
||||
/* PCI accesses thru RTAS */
|
||||
/* ------------------------------------------------------------------------ */
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
||||
/*
|
||||
* Access functions for PCI config space using RTAS calls.
|
||||
*/
|
||||
static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
|
||||
int len, u32 * val)
|
||||
{
|
||||
struct pci_controller *hose = bus->sysdata;
|
||||
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
|
||||
| (((bus->number - hose->first_busno) & 0xff) << 16)
|
||||
| (hose->index << 24);
|
||||
int ret = -1;
|
||||
int rval;
|
||||
|
||||
rval = rtas_call(rtas_token("read-pci-config"), 2, 2, &ret, addr, len);
|
||||
*val = ret;
|
||||
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static int rtas_write_config(struct pci_bus *bus, unsigned int devfn,
|
||||
int offset, int len, u32 val)
|
||||
{
|
||||
struct pci_controller *hose = bus->sysdata;
|
||||
unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8)
|
||||
| (((bus->number - hose->first_busno) & 0xff) << 16)
|
||||
| (hose->index << 24);
|
||||
int rval;
|
||||
|
||||
rval = rtas_call(rtas_token("write-pci-config"), 3, 1, NULL,
|
||||
addr, len, val);
|
||||
return rval ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
static struct pci_ops rtas_pci_ops = {
|
||||
rtas_read_config,
|
||||
rtas_write_config
|
||||
};
|
||||
|
||||
|
||||
void __init efika_pcisetup(void)
|
||||
{
|
||||
const int *bus_range;
|
||||
int len;
|
||||
struct pci_controller *hose;
|
||||
struct device_node *root;
|
||||
struct device_node *pcictrl;
|
||||
|
||||
root = of_find_node_by_path("/");
|
||||
if (root == NULL) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Unable to find the root node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
for (pcictrl = NULL;;) {
|
||||
pcictrl = of_get_next_child(root, pcictrl);
|
||||
if ((pcictrl == NULL) || (strcmp(pcictrl->name, "pci") == 0))
|
||||
break;
|
||||
}
|
||||
|
||||
of_node_put(root);
|
||||
|
||||
if (pcictrl == NULL) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Unable to find the PCI bridge node\n");
|
||||
return;
|
||||
}
|
||||
|
||||
bus_range = get_property(pcictrl, "bus-range", &len);
|
||||
if (bus_range == NULL || len < 2 * sizeof(int)) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Can't get bus-range for %s\n", pcictrl->full_name);
|
||||
return;
|
||||
}
|
||||
|
||||
if (bus_range[1] == bus_range[0])
|
||||
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI bus %d",
|
||||
bus_range[0]);
|
||||
else
|
||||
printk(KERN_INFO EFIKA_PLATFORM_NAME ": PCI buses %d..%d",
|
||||
bus_range[0], bus_range[1]);
|
||||
printk(" controlled by %s\n", pcictrl->full_name);
|
||||
printk("\n");
|
||||
|
||||
hose = pcibios_alloc_controller();
|
||||
if (!hose) {
|
||||
printk(KERN_WARNING EFIKA_PLATFORM_NAME
|
||||
": Can't allocate PCI controller structure for %s\n",
|
||||
pcictrl->full_name);
|
||||
return;
|
||||
}
|
||||
|
||||
hose->arch_data = of_node_get(pcictrl);
|
||||
hose->first_busno = bus_range[0];
|
||||
hose->last_busno = bus_range[1];
|
||||
hose->ops = &rtas_pci_ops;
|
||||
|
||||
pci_process_bridge_OF_ranges(hose, pcictrl, 0);
|
||||
}
|
||||
|
||||
#else
|
||||
void __init efika_pcisetup(void)
|
||||
{}
|
||||
#endif
|
||||
|
||||
|
||||
|
||||
/* ------------------------------------------------------------------------ */
|
||||
/* Platform setup */
|
||||
/* ------------------------------------------------------------------------ */
|
||||
|
||||
static void efika_show_cpuinfo(struct seq_file *m)
|
||||
{
|
||||
struct device_node *root;
|
||||
const char *revision = NULL;
|
||||
const char *codegendescription = NULL;
|
||||
const char *codegenvendor = NULL;
|
||||
|
||||
root = of_find_node_by_path("/");
|
||||
if (!root)
|
||||
return;
|
||||
|
||||
revision = get_property(root, "revision", NULL);
|
||||
codegendescription =
|
||||
get_property(root, "CODEGEN,description", NULL);
|
||||
codegenvendor = get_property(root, "CODEGEN,vendor", NULL);
|
||||
|
||||
if (codegendescription)
|
||||
seq_printf(m, "machine\t\t: %s\n", codegendescription);
|
||||
else
|
||||
seq_printf(m, "machine\t\t: Efika\n");
|
||||
|
||||
if (revision)
|
||||
seq_printf(m, "revision\t: %s\n", revision);
|
||||
|
||||
if (codegenvendor)
|
||||
seq_printf(m, "vendor\t\t: %s\n", codegenvendor);
|
||||
|
||||
of_node_put(root);
|
||||
}
|
||||
|
||||
static void __init efika_setup_arch(void)
|
||||
{
|
||||
rtas_initialize();
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
initrd_below_start_ok = 1;
|
||||
|
||||
if (initrd_start)
|
||||
ROOT_DEV = Root_RAM0;
|
||||
else
|
||||
#endif
|
||||
ROOT_DEV = Root_SDA2; /* sda2 (sda1 is for the kernel) */
|
||||
|
||||
efika_pcisetup();
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("Linux/PPC " UTS_RELEASE " running on Efika ;-)\n", 0x0);
|
||||
}
|
||||
|
||||
static int __init efika_probe(void)
|
||||
{
|
||||
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
|
||||
"model", NULL);
|
||||
|
||||
if (model == NULL)
|
||||
return 0;
|
||||
if (strcmp(model, "EFIKA5K2"))
|
||||
return 0;
|
||||
|
||||
ISA_DMA_THRESHOLD = ~0L;
|
||||
DMA_MODE_READ = 0x44;
|
||||
DMA_MODE_WRITE = 0x48;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
define_machine(efika)
|
||||
{
|
||||
.name = EFIKA_PLATFORM_NAME,
|
||||
.probe = efika_probe,
|
||||
.setup_arch = efika_setup_arch,
|
||||
.init = mpc52xx_declare_of_platform_devices,
|
||||
.show_cpuinfo = efika_show_cpuinfo,
|
||||
.init_IRQ = mpc52xx_init_irq,
|
||||
.get_irq = mpc52xx_get_irq,
|
||||
.restart = rtas_restart,
|
||||
.power_off = rtas_power_off,
|
||||
.halt = rtas_halt,
|
||||
.set_rtc_time = rtas_set_rtc_time,
|
||||
.get_rtc_time = rtas_get_rtc_time,
|
||||
.progress = rtas_progress,
|
||||
.get_boot_time = rtas_get_boot_time,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.phys_mem_access_prot = pci_phys_mem_access_prot,
|
||||
};
|
||||
|
||||
|
|
@ -1,19 +0,0 @@
|
|||
/*
|
||||
* Efika 5K2 platform setup - Header file
|
||||
*
|
||||
* Copyright (C) 2006 bplan GmbH
|
||||
*
|
||||
* This file is licensed under the terms of the GNU General Public License
|
||||
* version 2. This program is licensed "as is" without any warranty of any
|
||||
* kind, whether express or implied.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __ARCH_POWERPC_EFIKA__
|
||||
#define __ARCH_POWERPC_EFIKA__
|
||||
|
||||
#define EFIKA_PLATFORM_NAME "Efika"
|
||||
|
||||
extern void __init efika_pcisetup(void);
|
||||
|
||||
#endif
|
||||
|
|
@ -51,13 +51,13 @@
|
|||
*/
|
||||
|
||||
static void __init
|
||||
lite52xx_setup_cpu(void)
|
||||
lite5200_setup_cpu(void)
|
||||
{
|
||||
struct mpc52xx_gpio __iomem *gpio;
|
||||
u32 port_config;
|
||||
|
||||
/* Map zones */
|
||||
gpio = mpc52xx_find_and_map("mpc52xx-gpio");
|
||||
gpio = mpc52xx_find_and_map("mpc5200-gpio");
|
||||
if (!gpio) {
|
||||
printk(KERN_ERR __FILE__ ": "
|
||||
"Error while mapping GPIO register for port config. "
|
||||
|
|
@ -85,12 +85,12 @@ error:
|
|||
iounmap(gpio);
|
||||
}
|
||||
|
||||
static void __init lite52xx_setup_arch(void)
|
||||
static void __init lite5200_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("lite52xx_setup_arch()", 0);
|
||||
ppc_md.progress("lite5200_setup_arch()", 0);
|
||||
|
||||
np = of_find_node_by_type(NULL, "cpu");
|
||||
if (np) {
|
||||
|
|
@ -105,7 +105,7 @@ static void __init lite52xx_setup_arch(void)
|
|||
|
||||
/* CPU & Port mux setup */
|
||||
mpc52xx_setup_cpu(); /* Generic */
|
||||
lite52xx_setup_cpu(); /* Platorm specific */
|
||||
lite5200_setup_cpu(); /* Platorm specific */
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
np = of_find_node_by_type(np, "pci");
|
||||
|
|
@ -126,7 +126,7 @@ static void __init lite52xx_setup_arch(void)
|
|||
|
||||
}
|
||||
|
||||
void lite52xx_show_cpuinfo(struct seq_file *m)
|
||||
void lite5200_show_cpuinfo(struct seq_file *m)
|
||||
{
|
||||
struct device_node* np = of_find_all_nodes(NULL);
|
||||
const char *model = NULL;
|
||||
|
|
@ -143,25 +143,26 @@ void lite52xx_show_cpuinfo(struct seq_file *m)
|
|||
/*
|
||||
* Called very early, MMU is off, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init lite52xx_probe(void)
|
||||
static int __init lite5200_probe(void)
|
||||
{
|
||||
unsigned long node = of_get_flat_dt_root();
|
||||
const char *model = of_get_flat_dt_prop(node, "model", NULL);
|
||||
|
||||
if (!of_flat_dt_is_compatible(node, "lite52xx"))
|
||||
if (!of_flat_dt_is_compatible(node, "fsl,lite5200") &&
|
||||
!of_flat_dt_is_compatible(node, "fsl,lite5200b"))
|
||||
return 0;
|
||||
pr_debug("%s board w/ mpc52xx found\n", model ? model : "unknown");
|
||||
pr_debug("%s board found\n", model ? model : "unknown");
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
define_machine(lite52xx) {
|
||||
.name = "lite52xx",
|
||||
.probe = lite52xx_probe,
|
||||
.setup_arch = lite52xx_setup_arch,
|
||||
define_machine(lite5200) {
|
||||
.name = "lite5200",
|
||||
.probe = lite5200_probe,
|
||||
.setup_arch = lite5200_setup_arch,
|
||||
.init = mpc52xx_declare_of_platform_devices,
|
||||
.init_IRQ = mpc52xx_init_irq,
|
||||
.get_irq = mpc52xx_get_irq,
|
||||
.show_cpuinfo = lite52xx_show_cpuinfo,
|
||||
.show_cpuinfo = lite5200_show_cpuinfo,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -83,8 +83,8 @@ mpc52xx_setup_cpu(void)
|
|||
struct mpc52xx_xlb __iomem *xlb;
|
||||
|
||||
/* Map zones */
|
||||
cdm = mpc52xx_find_and_map("mpc52xx-cdm");
|
||||
xlb = mpc52xx_find_and_map("mpc52xx-xlb");
|
||||
cdm = mpc52xx_find_and_map("mpc5200-cdm");
|
||||
xlb = mpc52xx_find_and_map("mpc5200-xlb");
|
||||
|
||||
if (!cdm || !xlb) {
|
||||
printk(KERN_ERR __FILE__ ": "
|
||||
|
|
|
|||
|
|
@ -383,16 +383,16 @@ void __init mpc52xx_init_irq(void)
|
|||
struct device_node *picnode;
|
||||
|
||||
/* Remap the necessary zones */
|
||||
picnode = of_find_compatible_node(NULL, NULL, "mpc52xx-pic");
|
||||
picnode = of_find_compatible_node(NULL, NULL, "mpc5200-pic");
|
||||
|
||||
intr = mpc52xx_find_and_map("mpc52xx-pic");
|
||||
intr = mpc52xx_find_and_map("mpc5200-pic");
|
||||
if (!intr)
|
||||
panic(__FILE__ ": find_and_map failed on 'mpc52xx-pic'. "
|
||||
panic(__FILE__ ": find_and_map failed on 'mpc5200-pic'. "
|
||||
"Check node !");
|
||||
|
||||
sdma = mpc52xx_find_and_map("mpc52xx-bestcomm");
|
||||
sdma = mpc52xx_find_and_map("mpc5200-bestcomm");
|
||||
if (!sdma)
|
||||
panic(__FILE__ ": find_and_map failed on 'mpc52xx-bestcomm'. "
|
||||
panic(__FILE__ ": find_and_map failed on 'mpc5200-bestcomm'. "
|
||||
"Check node !");
|
||||
|
||||
/* Disable all interrupt sources. */
|
||||
|
|
|
|||
|
|
@ -3,7 +3,13 @@ menu "Platform support"
|
|||
|
||||
choice
|
||||
prompt "Machine Type"
|
||||
default MPC834x_SYS
|
||||
default MPC834x_MDS
|
||||
|
||||
config MPC8313_RDB
|
||||
bool "Freescale MPC8313 RDB"
|
||||
select DEFAULT_UIMAGE
|
||||
help
|
||||
This option enables support for the MPC8313 RDB board.
|
||||
|
||||
config MPC832x_MDS
|
||||
bool "Freescale MPC832x MDS"
|
||||
|
|
@ -12,13 +18,13 @@ config MPC832x_MDS
|
|||
help
|
||||
This option enables support for the MPC832x MDS evaluation board.
|
||||
|
||||
config MPC834x_SYS
|
||||
bool "Freescale MPC834x SYS"
|
||||
config MPC834x_MDS
|
||||
bool "Freescale MPC834x MDS"
|
||||
select DEFAULT_UIMAGE
|
||||
help
|
||||
This option enables support for the MPC 834x SYS evaluation board.
|
||||
This option enables support for the MPC 834x MDS evaluation board.
|
||||
|
||||
Be aware that PCI buses can only function when SYS board is plugged
|
||||
Be aware that PCI buses can only function when MDS board is plugged
|
||||
into the PIB (Platform IO Board) board from Freescale which provide
|
||||
3 PCI slots. The PIBs PCI initialization is the bootloader's
|
||||
responsibility.
|
||||
|
|
@ -41,6 +47,12 @@ config MPC8360E_PB
|
|||
|
||||
endchoice
|
||||
|
||||
config PPC_MPC831x
|
||||
bool
|
||||
select PPC_UDBG_16550
|
||||
select PPC_INDIRECT_PCI
|
||||
default y if MPC8313_RDB
|
||||
|
||||
config PPC_MPC832x
|
||||
bool
|
||||
select PPC_UDBG_16550
|
||||
|
|
@ -51,7 +63,7 @@ config MPC834x
|
|||
bool
|
||||
select PPC_UDBG_16550
|
||||
select PPC_INDIRECT_PCI
|
||||
default y if MPC834x_SYS || MPC834x_ITX
|
||||
default y if MPC834x_MDS || MPC834x_ITX
|
||||
|
||||
config PPC_MPC836x
|
||||
bool
|
||||
|
|
|
|||
|
|
@ -3,7 +3,8 @@
|
|||
#
|
||||
obj-y := misc.o
|
||||
obj-$(CONFIG_PCI) += pci.o
|
||||
obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o
|
||||
obj-$(CONFIG_MPC8313_RDB) += mpc8313_rdb.o
|
||||
obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
|
||||
obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
|
||||
obj-$(CONFIG_MPC8360E_PB) += mpc8360e_pb.o
|
||||
obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,99 @@
|
|||
/*
|
||||
* arch/powerpc/platforms/83xx/mpc8313_rdb.c
|
||||
*
|
||||
* Description: MPC8313x RDB board specific routines.
|
||||
* This file is based on mpc834x_sys.c
|
||||
* Author: Lo Wlison <r43300@freescale.com>
|
||||
*
|
||||
* Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/pci.h>
|
||||
|
||||
#include <asm/time.h>
|
||||
#include <asm/ipic.h>
|
||||
#include <asm/udbg.h>
|
||||
|
||||
#include "mpc83xx.h"
|
||||
|
||||
#undef DEBUG
|
||||
#ifdef DEBUG
|
||||
#define DBG(fmt...) udbg_printf(fmt)
|
||||
#else
|
||||
#define DBG(fmt...)
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_PCI
|
||||
unsigned long isa_io_base = 0;
|
||||
unsigned long isa_mem_base = 0;
|
||||
#endif
|
||||
|
||||
/* ************************************************************************
|
||||
*
|
||||
* Setup the architecture
|
||||
*
|
||||
*/
|
||||
static void __init mpc8313_rdb_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8313_rdb_setup_arch()", 0);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
|
||||
add_bridge(np);
|
||||
|
||||
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
|
||||
#endif
|
||||
}
|
||||
|
||||
void __init mpc8313_rdb_init_IRQ(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
np = of_find_node_by_type(NULL, "ipic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
ipic_init(np, 0);
|
||||
|
||||
/* Initialize the default interrupt mapping priorities,
|
||||
* in case the boot rom changed something on us.
|
||||
*/
|
||||
ipic_set_default_priority();
|
||||
}
|
||||
|
||||
/*
|
||||
* Called very early, MMU is off, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init mpc8313_rdb_probe(void)
|
||||
{
|
||||
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
|
||||
"model", NULL);
|
||||
if (model == NULL)
|
||||
return 0;
|
||||
if (strcmp(model, "MPC8313ERDB"))
|
||||
return 0;
|
||||
|
||||
DBG("MPC8313 RDB found\n");
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
define_machine(mpc8313_rdb) {
|
||||
.name = "MPC8313 RDB",
|
||||
.probe = mpc8313_rdb_probe,
|
||||
.setup_arch = mpc8313_rdb_setup_arch,
|
||||
.init_IRQ = mpc8313_rdb_init_IRQ,
|
||||
.get_irq = ipic_get_irq,
|
||||
.restart = mpc83xx_restart,
|
||||
.time_init = mpc83xx_time_init,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
|
|
@ -38,8 +38,6 @@
|
|||
|
||||
#include "mpc83xx.h"
|
||||
|
||||
#include <platforms/83xx/mpc834x_sys.h>
|
||||
|
||||
#ifndef CONFIG_PCI
|
||||
unsigned long isa_io_base = 0;
|
||||
unsigned long isa_mem_base = 0;
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
/*
|
||||
* arch/powerpc/platforms/83xx/mpc834x_sys.c
|
||||
* arch/powerpc/platforms/83xx/mpc834x_mds.c
|
||||
*
|
||||
* MPC834x SYS board specific routines
|
||||
* MPC834x MDS board specific routines
|
||||
*
|
||||
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
|
||||
*
|
||||
|
|
@ -43,17 +43,87 @@ unsigned long isa_io_base = 0;
|
|||
unsigned long isa_mem_base = 0;
|
||||
#endif
|
||||
|
||||
#define BCSR5_INT_USB 0x02
|
||||
/* Note: This is only for PB, not for PB+PIB
|
||||
* On PB only port0 is connected using ULPI */
|
||||
static int mpc834x_usb_cfg(void)
|
||||
{
|
||||
unsigned long sccr, sicrl;
|
||||
void __iomem *immap;
|
||||
void __iomem *bcsr_regs = NULL;
|
||||
u8 bcsr5;
|
||||
struct device_node *np = NULL;
|
||||
int port0_is_dr = 0;
|
||||
|
||||
if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-dr")) != NULL)
|
||||
port0_is_dr = 1;
|
||||
if ((np = of_find_compatible_node(np, "usb", "fsl-usb2-mph")) != NULL){
|
||||
if (port0_is_dr) {
|
||||
printk(KERN_WARNING
|
||||
"There is only one USB port on PB board! \n");
|
||||
return -1;
|
||||
} else if (!port0_is_dr)
|
||||
/* No usb port enabled */
|
||||
return -1;
|
||||
}
|
||||
|
||||
immap = ioremap(get_immrbase(), 0x1000);
|
||||
if (!immap)
|
||||
return -1;
|
||||
|
||||
/* Configure clock */
|
||||
sccr = in_be32(immap + MPC83XX_SCCR_OFFS);
|
||||
if (port0_is_dr)
|
||||
sccr |= MPC83XX_SCCR_USB_DRCM_11; /* 1:3 */
|
||||
else
|
||||
sccr |= MPC83XX_SCCR_USB_MPHCM_11; /* 1:3 */
|
||||
out_be32(immap + MPC83XX_SCCR_OFFS, sccr);
|
||||
|
||||
/* Configure Pin */
|
||||
sicrl = in_be32(immap + MPC83XX_SICRL_OFFS);
|
||||
/* set port0 only */
|
||||
if (port0_is_dr)
|
||||
sicrl |= MPC83XX_SICRL_USB0;
|
||||
else
|
||||
sicrl &= ~(MPC83XX_SICRL_USB0);
|
||||
out_be32(immap + MPC83XX_SICRL_OFFS, sicrl);
|
||||
|
||||
iounmap(immap);
|
||||
|
||||
/* Map BCSR area */
|
||||
np = of_find_node_by_name(NULL, "bcsr");
|
||||
if (np != 0) {
|
||||
struct resource res;
|
||||
|
||||
of_address_to_resource(np, 0, &res);
|
||||
bcsr_regs = ioremap(res.start, res.end - res.start + 1);
|
||||
of_node_put(np);
|
||||
}
|
||||
if (!bcsr_regs)
|
||||
return -1;
|
||||
|
||||
/*
|
||||
* if MDS board is plug into PIB board,
|
||||
* force to use the PHY on MDS board
|
||||
*/
|
||||
bcsr5 = in_8(bcsr_regs + 5);
|
||||
if (!(bcsr5 & BCSR5_INT_USB))
|
||||
out_8(bcsr_regs + 5, (bcsr5 | BCSR5_INT_USB));
|
||||
iounmap(bcsr_regs);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* ************************************************************************
|
||||
*
|
||||
* Setup the architecture
|
||||
*
|
||||
*/
|
||||
static void __init mpc834x_sys_setup_arch(void)
|
||||
static void __init mpc834x_mds_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc834x_sys_setup_arch()", 0);
|
||||
ppc_md.progress("mpc834x_mds_setup_arch()", 0);
|
||||
|
||||
np = of_find_node_by_type(NULL, "cpu");
|
||||
if (np != 0) {
|
||||
|
|
@ -65,6 +135,7 @@ static void __init mpc834x_sys_setup_arch(void)
|
|||
loops_per_jiffy = 50000000 / HZ;
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
|
||||
add_bridge(np);
|
||||
|
|
@ -72,6 +143,8 @@ static void __init mpc834x_sys_setup_arch(void)
|
|||
ppc_md.pci_exclude_device = mpc83xx_exclude_device;
|
||||
#endif
|
||||
|
||||
mpc834x_usb_cfg();
|
||||
|
||||
#ifdef CONFIG_ROOT_NFS
|
||||
ROOT_DEV = Root_NFS;
|
||||
#else
|
||||
|
|
@ -79,7 +152,7 @@ static void __init mpc834x_sys_setup_arch(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
static void __init mpc834x_sys_init_IRQ(void)
|
||||
static void __init mpc834x_mds_init_IRQ(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
||||
|
|
@ -119,7 +192,7 @@ late_initcall(mpc834x_rtc_hookup);
|
|||
/*
|
||||
* Called very early, MMU is off, device-tree isn't unflattened
|
||||
*/
|
||||
static int __init mpc834x_sys_probe(void)
|
||||
static int __init mpc834x_mds_probe(void)
|
||||
{
|
||||
/* We always match for now, eventually we should look at the flat
|
||||
dev tree to ensure this is the board we are suppose to run on
|
||||
|
|
@ -127,11 +200,11 @@ static int __init mpc834x_sys_probe(void)
|
|||
return 1;
|
||||
}
|
||||
|
||||
define_machine(mpc834x_sys) {
|
||||
.name = "MPC834x SYS",
|
||||
.probe = mpc834x_sys_probe,
|
||||
.setup_arch = mpc834x_sys_setup_arch,
|
||||
.init_IRQ = mpc834x_sys_init_IRQ,
|
||||
define_machine(mpc834x_mds) {
|
||||
.name = "MPC834x MDS",
|
||||
.probe = mpc834x_mds_probe,
|
||||
.setup_arch = mpc834x_mds_setup_arch,
|
||||
.init_IRQ = mpc834x_mds_init_IRQ,
|
||||
.get_irq = ipic_get_irq,
|
||||
.restart = mpc83xx_restart,
|
||||
.time_init = mpc83xx_time_init,
|
||||
|
|
@ -1,23 +0,0 @@
|
|||
/*
|
||||
* arch/powerpc/platforms/83xx/mpc834x_sys.h
|
||||
*
|
||||
* MPC834X SYS common board definitions
|
||||
*
|
||||
* Maintainer: Kumar Gala <galak@kernel.crashing.org>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __MACH_MPC83XX_SYS_H__
|
||||
#define __MACH_MPC83XX_SYS_H__
|
||||
|
||||
#define PIRQA MPC83xx_IRQ_EXT4
|
||||
#define PIRQB MPC83xx_IRQ_EXT5
|
||||
#define PIRQC MPC83xx_IRQ_EXT6
|
||||
#define PIRQD MPC83xx_IRQ_EXT7
|
||||
|
||||
#endif /* __MACH_MPC83XX_SYS_H__ */
|
||||
|
|
@ -4,6 +4,24 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/device.h>
|
||||
|
||||
/* System Clock Control Register */
|
||||
#define MPC83XX_SCCR_OFFS 0xA08
|
||||
#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
|
||||
#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
|
||||
#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
|
||||
#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
|
||||
#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
|
||||
#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
|
||||
|
||||
/* system i/o configuration register low */
|
||||
#define MPC83XX_SICRL_OFFS 0x114
|
||||
#define MPC83XX_SICRL_USB0 0x40000000
|
||||
#define MPC83XX_SICRL_USB1 0x20000000
|
||||
|
||||
/* system i/o configuration register high */
|
||||
#define MPC83XX_SICRH_OFFS 0x118
|
||||
#define MPC83XX_SICRH_USB_UTMI 0x00020000
|
||||
|
||||
/*
|
||||
* Declaration for the various functions exported by the
|
||||
* mpc83xx_* files. Mostly for use by mpc83xx_setup
|
||||
|
|
|
|||
|
|
@ -23,6 +23,13 @@ config MPC85xx_CDS
|
|||
help
|
||||
This option enables support for the MPC85xx CDS board
|
||||
|
||||
config MPC8568_MDS
|
||||
bool "Freescale MPC8568 MDS"
|
||||
select DEFAULT_UIMAGE
|
||||
# select QUICC_ENGINE
|
||||
help
|
||||
This option enables support for the MPC8568 MDS board
|
||||
|
||||
endchoice
|
||||
|
||||
config MPC8540
|
||||
|
|
@ -36,6 +43,12 @@ config MPC8560
|
|||
select PPC_INDIRECT_PCI
|
||||
default y if MPC8560_ADS
|
||||
|
||||
config MPC85xx
|
||||
bool
|
||||
select PPC_UDBG_16550
|
||||
select PPC_INDIRECT_PCI
|
||||
default y if MPC8540_ADS || MPC85xx_CDS || MPC8560_ADS || MPC8568_MDS
|
||||
|
||||
config PPC_INDIRECT_PCI_BE
|
||||
bool
|
||||
depends on PPC_85xx
|
||||
|
|
|
|||
|
|
@ -5,3 +5,4 @@ obj-$(CONFIG_PPC_85xx) += misc.o pci.o
|
|||
obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
|
||||
obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
|
||||
obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
|
||||
obj-$(CONFIG_MPC8568_MDS) += mpc8568_mds.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,246 @@
|
|||
/*
|
||||
* Copyright (C) Freescale Semicondutor, Inc. 2006-2007. All rights reserved.
|
||||
*
|
||||
* Author: Andy Fleming <afleming@freescale.com>
|
||||
*
|
||||
* Based on 83xx/mpc8360e_pb.c by:
|
||||
* Li Yang <LeoLi@freescale.com>
|
||||
* Yin Olivia <Hong-hua.Yin@freescale.com>
|
||||
*
|
||||
* Description:
|
||||
* MPC8568E MDS PB board specific routines.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kdev_t.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/fsl_devices.h>
|
||||
|
||||
#include <asm/of_device.h>
|
||||
#include <asm/of_platform.h>
|
||||
#include <asm/system.h>
|
||||
#include <asm/atomic.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/pci-bridge.h>
|
||||
#include <asm/mpc85xx.h>
|
||||
#include <asm/irq.h>
|
||||
#include <mm/mmu_decl.h>
|
||||
#include <asm/prom.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <sysdev/fsl_soc.h>
|
||||
#include <asm/qe.h>
|
||||
#include <asm/qe_ic.h>
|
||||
#include <asm/mpic.h>
|
||||
|
||||
#include "mpc85xx.h"
|
||||
|
||||
#undef DEBUG
|
||||
#ifdef DEBUG
|
||||
#define DBG(fmt...) udbg_printf(fmt)
|
||||
#else
|
||||
#define DBG(fmt...)
|
||||
#endif
|
||||
|
||||
#ifndef CONFIG_PCI
|
||||
unsigned long isa_io_base = 0;
|
||||
unsigned long isa_mem_base = 0;
|
||||
#endif
|
||||
|
||||
/* ************************************************************************
|
||||
*
|
||||
* Setup the architecture
|
||||
*
|
||||
*/
|
||||
static void __init mpc8568_mds_setup_arch(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
static u8 *bcsr_regs = NULL;
|
||||
|
||||
|
||||
if (ppc_md.progress)
|
||||
ppc_md.progress("mpc8568_mds_setup_arch()", 0);
|
||||
|
||||
np = of_find_node_by_type(NULL, "cpu");
|
||||
if (np != NULL) {
|
||||
const unsigned int *fp =
|
||||
get_property(np, "clock-frequency", NULL);
|
||||
if (fp != NULL)
|
||||
loops_per_jiffy = *fp / HZ;
|
||||
else
|
||||
loops_per_jiffy = 50000000 / HZ;
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
/* Map BCSR area */
|
||||
np = of_find_node_by_name(NULL, "bcsr");
|
||||
if (np != NULL) {
|
||||
struct resource res;
|
||||
|
||||
of_address_to_resource(np, 0, &res);
|
||||
bcsr_regs = ioremap(res.start, res.end - res.start +1);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;) {
|
||||
add_bridge(np);
|
||||
}
|
||||
of_node_put(np);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
if ((np = of_find_node_by_name(NULL, "qe")) != NULL) {
|
||||
qe_reset();
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
if ((np = of_find_node_by_name(NULL, "par_io")) != NULL) {
|
||||
struct device_node *ucc = NULL;
|
||||
|
||||
par_io_init(np);
|
||||
of_node_put(np);
|
||||
|
||||
for ( ;(ucc = of_find_node_by_name(ucc, "ucc")) != NULL;)
|
||||
par_io_of_config(ucc);
|
||||
|
||||
of_node_put(ucc);
|
||||
}
|
||||
|
||||
if (bcsr_regs) {
|
||||
u8 bcsr_phy;
|
||||
|
||||
/* Reset the Ethernet PHY */
|
||||
bcsr_phy = in_be8(&bcsr_regs[9]);
|
||||
bcsr_phy &= ~0x20;
|
||||
out_be8(&bcsr_regs[9], bcsr_phy);
|
||||
|
||||
udelay(1000);
|
||||
|
||||
bcsr_phy = in_be8(&bcsr_regs[9]);
|
||||
bcsr_phy |= 0x20;
|
||||
out_be8(&bcsr_regs[9], bcsr_phy);
|
||||
|
||||
iounmap(bcsr_regs);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
}
|
||||
|
||||
static struct of_device_id mpc8568_ids[] = {
|
||||
{ .type = "soc", },
|
||||
{ .compatible = "soc", },
|
||||
{ .type = "qe", },
|
||||
{},
|
||||
};
|
||||
|
||||
static int __init mpc8568_publish_devices(void)
|
||||
{
|
||||
if (!machine_is(mpc8568_mds))
|
||||
return 0;
|
||||
|
||||
/* Publish the QE devices */
|
||||
of_platform_bus_probe(NULL,mpc8568_ids,NULL);
|
||||
|
||||
return 0;
|
||||
}
|
||||
device_initcall(mpc8568_publish_devices);
|
||||
|
||||
static void __init mpc8568_mds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
struct device_node *np = NULL;
|
||||
|
||||
np = of_find_node_by_type(NULL, "open-pic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
if (of_address_to_resource(np, 0, &r)) {
|
||||
printk(KERN_ERR "Failed to map mpic register space\n");
|
||||
of_node_put(np);
|
||||
return;
|
||||
}
|
||||
|
||||
mpic = mpic_alloc(np, r.start,
|
||||
MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
|
||||
4, 0, " OpenPIC ");
|
||||
BUG_ON(mpic == NULL);
|
||||
of_node_put(np);
|
||||
|
||||
/* Internal Interrupts */
|
||||
mpic_assign_isu(mpic, 0, r.start + 0x10200);
|
||||
mpic_assign_isu(mpic, 1, r.start + 0x10280);
|
||||
mpic_assign_isu(mpic, 2, r.start + 0x10300);
|
||||
mpic_assign_isu(mpic, 3, r.start + 0x10380);
|
||||
mpic_assign_isu(mpic, 4, r.start + 0x10400);
|
||||
mpic_assign_isu(mpic, 5, r.start + 0x10480);
|
||||
mpic_assign_isu(mpic, 6, r.start + 0x10500);
|
||||
mpic_assign_isu(mpic, 7, r.start + 0x10580);
|
||||
mpic_assign_isu(mpic, 8, r.start + 0x10600);
|
||||
mpic_assign_isu(mpic, 9, r.start + 0x10680);
|
||||
mpic_assign_isu(mpic, 10, r.start + 0x10700);
|
||||
mpic_assign_isu(mpic, 11, r.start + 0x10780);
|
||||
|
||||
/* External Interrupts */
|
||||
mpic_assign_isu(mpic, 12, r.start + 0x10000);
|
||||
mpic_assign_isu(mpic, 13, r.start + 0x10080);
|
||||
mpic_assign_isu(mpic, 14, r.start + 0x10100);
|
||||
|
||||
mpic_init(mpic);
|
||||
|
||||
|
||||
#ifdef CONFIG_QUICC_ENGINE
|
||||
np = of_find_node_by_type(NULL, "qeic");
|
||||
if (!np)
|
||||
return;
|
||||
|
||||
qe_ic_init(np, 0);
|
||||
of_node_put(np);
|
||||
#endif /* CONFIG_QUICC_ENGINE */
|
||||
}
|
||||
|
||||
|
||||
static int __init mpc8568_mds_probe(void)
|
||||
{
|
||||
char *model = of_get_flat_dt_prop(of_get_flat_dt_root(),
|
||||
"model", NULL);
|
||||
if (model == NULL)
|
||||
return 0;
|
||||
if (strcmp(model, "MPC8568EMDS"))
|
||||
return 0;
|
||||
|
||||
DBG("MPC8568EMDS found\n");
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
|
||||
define_machine(mpc8568_mds) {
|
||||
.name = "MPC8568E MDS",
|
||||
.probe = mpc8568_mds_probe,
|
||||
.setup_arch = mpc8568_mds_setup_arch,
|
||||
.init_IRQ = mpc8568_mds_pic_init,
|
||||
.get_irq = mpic_get_irq,
|
||||
.restart = mpc85xx_restart,
|
||||
.calibrate_decr = generic_calibrate_decr,
|
||||
.progress = udbg_progress,
|
||||
};
|
||||
|
|
@ -45,8 +45,7 @@ unsigned long isa_mem_base = 0;
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
int
|
||||
mpc85xx_exclude_device(u_char bus, u_char devfn)
|
||||
static int mpc85xx_exclude_device(u_char bus, u_char devfn)
|
||||
{
|
||||
if (bus == 0 && PCI_SLOT(devfn) == 0)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
|
|
@ -69,7 +68,7 @@ static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
|
|||
|
||||
#endif /* CONFIG_CPM2 */
|
||||
|
||||
void __init mpc85xx_ads_pic_init(void)
|
||||
static void __init mpc85xx_ads_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
|
|
@ -254,7 +253,7 @@ static void __init mpc85xx_ads_setup_arch(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
|
||||
static void mpc85xx_ads_show_cpuinfo(struct seq_file *m)
|
||||
{
|
||||
uint pvid, svid, phid1;
|
||||
uint memsize = total_memory;
|
||||
|
|
|
|||
|
|
@ -56,7 +56,6 @@ unsigned long isa_mem_base = 0;
|
|||
static int cds_pci_slot = 2;
|
||||
static volatile u8 *cadmus;
|
||||
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
||||
#define ARCADIA_HOST_BRIDGE_IDSEL 17
|
||||
|
|
@ -64,8 +63,7 @@ static volatile u8 *cadmus;
|
|||
|
||||
extern int mpc85xx_pci2_busno;
|
||||
|
||||
int
|
||||
mpc85xx_exclude_device(u_char bus, u_char devfn)
|
||||
static int mpc85xx_exclude_device(u_char bus, u_char devfn)
|
||||
{
|
||||
if (bus == 0 && PCI_SLOT(devfn) == 0)
|
||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||
|
|
@ -81,8 +79,7 @@ mpc85xx_exclude_device(u_char bus, u_char devfn)
|
|||
return PCIBIOS_SUCCESSFUL;
|
||||
}
|
||||
|
||||
void __init
|
||||
mpc85xx_cds_pcibios_fixup(void)
|
||||
static void __init mpc85xx_cds_pcibios_fixup(void)
|
||||
{
|
||||
struct pci_dev *dev;
|
||||
u_char c;
|
||||
|
|
@ -144,7 +141,7 @@ static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
|
|||
#endif /* PPC_I8259 */
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
void __init mpc85xx_cds_pic_init(void)
|
||||
static void __init mpc85xx_cds_pic_init(void)
|
||||
{
|
||||
struct mpic *mpic;
|
||||
struct resource r;
|
||||
|
|
@ -224,12 +221,10 @@ void __init mpc85xx_cds_pic_init(void)
|
|||
#endif /* CONFIG_PPC_I8259 */
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* Setup the architecture
|
||||
*/
|
||||
static void __init
|
||||
mpc85xx_cds_setup_arch(void)
|
||||
static void __init mpc85xx_cds_setup_arch(void)
|
||||
{
|
||||
struct device_node *cpu;
|
||||
#ifdef CONFIG_PCI
|
||||
|
|
@ -276,9 +271,7 @@ mpc85xx_cds_setup_arch(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
mpc85xx_cds_show_cpuinfo(struct seq_file *m)
|
||||
static void mpc85xx_cds_show_cpuinfo(struct seq_file *m)
|
||||
{
|
||||
uint pvid, svid, phid1;
|
||||
uint memsize = total_memory;
|
||||
|
|
|
|||
|
|
@ -5,9 +5,9 @@ ifeq ($(CONFIG_PPC64),y)
|
|||
obj-$(CONFIG_PPC_PMAC) += powermac/
|
||||
endif
|
||||
endif
|
||||
obj-$(CONFIG_PPC_MPC52xx) += 52xx/
|
||||
obj-$(CONFIG_PPC_CHRP) += chrp/
|
||||
obj-$(CONFIG_4xx) += 4xx/
|
||||
obj-$(CONFIG_PPC_MPC52xx) += 52xx/
|
||||
obj-$(CONFIG_PPC_8xx) += 8xx/
|
||||
obj-$(CONFIG_PPC_82xx) += 82xx/
|
||||
obj-$(CONFIG_PPC_83xx) += 83xx/
|
||||
|
|
|
|||
|
|
@ -345,18 +345,12 @@ EXPORT_SYMBOL_GPL(cbe_read_trace_buffer);
|
|||
* Enabling/disabling interrupts for the entire performance monitoring unit.
|
||||
*/
|
||||
|
||||
u32 cbe_query_pm_interrupts(u32 cpu)
|
||||
{
|
||||
return cbe_read_pm(cpu, pm_status);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cbe_query_pm_interrupts);
|
||||
|
||||
u32 cbe_clear_pm_interrupts(u32 cpu)
|
||||
u32 cbe_get_and_clear_pm_interrupts(u32 cpu)
|
||||
{
|
||||
/* Reading pm_status clears the interrupt bits. */
|
||||
return cbe_query_pm_interrupts(cpu);
|
||||
return cbe_read_pm(cpu, pm_status);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cbe_clear_pm_interrupts);
|
||||
EXPORT_SYMBOL_GPL(cbe_get_and_clear_pm_interrupts);
|
||||
|
||||
void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask)
|
||||
{
|
||||
|
|
@ -371,7 +365,7 @@ EXPORT_SYMBOL_GPL(cbe_enable_pm_interrupts);
|
|||
|
||||
void cbe_disable_pm_interrupts(u32 cpu)
|
||||
{
|
||||
cbe_clear_pm_interrupts(cpu);
|
||||
cbe_get_and_clear_pm_interrupts(cpu);
|
||||
cbe_write_pm(cpu, pm_status, 0);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cbe_disable_pm_interrupts);
|
||||
|
|
|
|||
|
|
@ -59,63 +59,6 @@ static u64 __init find_spu_unit_number(struct device_node *spe)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __init cell_spuprop_present(struct spu *spu, struct device_node *spe,
|
||||
const char *prop)
|
||||
{
|
||||
const struct address_prop {
|
||||
unsigned long address;
|
||||
unsigned int len;
|
||||
} __attribute__((packed)) *p;
|
||||
int proplen;
|
||||
|
||||
unsigned long start_pfn, nr_pages;
|
||||
struct pglist_data *pgdata;
|
||||
struct zone *zone;
|
||||
int ret;
|
||||
|
||||
p = get_property(spe, prop, &proplen);
|
||||
WARN_ON(proplen != sizeof (*p));
|
||||
|
||||
start_pfn = p->address >> PAGE_SHIFT;
|
||||
nr_pages = ((unsigned long)p->len + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
|
||||
pgdata = NODE_DATA(spu->node);
|
||||
zone = pgdata->node_zones;
|
||||
|
||||
ret = __add_pages(zone, start_pfn, nr_pages);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void __iomem * __init map_spe_prop(struct spu *spu,
|
||||
struct device_node *n, const char *name)
|
||||
{
|
||||
const struct address_prop {
|
||||
unsigned long address;
|
||||
unsigned int len;
|
||||
} __attribute__((packed)) *prop;
|
||||
|
||||
const void *p;
|
||||
int proplen;
|
||||
void __iomem *ret = NULL;
|
||||
int err = 0;
|
||||
|
||||
p = get_property(n, name, &proplen);
|
||||
if (proplen != sizeof (struct address_prop))
|
||||
return NULL;
|
||||
|
||||
prop = p;
|
||||
|
||||
err = cell_spuprop_present(spu, n, name);
|
||||
if (err && (err != -EEXIST))
|
||||
goto out;
|
||||
|
||||
ret = ioremap(prop->address, prop->len);
|
||||
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void spu_unmap(struct spu *spu)
|
||||
{
|
||||
if (!firmware_has_feature(FW_FEATURE_LPAR))
|
||||
|
|
@ -157,6 +100,23 @@ static int __init spu_map_interrupts_old(struct spu *spu,
|
|||
return spu->irqs[2] == NO_IRQ ? -EINVAL : 0;
|
||||
}
|
||||
|
||||
static void __iomem * __init spu_map_prop_old(struct spu *spu,
|
||||
struct device_node *n,
|
||||
const char *name)
|
||||
{
|
||||
const struct address_prop {
|
||||
unsigned long address;
|
||||
unsigned int len;
|
||||
} __attribute__((packed)) *prop;
|
||||
int proplen;
|
||||
|
||||
prop = get_property(n, name, &proplen);
|
||||
if (prop == NULL || proplen != sizeof (struct address_prop))
|
||||
return NULL;
|
||||
|
||||
return ioremap(prop->address, prop->len);
|
||||
}
|
||||
|
||||
static int __init spu_map_device_old(struct spu *spu)
|
||||
{
|
||||
struct device_node *node = spu->devnode;
|
||||
|
|
@ -175,7 +135,7 @@ static int __init spu_map_device_old(struct spu *spu)
|
|||
|
||||
/* we use local store as ram, not io memory */
|
||||
spu->local_store = (void __force *)
|
||||
map_spe_prop(spu, node, "local-store");
|
||||
spu_map_prop_old(spu, node, "local-store");
|
||||
if (!spu->local_store)
|
||||
goto out;
|
||||
|
||||
|
|
@ -184,16 +144,16 @@ static int __init spu_map_device_old(struct spu *spu)
|
|||
goto out_unmap;
|
||||
spu->problem_phys = *(unsigned long *)prop;
|
||||
|
||||
spu->problem = map_spe_prop(spu, node, "problem");
|
||||
spu->problem = spu_map_prop_old(spu, node, "problem");
|
||||
if (!spu->problem)
|
||||
goto out_unmap;
|
||||
|
||||
spu->priv2 = map_spe_prop(spu, node, "priv2");
|
||||
spu->priv2 = spu_map_prop_old(spu, node, "priv2");
|
||||
if (!spu->priv2)
|
||||
goto out_unmap;
|
||||
|
||||
if (!firmware_has_feature(FW_FEATURE_LPAR)) {
|
||||
spu->priv1 = map_spe_prop(spu, node, "priv1");
|
||||
spu->priv1 = spu_map_prop_old(spu, node, "priv1");
|
||||
if (!spu->priv1)
|
||||
goto out_unmap;
|
||||
}
|
||||
|
|
@ -245,34 +205,20 @@ static int spu_map_resource(struct spu *spu, int nr,
|
|||
void __iomem** virt, unsigned long *phys)
|
||||
{
|
||||
struct device_node *np = spu->devnode;
|
||||
unsigned long start_pfn, nr_pages;
|
||||
struct pglist_data *pgdata;
|
||||
struct zone *zone;
|
||||
struct resource resource = { };
|
||||
unsigned long len;
|
||||
int ret;
|
||||
|
||||
ret = of_address_to_resource(np, nr, &resource);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
return ret;
|
||||
if (phys)
|
||||
*phys = resource.start;
|
||||
len = resource.end - resource.start + 1;
|
||||
*virt = ioremap(resource.start, len);
|
||||
if (!*virt)
|
||||
ret = -EINVAL;
|
||||
|
||||
start_pfn = resource.start >> PAGE_SHIFT;
|
||||
nr_pages = (len + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
|
||||
pgdata = NODE_DATA(spu->node);
|
||||
zone = pgdata->node_zones;
|
||||
|
||||
ret = __add_pages(zone, start_pfn, nr_pages);
|
||||
|
||||
out:
|
||||
return ret;
|
||||
return -EINVAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init spu_map_device(struct spu *spu)
|
||||
|
|
|
|||
|
|
@ -42,7 +42,7 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
|
|||
}
|
||||
spin_lock_init(&ctx->mmio_lock);
|
||||
kref_init(&ctx->kref);
|
||||
init_rwsem(&ctx->state_sema);
|
||||
mutex_init(&ctx->state_mutex);
|
||||
init_MUTEX(&ctx->run_sema);
|
||||
init_waitqueue_head(&ctx->ibox_wq);
|
||||
init_waitqueue_head(&ctx->wbox_wq);
|
||||
|
|
@ -53,6 +53,10 @@ struct spu_context *alloc_spu_context(struct spu_gang *gang)
|
|||
ctx->owner = get_task_mm(current);
|
||||
if (gang)
|
||||
spu_gang_add_ctx(gang, ctx);
|
||||
ctx->rt_priority = current->rt_priority;
|
||||
ctx->policy = current->policy;
|
||||
ctx->prio = current->prio;
|
||||
INIT_DELAYED_WORK(&ctx->sched_work, spu_sched_tick);
|
||||
goto out;
|
||||
out_free:
|
||||
kfree(ctx);
|
||||
|
|
@ -65,9 +69,9 @@ void destroy_spu_context(struct kref *kref)
|
|||
{
|
||||
struct spu_context *ctx;
|
||||
ctx = container_of(kref, struct spu_context, kref);
|
||||
down_write(&ctx->state_sema);
|
||||
mutex_lock(&ctx->state_mutex);
|
||||
spu_deactivate(ctx);
|
||||
up_write(&ctx->state_sema);
|
||||
mutex_unlock(&ctx->state_mutex);
|
||||
spu_fini_csa(&ctx->csa);
|
||||
if (ctx->gang)
|
||||
spu_gang_remove_ctx(ctx->gang, ctx);
|
||||
|
|
@ -96,107 +100,102 @@ void spu_forget(struct spu_context *ctx)
|
|||
spu_release(ctx);
|
||||
}
|
||||
|
||||
void spu_acquire(struct spu_context *ctx)
|
||||
{
|
||||
down_read(&ctx->state_sema);
|
||||
}
|
||||
|
||||
void spu_release(struct spu_context *ctx)
|
||||
{
|
||||
up_read(&ctx->state_sema);
|
||||
}
|
||||
|
||||
void spu_unmap_mappings(struct spu_context *ctx)
|
||||
{
|
||||
if (ctx->local_store)
|
||||
unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1);
|
||||
if (ctx->mfc)
|
||||
unmap_mapping_range(ctx->mfc, 0, 0x4000, 1);
|
||||
unmap_mapping_range(ctx->mfc, 0, 0x1000, 1);
|
||||
if (ctx->cntl)
|
||||
unmap_mapping_range(ctx->cntl, 0, 0x4000, 1);
|
||||
unmap_mapping_range(ctx->cntl, 0, 0x1000, 1);
|
||||
if (ctx->signal1)
|
||||
unmap_mapping_range(ctx->signal1, 0, 0x4000, 1);
|
||||
unmap_mapping_range(ctx->signal1, 0, PAGE_SIZE, 1);
|
||||
if (ctx->signal2)
|
||||
unmap_mapping_range(ctx->signal2, 0, 0x4000, 1);
|
||||
unmap_mapping_range(ctx->signal2, 0, PAGE_SIZE, 1);
|
||||
if (ctx->mss)
|
||||
unmap_mapping_range(ctx->mss, 0, 0x1000, 1);
|
||||
if (ctx->psmap)
|
||||
unmap_mapping_range(ctx->psmap, 0, 0x20000, 1);
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_acquire_exclusive - lock spu contex and protect against userspace access
|
||||
* @ctx: spu contex to lock
|
||||
*
|
||||
* Note:
|
||||
* Returns 0 and with the context locked on success
|
||||
* Returns negative error and with the context _unlocked_ on failure.
|
||||
*/
|
||||
int spu_acquire_exclusive(struct spu_context *ctx)
|
||||
{
|
||||
int ret = 0;
|
||||
int ret = -EINVAL;
|
||||
|
||||
down_write(&ctx->state_sema);
|
||||
/* ctx is about to be freed, can't acquire any more */
|
||||
if (!ctx->owner) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
spu_acquire(ctx);
|
||||
/*
|
||||
* Context is about to be freed, so we can't acquire it anymore.
|
||||
*/
|
||||
if (!ctx->owner)
|
||||
goto out_unlock;
|
||||
|
||||
if (ctx->state == SPU_STATE_SAVED) {
|
||||
ret = spu_activate(ctx, 0);
|
||||
if (ret)
|
||||
goto out;
|
||||
ctx->state = SPU_STATE_RUNNABLE;
|
||||
goto out_unlock;
|
||||
} else {
|
||||
/* We need to exclude userspace access to the context. */
|
||||
/*
|
||||
* We need to exclude userspace access to the context.
|
||||
*
|
||||
* To protect against memory access we invalidate all ptes
|
||||
* and make sure the pagefault handlers block on the mutex.
|
||||
*/
|
||||
spu_unmap_mappings(ctx);
|
||||
}
|
||||
|
||||
out:
|
||||
if (ret)
|
||||
up_write(&ctx->state_sema);
|
||||
return 0;
|
||||
|
||||
out_unlock:
|
||||
spu_release(ctx);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int spu_acquire_runnable(struct spu_context *ctx)
|
||||
/**
|
||||
* spu_acquire_runnable - lock spu contex and make sure it is in runnable state
|
||||
* @ctx: spu contex to lock
|
||||
*
|
||||
* Note:
|
||||
* Returns 0 and with the context locked on success
|
||||
* Returns negative error and with the context _unlocked_ on failure.
|
||||
*/
|
||||
int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags)
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
down_read(&ctx->state_sema);
|
||||
if (ctx->state == SPU_STATE_RUNNABLE) {
|
||||
ctx->spu->prio = current->prio;
|
||||
return 0;
|
||||
}
|
||||
up_read(&ctx->state_sema);
|
||||
|
||||
down_write(&ctx->state_sema);
|
||||
/* ctx is about to be freed, can't acquire any more */
|
||||
if (!ctx->owner) {
|
||||
ret = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
int ret = -EINVAL;
|
||||
|
||||
spu_acquire(ctx);
|
||||
if (ctx->state == SPU_STATE_SAVED) {
|
||||
ret = spu_activate(ctx, 0);
|
||||
/*
|
||||
* Context is about to be freed, so we can't acquire it anymore.
|
||||
*/
|
||||
if (!ctx->owner)
|
||||
goto out_unlock;
|
||||
ret = spu_activate(ctx, flags);
|
||||
if (ret)
|
||||
goto out;
|
||||
ctx->state = SPU_STATE_RUNNABLE;
|
||||
goto out_unlock;
|
||||
}
|
||||
|
||||
downgrade_write(&ctx->state_sema);
|
||||
/* On success, we return holding the lock */
|
||||
|
||||
return ret;
|
||||
out:
|
||||
/* Release here, to simplify calling code. */
|
||||
up_write(&ctx->state_sema);
|
||||
return 0;
|
||||
|
||||
out_unlock:
|
||||
spu_release(ctx);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_acquire_saved - lock spu contex and make sure it is in saved state
|
||||
* @ctx: spu contex to lock
|
||||
*/
|
||||
void spu_acquire_saved(struct spu_context *ctx)
|
||||
{
|
||||
down_read(&ctx->state_sema);
|
||||
|
||||
if (ctx->state == SPU_STATE_SAVED)
|
||||
return;
|
||||
|
||||
up_read(&ctx->state_sema);
|
||||
down_write(&ctx->state_sema);
|
||||
|
||||
if (ctx->state == SPU_STATE_RUNNABLE) {
|
||||
spu_acquire(ctx);
|
||||
if (ctx->state != SPU_STATE_SAVED)
|
||||
spu_deactivate(ctx);
|
||||
ctx->state = SPU_STATE_SAVED;
|
||||
}
|
||||
|
||||
downgrade_write(&ctx->state_sema);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -45,8 +45,8 @@ spufs_mem_open(struct inode *inode, struct file *file)
|
|||
struct spufs_inode_info *i = SPUFS_I(inode);
|
||||
struct spu_context *ctx = i->i_ctx;
|
||||
file->private_data = ctx;
|
||||
file->f_mapping = inode->i_mapping;
|
||||
ctx->local_store = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -95,39 +95,38 @@ spufs_mem_write(struct file *file, const char __user *buffer,
|
|||
return ret;
|
||||
}
|
||||
|
||||
static struct page *
|
||||
spufs_mem_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
struct page *page = NOPAGE_SIGBUS;
|
||||
|
||||
struct spu_context *ctx = vma->vm_file->private_data;
|
||||
unsigned long offset = address - vma->vm_start;
|
||||
unsigned long pfn, offset = address - vma->vm_start;
|
||||
|
||||
offset += vma->vm_pgoff << PAGE_SHIFT;
|
||||
|
||||
if (offset >= LS_SIZE)
|
||||
return NOPFN_SIGBUS;
|
||||
|
||||
spu_acquire(ctx);
|
||||
|
||||
if (ctx->state == SPU_STATE_SAVED) {
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
& ~_PAGE_NO_CACHE);
|
||||
page = vmalloc_to_page(ctx->csa.lscsa->ls + offset);
|
||||
pfn = vmalloc_to_pfn(ctx->csa.lscsa->ls + offset);
|
||||
} else {
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE);
|
||||
page = pfn_to_page((ctx->spu->local_store_phys + offset)
|
||||
>> PAGE_SHIFT);
|
||||
| _PAGE_NO_CACHE);
|
||||
pfn = (ctx->spu->local_store_phys + offset) >> PAGE_SHIFT;
|
||||
}
|
||||
vm_insert_pfn(vma, address, pfn);
|
||||
|
||||
spu_release(ctx);
|
||||
|
||||
if (type)
|
||||
*type = VM_FAULT_MINOR;
|
||||
|
||||
page_cache_get(page);
|
||||
return page;
|
||||
return NOPFN_REFAULT;
|
||||
}
|
||||
|
||||
|
||||
static struct vm_operations_struct spufs_mem_mmap_vmops = {
|
||||
.nopage = spufs_mem_mmap_nopage,
|
||||
.nopfn = spufs_mem_mmap_nopfn,
|
||||
};
|
||||
|
||||
static int
|
||||
|
|
@ -136,7 +135,7 @@ spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE);
|
||||
|
||||
|
|
@ -152,49 +151,42 @@ static const struct file_operations spufs_mem_fops = {
|
|||
.mmap = spufs_mem_mmap,
|
||||
};
|
||||
|
||||
static struct page *spufs_ps_nopage(struct vm_area_struct *vma,
|
||||
static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address,
|
||||
int *type, unsigned long ps_offs,
|
||||
unsigned long ps_offs,
|
||||
unsigned long ps_size)
|
||||
{
|
||||
struct page *page = NOPAGE_SIGBUS;
|
||||
int fault_type = VM_FAULT_SIGBUS;
|
||||
struct spu_context *ctx = vma->vm_file->private_data;
|
||||
unsigned long offset = address - vma->vm_start;
|
||||
unsigned long area;
|
||||
unsigned long area, offset = address - vma->vm_start;
|
||||
int ret;
|
||||
|
||||
offset += vma->vm_pgoff << PAGE_SHIFT;
|
||||
if (offset >= ps_size)
|
||||
goto out;
|
||||
return NOPFN_SIGBUS;
|
||||
|
||||
ret = spu_acquire_runnable(ctx);
|
||||
/* error here usually means a signal.. we might want to test
|
||||
* the error code more precisely though
|
||||
*/
|
||||
ret = spu_acquire_runnable(ctx, 0);
|
||||
if (ret)
|
||||
goto out;
|
||||
return NOPFN_REFAULT;
|
||||
|
||||
area = ctx->spu->problem_phys + ps_offs;
|
||||
page = pfn_to_page((area + offset) >> PAGE_SHIFT);
|
||||
fault_type = VM_FAULT_MINOR;
|
||||
page_cache_get(page);
|
||||
|
||||
vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT);
|
||||
spu_release(ctx);
|
||||
|
||||
out:
|
||||
if (type)
|
||||
*type = fault_type;
|
||||
|
||||
return page;
|
||||
return NOPFN_REFAULT;
|
||||
}
|
||||
|
||||
#if SPUFS_MMAP_4K
|
||||
static struct page *spufs_cntl_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_cntl_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
return spufs_ps_nopage(vma, address, type, 0x4000, 0x1000);
|
||||
return spufs_ps_nopfn(vma, address, 0x4000, 0x1000);
|
||||
}
|
||||
|
||||
static struct vm_operations_struct spufs_cntl_mmap_vmops = {
|
||||
.nopage = spufs_cntl_mmap_nopage,
|
||||
.nopfn = spufs_cntl_mmap_nopfn,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -205,7 +197,7 @@ static int spufs_cntl_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE | _PAGE_GUARDED);
|
||||
|
||||
|
|
@ -243,8 +235,8 @@ static int spufs_cntl_open(struct inode *inode, struct file *file)
|
|||
struct spu_context *ctx = i->i_ctx;
|
||||
|
||||
file->private_data = ctx;
|
||||
file->f_mapping = inode->i_mapping;
|
||||
ctx->cntl = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return simple_attr_open(inode, file, spufs_cntl_get,
|
||||
spufs_cntl_set, "0x%08lx");
|
||||
}
|
||||
|
|
@ -728,8 +720,8 @@ static int spufs_signal1_open(struct inode *inode, struct file *file)
|
|||
struct spufs_inode_info *i = SPUFS_I(inode);
|
||||
struct spu_context *ctx = i->i_ctx;
|
||||
file->private_data = ctx;
|
||||
file->f_mapping = inode->i_mapping;
|
||||
ctx->signal1 = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return nonseekable_open(inode, file);
|
||||
}
|
||||
|
||||
|
|
@ -791,23 +783,23 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf,
|
|||
return 4;
|
||||
}
|
||||
|
||||
static struct page *spufs_signal1_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_signal1_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
#if PAGE_SIZE == 0x1000
|
||||
return spufs_ps_nopage(vma, address, type, 0x14000, 0x1000);
|
||||
return spufs_ps_nopfn(vma, address, 0x14000, 0x1000);
|
||||
#elif PAGE_SIZE == 0x10000
|
||||
/* For 64k pages, both signal1 and signal2 can be used to mmap the whole
|
||||
* signal 1 and 2 area
|
||||
*/
|
||||
return spufs_ps_nopage(vma, address, type, 0x10000, 0x10000);
|
||||
return spufs_ps_nopfn(vma, address, 0x10000, 0x10000);
|
||||
#else
|
||||
#error unsupported page size
|
||||
#endif
|
||||
}
|
||||
|
||||
static struct vm_operations_struct spufs_signal1_mmap_vmops = {
|
||||
.nopage = spufs_signal1_mmap_nopage,
|
||||
.nopfn = spufs_signal1_mmap_nopfn,
|
||||
};
|
||||
|
||||
static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
|
||||
|
|
@ -815,7 +807,7 @@ static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE | _PAGE_GUARDED);
|
||||
|
||||
|
|
@ -835,8 +827,8 @@ static int spufs_signal2_open(struct inode *inode, struct file *file)
|
|||
struct spufs_inode_info *i = SPUFS_I(inode);
|
||||
struct spu_context *ctx = i->i_ctx;
|
||||
file->private_data = ctx;
|
||||
file->f_mapping = inode->i_mapping;
|
||||
ctx->signal2 = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return nonseekable_open(inode, file);
|
||||
}
|
||||
|
||||
|
|
@ -899,23 +891,23 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf,
|
|||
}
|
||||
|
||||
#if SPUFS_MMAP_4K
|
||||
static struct page *spufs_signal2_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_signal2_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
#if PAGE_SIZE == 0x1000
|
||||
return spufs_ps_nopage(vma, address, type, 0x1c000, 0x1000);
|
||||
return spufs_ps_nopfn(vma, address, 0x1c000, 0x1000);
|
||||
#elif PAGE_SIZE == 0x10000
|
||||
/* For 64k pages, both signal1 and signal2 can be used to mmap the whole
|
||||
* signal 1 and 2 area
|
||||
*/
|
||||
return spufs_ps_nopage(vma, address, type, 0x10000, 0x10000);
|
||||
return spufs_ps_nopfn(vma, address, 0x10000, 0x10000);
|
||||
#else
|
||||
#error unsupported page size
|
||||
#endif
|
||||
}
|
||||
|
||||
static struct vm_operations_struct spufs_signal2_mmap_vmops = {
|
||||
.nopage = spufs_signal2_mmap_nopage,
|
||||
.nopfn = spufs_signal2_mmap_nopfn,
|
||||
};
|
||||
|
||||
static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
|
||||
|
|
@ -923,7 +915,7 @@ static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE | _PAGE_GUARDED);
|
||||
|
||||
|
|
@ -1000,14 +992,14 @@ DEFINE_SIMPLE_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get,
|
|||
spufs_signal2_type_set, "%llu");
|
||||
|
||||
#if SPUFS_MMAP_4K
|
||||
static struct page *spufs_mss_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
return spufs_ps_nopage(vma, address, type, 0x0000, 0x1000);
|
||||
return spufs_ps_nopfn(vma, address, 0x0000, 0x1000);
|
||||
}
|
||||
|
||||
static struct vm_operations_struct spufs_mss_mmap_vmops = {
|
||||
.nopage = spufs_mss_mmap_nopage,
|
||||
.nopfn = spufs_mss_mmap_nopfn,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -1018,7 +1010,7 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE | _PAGE_GUARDED);
|
||||
|
||||
|
|
@ -1032,8 +1024,11 @@ static int spufs_mss_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
static int spufs_mss_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct spufs_inode_info *i = SPUFS_I(inode);
|
||||
struct spu_context *ctx = i->i_ctx;
|
||||
|
||||
file->private_data = i->i_ctx;
|
||||
ctx->mss = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return nonseekable_open(inode, file);
|
||||
}
|
||||
|
||||
|
|
@ -1042,14 +1037,14 @@ static const struct file_operations spufs_mss_fops = {
|
|||
.mmap = spufs_mss_mmap,
|
||||
};
|
||||
|
||||
static struct page *spufs_psmap_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_psmap_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
return spufs_ps_nopage(vma, address, type, 0x0000, 0x20000);
|
||||
return spufs_ps_nopfn(vma, address, 0x0000, 0x20000);
|
||||
}
|
||||
|
||||
static struct vm_operations_struct spufs_psmap_mmap_vmops = {
|
||||
.nopage = spufs_psmap_mmap_nopage,
|
||||
.nopfn = spufs_psmap_mmap_nopfn,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -1060,7 +1055,7 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE | _PAGE_GUARDED);
|
||||
|
||||
|
|
@ -1071,8 +1066,11 @@ static int spufs_psmap_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
static int spufs_psmap_open(struct inode *inode, struct file *file)
|
||||
{
|
||||
struct spufs_inode_info *i = SPUFS_I(inode);
|
||||
struct spu_context *ctx = i->i_ctx;
|
||||
|
||||
file->private_data = i->i_ctx;
|
||||
ctx->psmap = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return nonseekable_open(inode, file);
|
||||
}
|
||||
|
||||
|
|
@ -1083,14 +1081,14 @@ static const struct file_operations spufs_psmap_fops = {
|
|||
|
||||
|
||||
#if SPUFS_MMAP_4K
|
||||
static struct page *spufs_mfc_mmap_nopage(struct vm_area_struct *vma,
|
||||
unsigned long address, int *type)
|
||||
static unsigned long spufs_mfc_mmap_nopfn(struct vm_area_struct *vma,
|
||||
unsigned long address)
|
||||
{
|
||||
return spufs_ps_nopage(vma, address, type, 0x3000, 0x1000);
|
||||
return spufs_ps_nopfn(vma, address, 0x3000, 0x1000);
|
||||
}
|
||||
|
||||
static struct vm_operations_struct spufs_mfc_mmap_vmops = {
|
||||
.nopage = spufs_mfc_mmap_nopage,
|
||||
.nopfn = spufs_mfc_mmap_nopfn,
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -1101,7 +1099,7 @@ static int spufs_mfc_mmap(struct file *file, struct vm_area_struct *vma)
|
|||
if (!(vma->vm_flags & VM_SHARED))
|
||||
return -EINVAL;
|
||||
|
||||
vma->vm_flags |= VM_IO;
|
||||
vma->vm_flags |= VM_IO | VM_PFNMAP;
|
||||
vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
|
||||
| _PAGE_NO_CACHE | _PAGE_GUARDED);
|
||||
|
||||
|
|
@ -1125,6 +1123,8 @@ static int spufs_mfc_open(struct inode *inode, struct file *file)
|
|||
return -EBUSY;
|
||||
|
||||
file->private_data = ctx;
|
||||
ctx->mfc = inode->i_mapping;
|
||||
smp_wmb();
|
||||
return nonseekable_open(inode, file);
|
||||
}
|
||||
|
||||
|
|
@ -1309,7 +1309,7 @@ static ssize_t spufs_mfc_write(struct file *file, const char __user *buffer,
|
|||
if (ret)
|
||||
goto out;
|
||||
|
||||
spu_acquire_runnable(ctx);
|
||||
spu_acquire_runnable(ctx, 0);
|
||||
if (file->f_flags & O_NONBLOCK) {
|
||||
ret = ctx->ops->send_mfc_command(ctx, &cmd);
|
||||
} else {
|
||||
|
|
|
|||
|
|
@ -133,7 +133,7 @@ out_drop_priv:
|
|||
spu_mfc_sr1_set(ctx->spu, sr1);
|
||||
|
||||
out_unlock:
|
||||
spu_release_exclusive(ctx);
|
||||
spu_release(ctx);
|
||||
out:
|
||||
return ret;
|
||||
}
|
||||
|
|
@ -143,7 +143,7 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc)
|
|||
int ret;
|
||||
unsigned long runcntl = SPU_RUNCNTL_RUNNABLE;
|
||||
|
||||
ret = spu_acquire_runnable(ctx);
|
||||
ret = spu_acquire_runnable(ctx, SPU_ACTIVATE_NOWAKE);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
|
|
@ -155,7 +155,7 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc)
|
|||
spu_release(ctx);
|
||||
ret = spu_setup_isolated(ctx);
|
||||
if (!ret)
|
||||
ret = spu_acquire_runnable(ctx);
|
||||
ret = spu_acquire_runnable(ctx, SPU_ACTIVATE_NOWAKE);
|
||||
}
|
||||
|
||||
/* if userspace has set the runcntrl register (eg, to issue an
|
||||
|
|
@ -164,8 +164,10 @@ static inline int spu_run_init(struct spu_context *ctx, u32 * npc)
|
|||
(SPU_RUNCNTL_RUNNABLE | SPU_RUNCNTL_ISOLATE);
|
||||
if (runcntl == 0)
|
||||
runcntl = SPU_RUNCNTL_RUNNABLE;
|
||||
} else
|
||||
} else {
|
||||
spu_start_tick(ctx);
|
||||
ctx->ops->npc_write(ctx, *npc);
|
||||
}
|
||||
|
||||
ctx->ops->runcntl_write(ctx, runcntl);
|
||||
return ret;
|
||||
|
|
@ -176,6 +178,7 @@ static inline int spu_run_fini(struct spu_context *ctx, u32 * npc,
|
|||
{
|
||||
int ret = 0;
|
||||
|
||||
spu_stop_tick(ctx);
|
||||
*status = ctx->ops->status_read(ctx);
|
||||
*npc = ctx->ops->npc_read(ctx);
|
||||
spu_release(ctx);
|
||||
|
|
@ -329,8 +332,10 @@ long spufs_run_spu(struct file *file, struct spu_context *ctx,
|
|||
}
|
||||
if (unlikely(ctx->state != SPU_STATE_RUNNABLE)) {
|
||||
ret = spu_reacquire_runnable(ctx, npc, &status);
|
||||
if (ret)
|
||||
if (ret) {
|
||||
spu_stop_tick(ctx);
|
||||
goto out2;
|
||||
}
|
||||
continue;
|
||||
}
|
||||
ret = spu_process_events(ctx);
|
||||
|
|
@ -361,4 +366,3 @@ out:
|
|||
up(&ctx->run_sema);
|
||||
return ret;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -44,17 +44,18 @@
|
|||
#include <asm/spu_priv1.h>
|
||||
#include "spufs.h"
|
||||
|
||||
#define SPU_MIN_TIMESLICE (100 * HZ / 1000)
|
||||
#define SPU_TIMESLICE (HZ)
|
||||
|
||||
#define SPU_BITMAP_SIZE (((MAX_PRIO+BITS_PER_LONG)/BITS_PER_LONG)+1)
|
||||
struct spu_prio_array {
|
||||
unsigned long bitmap[SPU_BITMAP_SIZE];
|
||||
wait_queue_head_t waitq[MAX_PRIO];
|
||||
DECLARE_BITMAP(bitmap, MAX_PRIO);
|
||||
struct list_head runq[MAX_PRIO];
|
||||
spinlock_t runq_lock;
|
||||
struct list_head active_list[MAX_NUMNODES];
|
||||
struct mutex active_mutex[MAX_NUMNODES];
|
||||
};
|
||||
|
||||
static struct spu_prio_array *spu_prio;
|
||||
static struct workqueue_struct *spu_sched_wq;
|
||||
|
||||
static inline int node_allowed(int node)
|
||||
{
|
||||
|
|
@ -68,6 +69,64 @@ static inline int node_allowed(int node)
|
|||
return 1;
|
||||
}
|
||||
|
||||
void spu_start_tick(struct spu_context *ctx)
|
||||
{
|
||||
if (ctx->policy == SCHED_RR)
|
||||
queue_delayed_work(spu_sched_wq, &ctx->sched_work, SPU_TIMESLICE);
|
||||
}
|
||||
|
||||
void spu_stop_tick(struct spu_context *ctx)
|
||||
{
|
||||
if (ctx->policy == SCHED_RR)
|
||||
cancel_delayed_work(&ctx->sched_work);
|
||||
}
|
||||
|
||||
void spu_sched_tick(struct work_struct *work)
|
||||
{
|
||||
struct spu_context *ctx =
|
||||
container_of(work, struct spu_context, sched_work.work);
|
||||
struct spu *spu;
|
||||
int rearm = 1;
|
||||
|
||||
mutex_lock(&ctx->state_mutex);
|
||||
spu = ctx->spu;
|
||||
if (spu) {
|
||||
int best = sched_find_first_bit(spu_prio->bitmap);
|
||||
if (best <= ctx->prio) {
|
||||
spu_deactivate(ctx);
|
||||
rearm = 0;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&ctx->state_mutex);
|
||||
|
||||
if (rearm)
|
||||
spu_start_tick(ctx);
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_add_to_active_list - add spu to active list
|
||||
* @spu: spu to add to the active list
|
||||
*/
|
||||
static void spu_add_to_active_list(struct spu *spu)
|
||||
{
|
||||
mutex_lock(&spu_prio->active_mutex[spu->node]);
|
||||
list_add_tail(&spu->list, &spu_prio->active_list[spu->node]);
|
||||
mutex_unlock(&spu_prio->active_mutex[spu->node]);
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_remove_from_active_list - remove spu from active list
|
||||
* @spu: spu to remove from the active list
|
||||
*/
|
||||
static void spu_remove_from_active_list(struct spu *spu)
|
||||
{
|
||||
int node = spu->node;
|
||||
|
||||
mutex_lock(&spu_prio->active_mutex[node]);
|
||||
list_del_init(&spu->list);
|
||||
mutex_unlock(&spu_prio->active_mutex[node]);
|
||||
}
|
||||
|
||||
static inline void mm_needs_global_tlbie(struct mm_struct *mm)
|
||||
{
|
||||
int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
|
||||
|
|
@ -94,8 +153,12 @@ int spu_switch_event_unregister(struct notifier_block * n)
|
|||
return blocking_notifier_chain_unregister(&spu_switch_notifier, n);
|
||||
}
|
||||
|
||||
|
||||
static inline void bind_context(struct spu *spu, struct spu_context *ctx)
|
||||
/**
|
||||
* spu_bind_context - bind spu context to physical spu
|
||||
* @spu: physical spu to bind to
|
||||
* @ctx: context to bind
|
||||
*/
|
||||
static void spu_bind_context(struct spu *spu, struct spu_context *ctx)
|
||||
{
|
||||
pr_debug("%s: pid=%d SPU=%d NODE=%d\n", __FUNCTION__, current->pid,
|
||||
spu->number, spu->node);
|
||||
|
|
@ -104,7 +167,6 @@ static inline void bind_context(struct spu *spu, struct spu_context *ctx)
|
|||
ctx->spu = spu;
|
||||
ctx->ops = &spu_hw_ops;
|
||||
spu->pid = current->pid;
|
||||
spu->prio = current->prio;
|
||||
spu->mm = ctx->owner;
|
||||
mm_needs_global_tlbie(spu->mm);
|
||||
spu->ibox_callback = spufs_ibox_callback;
|
||||
|
|
@ -118,12 +180,21 @@ static inline void bind_context(struct spu *spu, struct spu_context *ctx)
|
|||
spu->timestamp = jiffies;
|
||||
spu_cpu_affinity_set(spu, raw_smp_processor_id());
|
||||
spu_switch_notify(spu, ctx);
|
||||
spu_add_to_active_list(spu);
|
||||
ctx->state = SPU_STATE_RUNNABLE;
|
||||
}
|
||||
|
||||
static inline void unbind_context(struct spu *spu, struct spu_context *ctx)
|
||||
/**
|
||||
* spu_unbind_context - unbind spu context from physical spu
|
||||
* @spu: physical spu to unbind from
|
||||
* @ctx: context to unbind
|
||||
*/
|
||||
static void spu_unbind_context(struct spu *spu, struct spu_context *ctx)
|
||||
{
|
||||
pr_debug("%s: unbind pid=%d SPU=%d NODE=%d\n", __FUNCTION__,
|
||||
spu->pid, spu->number, spu->node);
|
||||
|
||||
spu_remove_from_active_list(spu);
|
||||
spu_switch_notify(spu, NULL);
|
||||
spu_unmap_mappings(ctx);
|
||||
spu_save(&ctx->csa, spu);
|
||||
|
|
@ -136,95 +207,98 @@ static inline void unbind_context(struct spu *spu, struct spu_context *ctx)
|
|||
spu->dma_callback = NULL;
|
||||
spu->mm = NULL;
|
||||
spu->pid = 0;
|
||||
spu->prio = MAX_PRIO;
|
||||
ctx->ops = &spu_backing_ops;
|
||||
ctx->spu = NULL;
|
||||
spu->flags = 0;
|
||||
spu->ctx = NULL;
|
||||
}
|
||||
|
||||
static inline void spu_add_wq(wait_queue_head_t * wq, wait_queue_t * wait,
|
||||
int prio)
|
||||
/**
|
||||
* spu_add_to_rq - add a context to the runqueue
|
||||
* @ctx: context to add
|
||||
*/
|
||||
static void spu_add_to_rq(struct spu_context *ctx)
|
||||
{
|
||||
prepare_to_wait_exclusive(wq, wait, TASK_INTERRUPTIBLE);
|
||||
set_bit(prio, spu_prio->bitmap);
|
||||
spin_lock(&spu_prio->runq_lock);
|
||||
list_add_tail(&ctx->rq, &spu_prio->runq[ctx->prio]);
|
||||
set_bit(ctx->prio, spu_prio->bitmap);
|
||||
spin_unlock(&spu_prio->runq_lock);
|
||||
}
|
||||
|
||||
static inline void spu_del_wq(wait_queue_head_t * wq, wait_queue_t * wait,
|
||||
int prio)
|
||||
/**
|
||||
* spu_del_from_rq - remove a context from the runqueue
|
||||
* @ctx: context to remove
|
||||
*/
|
||||
static void spu_del_from_rq(struct spu_context *ctx)
|
||||
{
|
||||
u64 flags;
|
||||
|
||||
__set_current_state(TASK_RUNNING);
|
||||
|
||||
spin_lock_irqsave(&wq->lock, flags);
|
||||
|
||||
remove_wait_queue_locked(wq, wait);
|
||||
if (list_empty(&wq->task_list))
|
||||
clear_bit(prio, spu_prio->bitmap);
|
||||
|
||||
spin_unlock_irqrestore(&wq->lock, flags);
|
||||
spin_lock(&spu_prio->runq_lock);
|
||||
list_del_init(&ctx->rq);
|
||||
if (list_empty(&spu_prio->runq[ctx->prio]))
|
||||
clear_bit(ctx->prio, spu_prio->bitmap);
|
||||
spin_unlock(&spu_prio->runq_lock);
|
||||
}
|
||||
|
||||
static void spu_prio_wait(struct spu_context *ctx, u64 flags)
|
||||
/**
|
||||
* spu_grab_context - remove one context from the runqueue
|
||||
* @prio: priority of the context to be removed
|
||||
*
|
||||
* This function removes one context from the runqueue for priority @prio.
|
||||
* If there is more than one context with the given priority the first
|
||||
* task on the runqueue will be taken.
|
||||
*
|
||||
* Returns the spu_context it just removed.
|
||||
*
|
||||
* Must be called with spu_prio->runq_lock held.
|
||||
*/
|
||||
static struct spu_context *spu_grab_context(int prio)
|
||||
{
|
||||
struct list_head *rq = &spu_prio->runq[prio];
|
||||
|
||||
if (list_empty(rq))
|
||||
return NULL;
|
||||
return list_entry(rq->next, struct spu_context, rq);
|
||||
}
|
||||
|
||||
static void spu_prio_wait(struct spu_context *ctx)
|
||||
{
|
||||
int prio = current->prio;
|
||||
wait_queue_head_t *wq = &spu_prio->waitq[prio];
|
||||
DEFINE_WAIT(wait);
|
||||
|
||||
if (ctx->spu)
|
||||
return;
|
||||
|
||||
spu_add_wq(wq, &wait, prio);
|
||||
|
||||
set_bit(SPU_SCHED_WAKE, &ctx->sched_flags);
|
||||
prepare_to_wait_exclusive(&ctx->stop_wq, &wait, TASK_INTERRUPTIBLE);
|
||||
if (!signal_pending(current)) {
|
||||
up_write(&ctx->state_sema);
|
||||
pr_debug("%s: pid=%d prio=%d\n", __FUNCTION__,
|
||||
current->pid, current->prio);
|
||||
mutex_unlock(&ctx->state_mutex);
|
||||
schedule();
|
||||
down_write(&ctx->state_sema);
|
||||
mutex_lock(&ctx->state_mutex);
|
||||
}
|
||||
|
||||
spu_del_wq(wq, &wait, prio);
|
||||
__set_current_state(TASK_RUNNING);
|
||||
remove_wait_queue(&ctx->stop_wq, &wait);
|
||||
clear_bit(SPU_SCHED_WAKE, &ctx->sched_flags);
|
||||
}
|
||||
|
||||
static void spu_prio_wakeup(void)
|
||||
/**
|
||||
* spu_reschedule - try to find a runnable context for a spu
|
||||
* @spu: spu available
|
||||
*
|
||||
* This function is called whenever a spu becomes idle. It looks for the
|
||||
* most suitable runnable spu context and schedules it for execution.
|
||||
*/
|
||||
static void spu_reschedule(struct spu *spu)
|
||||
{
|
||||
int best = sched_find_first_bit(spu_prio->bitmap);
|
||||
int best;
|
||||
|
||||
spu_free(spu);
|
||||
|
||||
spin_lock(&spu_prio->runq_lock);
|
||||
best = sched_find_first_bit(spu_prio->bitmap);
|
||||
if (best < MAX_PRIO) {
|
||||
wait_queue_head_t *wq = &spu_prio->waitq[best];
|
||||
wake_up_interruptible_nr(wq, 1);
|
||||
struct spu_context *ctx = spu_grab_context(best);
|
||||
if (ctx && test_bit(SPU_SCHED_WAKE, &ctx->sched_flags))
|
||||
wake_up(&ctx->stop_wq);
|
||||
}
|
||||
spin_unlock(&spu_prio->runq_lock);
|
||||
}
|
||||
|
||||
static int get_active_spu(struct spu *spu)
|
||||
{
|
||||
int node = spu->node;
|
||||
struct spu *tmp;
|
||||
int rc = 0;
|
||||
|
||||
mutex_lock(&spu_prio->active_mutex[node]);
|
||||
list_for_each_entry(tmp, &spu_prio->active_list[node], list) {
|
||||
if (tmp == spu) {
|
||||
list_del_init(&spu->list);
|
||||
rc = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
mutex_unlock(&spu_prio->active_mutex[node]);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static void put_active_spu(struct spu *spu)
|
||||
{
|
||||
int node = spu->node;
|
||||
|
||||
mutex_lock(&spu_prio->active_mutex[node]);
|
||||
list_add_tail(&spu->list, &spu_prio->active_list[node]);
|
||||
mutex_unlock(&spu_prio->active_mutex[node]);
|
||||
}
|
||||
|
||||
static struct spu *spu_get_idle(struct spu_context *ctx, u64 flags)
|
||||
static struct spu *spu_get_idle(struct spu_context *ctx)
|
||||
{
|
||||
struct spu *spu = NULL;
|
||||
int node = cpu_to_node(raw_smp_processor_id());
|
||||
|
|
@ -241,87 +315,154 @@ static struct spu *spu_get_idle(struct spu_context *ctx, u64 flags)
|
|||
return spu;
|
||||
}
|
||||
|
||||
static inline struct spu *spu_get(struct spu_context *ctx, u64 flags)
|
||||
{
|
||||
/* Future: spu_get_idle() if possible,
|
||||
* otherwise try to preempt an active
|
||||
* context.
|
||||
*/
|
||||
return spu_get_idle(ctx, flags);
|
||||
}
|
||||
|
||||
/* The three externally callable interfaces
|
||||
* for the scheduler begin here.
|
||||
/**
|
||||
* find_victim - find a lower priority context to preempt
|
||||
* @ctx: canidate context for running
|
||||
*
|
||||
* spu_activate - bind a context to SPU, waiting as needed.
|
||||
* spu_deactivate - unbind a context from its SPU.
|
||||
* spu_yield - yield an SPU if others are waiting.
|
||||
* Returns the freed physical spu to run the new context on.
|
||||
*/
|
||||
|
||||
int spu_activate(struct spu_context *ctx, u64 flags)
|
||||
static struct spu *find_victim(struct spu_context *ctx)
|
||||
{
|
||||
struct spu_context *victim = NULL;
|
||||
struct spu *spu;
|
||||
int ret = 0;
|
||||
int node, n;
|
||||
|
||||
for (;;) {
|
||||
if (ctx->spu)
|
||||
return 0;
|
||||
spu = spu_get(ctx, flags);
|
||||
if (spu != NULL) {
|
||||
if (ctx->spu != NULL) {
|
||||
spu_free(spu);
|
||||
spu_prio_wakeup();
|
||||
break;
|
||||
}
|
||||
bind_context(spu, ctx);
|
||||
put_active_spu(spu);
|
||||
break;
|
||||
/*
|
||||
* Look for a possible preemption candidate on the local node first.
|
||||
* If there is no candidate look at the other nodes. This isn't
|
||||
* exactly fair, but so far the whole spu schedule tries to keep
|
||||
* a strong node affinity. We might want to fine-tune this in
|
||||
* the future.
|
||||
*/
|
||||
restart:
|
||||
node = cpu_to_node(raw_smp_processor_id());
|
||||
for (n = 0; n < MAX_NUMNODES; n++, node++) {
|
||||
node = (node < MAX_NUMNODES) ? node : 0;
|
||||
if (!node_allowed(node))
|
||||
continue;
|
||||
|
||||
mutex_lock(&spu_prio->active_mutex[node]);
|
||||
list_for_each_entry(spu, &spu_prio->active_list[node], list) {
|
||||
struct spu_context *tmp = spu->ctx;
|
||||
|
||||
if (tmp->rt_priority < ctx->rt_priority &&
|
||||
(!victim || tmp->rt_priority < victim->rt_priority))
|
||||
victim = spu->ctx;
|
||||
}
|
||||
spu_prio_wait(ctx, flags);
|
||||
if (signal_pending(current)) {
|
||||
ret = -ERESTARTSYS;
|
||||
spu_prio_wakeup();
|
||||
break;
|
||||
mutex_unlock(&spu_prio->active_mutex[node]);
|
||||
|
||||
if (victim) {
|
||||
/*
|
||||
* This nests ctx->state_mutex, but we always lock
|
||||
* higher priority contexts before lower priority
|
||||
* ones, so this is safe until we introduce
|
||||
* priority inheritance schemes.
|
||||
*/
|
||||
if (!mutex_trylock(&victim->state_mutex)) {
|
||||
victim = NULL;
|
||||
goto restart;
|
||||
}
|
||||
|
||||
spu = victim->spu;
|
||||
if (!spu) {
|
||||
/*
|
||||
* This race can happen because we've dropped
|
||||
* the active list mutex. No a problem, just
|
||||
* restart the search.
|
||||
*/
|
||||
mutex_unlock(&victim->state_mutex);
|
||||
victim = NULL;
|
||||
goto restart;
|
||||
}
|
||||
spu_unbind_context(spu, victim);
|
||||
mutex_unlock(&victim->state_mutex);
|
||||
return spu;
|
||||
}
|
||||
}
|
||||
return ret;
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_activate - find a free spu for a context and execute it
|
||||
* @ctx: spu context to schedule
|
||||
* @flags: flags (currently ignored)
|
||||
*
|
||||
* Tries to find a free spu to run @ctx. If no free spu is availble
|
||||
* add the context to the runqueue so it gets woken up once an spu
|
||||
* is available.
|
||||
*/
|
||||
int spu_activate(struct spu_context *ctx, unsigned long flags)
|
||||
{
|
||||
|
||||
if (ctx->spu)
|
||||
return 0;
|
||||
|
||||
do {
|
||||
struct spu *spu;
|
||||
|
||||
spu = spu_get_idle(ctx);
|
||||
/*
|
||||
* If this is a realtime thread we try to get it running by
|
||||
* preempting a lower priority thread.
|
||||
*/
|
||||
if (!spu && ctx->rt_priority)
|
||||
spu = find_victim(ctx);
|
||||
if (spu) {
|
||||
spu_bind_context(spu, ctx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
spu_add_to_rq(ctx);
|
||||
if (!(flags & SPU_ACTIVATE_NOWAKE))
|
||||
spu_prio_wait(ctx);
|
||||
spu_del_from_rq(ctx);
|
||||
} while (!signal_pending(current));
|
||||
|
||||
return -ERESTARTSYS;
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_deactivate - unbind a context from it's physical spu
|
||||
* @ctx: spu context to unbind
|
||||
*
|
||||
* Unbind @ctx from the physical spu it is running on and schedule
|
||||
* the highest priority context to run on the freed physical spu.
|
||||
*/
|
||||
void spu_deactivate(struct spu_context *ctx)
|
||||
{
|
||||
struct spu *spu;
|
||||
int needs_idle;
|
||||
struct spu *spu = ctx->spu;
|
||||
|
||||
spu = ctx->spu;
|
||||
if (!spu)
|
||||
return;
|
||||
needs_idle = get_active_spu(spu);
|
||||
unbind_context(spu, ctx);
|
||||
if (needs_idle) {
|
||||
spu_free(spu);
|
||||
spu_prio_wakeup();
|
||||
if (spu) {
|
||||
spu_unbind_context(spu, ctx);
|
||||
spu_reschedule(spu);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* spu_yield - yield a physical spu if others are waiting
|
||||
* @ctx: spu context to yield
|
||||
*
|
||||
* Check if there is a higher priority context waiting and if yes
|
||||
* unbind @ctx from the physical spu and schedule the highest
|
||||
* priority context to run on the freed physical spu instead.
|
||||
*/
|
||||
void spu_yield(struct spu_context *ctx)
|
||||
{
|
||||
struct spu *spu;
|
||||
int need_yield = 0;
|
||||
|
||||
if (down_write_trylock(&ctx->state_sema)) {
|
||||
if (mutex_trylock(&ctx->state_mutex)) {
|
||||
if ((spu = ctx->spu) != NULL) {
|
||||
int best = sched_find_first_bit(spu_prio->bitmap);
|
||||
if (best < MAX_PRIO) {
|
||||
pr_debug("%s: yielding SPU %d NODE %d\n",
|
||||
__FUNCTION__, spu->number, spu->node);
|
||||
spu_deactivate(ctx);
|
||||
ctx->state = SPU_STATE_SAVED;
|
||||
need_yield = 1;
|
||||
} else {
|
||||
spu->prio = MAX_PRIO;
|
||||
}
|
||||
}
|
||||
up_write(&ctx->state_sema);
|
||||
mutex_unlock(&ctx->state_mutex);
|
||||
}
|
||||
if (unlikely(need_yield))
|
||||
yield();
|
||||
|
|
@ -331,14 +472,19 @@ int __init spu_sched_init(void)
|
|||
{
|
||||
int i;
|
||||
|
||||
spu_sched_wq = create_singlethread_workqueue("spusched");
|
||||
if (!spu_sched_wq)
|
||||
return 1;
|
||||
|
||||
spu_prio = kzalloc(sizeof(struct spu_prio_array), GFP_KERNEL);
|
||||
if (!spu_prio) {
|
||||
printk(KERN_WARNING "%s: Unable to allocate priority queue.\n",
|
||||
__FUNCTION__);
|
||||
destroy_workqueue(spu_sched_wq);
|
||||
return 1;
|
||||
}
|
||||
for (i = 0; i < MAX_PRIO; i++) {
|
||||
init_waitqueue_head(&spu_prio->waitq[i]);
|
||||
INIT_LIST_HEAD(&spu_prio->runq[i]);
|
||||
__clear_bit(i, spu_prio->bitmap);
|
||||
}
|
||||
__set_bit(MAX_PRIO, spu_prio->bitmap);
|
||||
|
|
@ -346,6 +492,7 @@ int __init spu_sched_init(void)
|
|||
mutex_init(&spu_prio->active_mutex[i]);
|
||||
INIT_LIST_HEAD(&spu_prio->active_list[i]);
|
||||
}
|
||||
spin_lock_init(&spu_prio->runq_lock);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
@ -364,4 +511,5 @@ void __exit spu_sched_exit(void)
|
|||
mutex_unlock(&spu_prio->active_mutex[node]);
|
||||
}
|
||||
kfree(spu_prio);
|
||||
destroy_workqueue(spu_sched_wq);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -23,7 +23,7 @@
|
|||
#define SPUFS_H
|
||||
|
||||
#include <linux/kref.h>
|
||||
#include <linux/rwsem.h>
|
||||
#include <linux/mutex.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/fs.h>
|
||||
|
||||
|
|
@ -37,11 +37,13 @@ enum {
|
|||
};
|
||||
|
||||
struct spu_context_ops;
|
||||
|
||||
#define SPU_CONTEXT_PREEMPT 0UL
|
||||
|
||||
struct spu_gang;
|
||||
|
||||
/* ctx->sched_flags */
|
||||
enum {
|
||||
SPU_SCHED_WAKE = 0,
|
||||
};
|
||||
|
||||
struct spu_context {
|
||||
struct spu *spu; /* pointer to a physical SPU */
|
||||
struct spu_state csa; /* SPU context save area. */
|
||||
|
|
@ -51,10 +53,12 @@ struct spu_context {
|
|||
struct address_space *cntl; /* 'control' area mappings. */
|
||||
struct address_space *signal1; /* 'signal1' area mappings. */
|
||||
struct address_space *signal2; /* 'signal2' area mappings. */
|
||||
struct address_space *mss; /* 'mss' area mappings. */
|
||||
struct address_space *psmap; /* 'psmap' area mappings. */
|
||||
u64 object_id; /* user space pointer for oprofile */
|
||||
|
||||
enum { SPU_STATE_RUNNABLE, SPU_STATE_SAVED } state;
|
||||
struct rw_semaphore state_sema;
|
||||
struct mutex state_mutex;
|
||||
struct semaphore run_sema;
|
||||
|
||||
struct mm_struct *owner;
|
||||
|
|
@ -75,6 +79,14 @@ struct spu_context {
|
|||
|
||||
struct list_head gang_list;
|
||||
struct spu_gang *gang;
|
||||
|
||||
/* scheduler fields */
|
||||
struct list_head rq;
|
||||
struct delayed_work sched_work;
|
||||
unsigned long sched_flags;
|
||||
unsigned long rt_priority;
|
||||
int policy;
|
||||
int prio;
|
||||
};
|
||||
|
||||
struct spu_gang {
|
||||
|
|
@ -159,6 +171,16 @@ void spu_gang_remove_ctx(struct spu_gang *gang, struct spu_context *ctx);
|
|||
void spu_gang_add_ctx(struct spu_gang *gang, struct spu_context *ctx);
|
||||
|
||||
/* context management */
|
||||
static inline void spu_acquire(struct spu_context *ctx)
|
||||
{
|
||||
mutex_lock(&ctx->state_mutex);
|
||||
}
|
||||
|
||||
static inline void spu_release(struct spu_context *ctx)
|
||||
{
|
||||
mutex_unlock(&ctx->state_mutex);
|
||||
}
|
||||
|
||||
struct spu_context * alloc_spu_context(struct spu_gang *gang);
|
||||
void destroy_spu_context(struct kref *kref);
|
||||
struct spu_context * get_spu_context(struct spu_context *ctx);
|
||||
|
|
@ -166,20 +188,18 @@ int put_spu_context(struct spu_context *ctx);
|
|||
void spu_unmap_mappings(struct spu_context *ctx);
|
||||
|
||||
void spu_forget(struct spu_context *ctx);
|
||||
void spu_acquire(struct spu_context *ctx);
|
||||
void spu_release(struct spu_context *ctx);
|
||||
int spu_acquire_runnable(struct spu_context *ctx);
|
||||
int spu_acquire_runnable(struct spu_context *ctx, unsigned long flags);
|
||||
void spu_acquire_saved(struct spu_context *ctx);
|
||||
int spu_acquire_exclusive(struct spu_context *ctx);
|
||||
|
||||
static inline void spu_release_exclusive(struct spu_context *ctx)
|
||||
{
|
||||
up_write(&ctx->state_sema);
|
||||
}
|
||||
|
||||
int spu_activate(struct spu_context *ctx, u64 flags);
|
||||
enum {
|
||||
SPU_ACTIVATE_NOWAKE = 1,
|
||||
};
|
||||
int spu_activate(struct spu_context *ctx, unsigned long flags);
|
||||
void spu_deactivate(struct spu_context *ctx);
|
||||
void spu_yield(struct spu_context *ctx);
|
||||
void spu_start_tick(struct spu_context *ctx);
|
||||
void spu_stop_tick(struct spu_context *ctx);
|
||||
void spu_sched_tick(struct work_struct *work);
|
||||
int __init spu_sched_init(void);
|
||||
void __exit spu_sched_exit(void);
|
||||
|
||||
|
|
|
|||
|
|
@ -95,7 +95,6 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
|
|||
unsigned long lpar_rc;
|
||||
unsigned long slot;
|
||||
unsigned long hpte_v, hpte_r;
|
||||
unsigned long flags;
|
||||
|
||||
/* same as iseries */
|
||||
if (vflags & HPTE_V_SECONDARY)
|
||||
|
|
@ -115,17 +114,17 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
|
|||
if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE))
|
||||
hpte_r &= ~_PAGE_COHERENT;
|
||||
|
||||
spin_lock_irqsave(&beat_htab_lock, flags);
|
||||
spin_lock(&beat_htab_lock);
|
||||
if ((lpar_rc = beat_read_mask(hpte_group)) == 0) {
|
||||
if (!(vflags & HPTE_V_BOLTED))
|
||||
DBG_LOW(" full\n");
|
||||
spin_unlock_irqrestore(&beat_htab_lock, flags);
|
||||
spin_unlock(&beat_htab_lock);
|
||||
return -1;
|
||||
}
|
||||
|
||||
lpar_rc = beat_insert_htab_entry(0, hpte_group, lpar_rc << 48,
|
||||
hpte_v, hpte_r, &slot);
|
||||
spin_unlock_irqrestore(&beat_htab_lock, flags);
|
||||
spin_unlock(&beat_htab_lock);
|
||||
|
||||
/*
|
||||
* Since we try and ioremap PHBs we don't own, the pte insert
|
||||
|
|
@ -189,7 +188,6 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
|
|||
{
|
||||
unsigned long lpar_rc;
|
||||
unsigned long dummy0, dummy1, want_v;
|
||||
unsigned long flags;
|
||||
|
||||
want_v = hpte_encode_v(va, psize);
|
||||
|
||||
|
|
@ -197,17 +195,17 @@ static long beat_lpar_hpte_updatepp(unsigned long slot,
|
|||
"avpnv=%016lx, slot=%016lx, psize: %d, newpp %016lx ... ",
|
||||
want_v & HPTE_V_AVPN, slot, psize, newpp);
|
||||
|
||||
spin_lock_irqsave(&beat_htab_lock, flags);
|
||||
spin_lock(&beat_htab_lock);
|
||||
dummy0 = beat_lpar_hpte_getword0(slot);
|
||||
if ((dummy0 & ~0x7FUL) != (want_v & ~0x7FUL)) {
|
||||
DBG_LOW("not found !\n");
|
||||
spin_unlock_irqrestore(&beat_htab_lock, flags);
|
||||
spin_unlock(&beat_htab_lock);
|
||||
return -1;
|
||||
}
|
||||
|
||||
lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7, &dummy0,
|
||||
&dummy1);
|
||||
spin_unlock_irqrestore(&beat_htab_lock, flags);
|
||||
spin_unlock(&beat_htab_lock);
|
||||
if (lpar_rc != 0 || dummy0 == 0) {
|
||||
DBG_LOW("not found !\n");
|
||||
return -1;
|
||||
|
|
@ -256,18 +254,17 @@ static void beat_lpar_hpte_updateboltedpp(unsigned long newpp,
|
|||
int psize)
|
||||
{
|
||||
unsigned long lpar_rc, slot, vsid, va, dummy0, dummy1;
|
||||
unsigned long flags;
|
||||
|
||||
vsid = get_kernel_vsid(ea);
|
||||
va = (vsid << 28) | (ea & 0x0fffffff);
|
||||
|
||||
spin_lock_irqsave(&beat_htab_lock, flags);
|
||||
spin_lock(&beat_htab_lock);
|
||||
slot = beat_lpar_hpte_find(va, psize);
|
||||
BUG_ON(slot == -1);
|
||||
|
||||
lpar_rc = beat_write_htab_entry(0, slot, 0, newpp, 0, 7,
|
||||
&dummy0, &dummy1);
|
||||
spin_unlock_irqrestore(&beat_htab_lock, flags);
|
||||
spin_unlock(&beat_htab_lock);
|
||||
|
||||
BUG_ON(lpar_rc != 0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,7 +13,6 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <asm/time.h>
|
||||
|
|
@ -91,17 +90,6 @@ static void __init linkstation_setup_arch(void)
|
|||
ARRAY_SIZE(linkstation_physmap_partitions));
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
if (initrd_start)
|
||||
ROOT_DEV = Root_RAM0;
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_ROOT_NFS
|
||||
ROOT_DEV = Root_NFS;
|
||||
#else
|
||||
ROOT_DEV = Root_HDA1;
|
||||
#endif
|
||||
|
||||
/* Lookup PCI host bridges */
|
||||
for (np = NULL; (np = of_find_node_by_type(np, "pci")) != NULL;)
|
||||
add_bridge(np);
|
||||
|
|
|
|||
|
|
@ -170,31 +170,6 @@ static int __init construct_spu(struct spu *spu)
|
|||
return result;
|
||||
}
|
||||
|
||||
static int __init add_spu_pages(unsigned long start_addr, unsigned long size)
|
||||
{
|
||||
int result;
|
||||
unsigned long start_pfn;
|
||||
unsigned long nr_pages;
|
||||
struct pglist_data *pgdata;
|
||||
struct zone *zone;
|
||||
|
||||
BUG_ON(!mem_init_done);
|
||||
|
||||
start_pfn = start_addr >> PAGE_SHIFT;
|
||||
nr_pages = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
|
||||
|
||||
pgdata = NODE_DATA(0);
|
||||
zone = pgdata->node_zones;
|
||||
|
||||
result = __add_pages(zone, start_pfn, nr_pages);
|
||||
|
||||
if (result)
|
||||
pr_debug("%s:%d: __add_pages failed: (%d)\n",
|
||||
__func__, __LINE__, result);
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
static void spu_unmap(struct spu *spu)
|
||||
{
|
||||
iounmap(spu->priv2);
|
||||
|
|
@ -206,19 +181,6 @@ static void spu_unmap(struct spu *spu)
|
|||
static int __init setup_areas(struct spu *spu)
|
||||
{
|
||||
struct table {char* name; unsigned long addr; unsigned long size;};
|
||||
int result;
|
||||
|
||||
/* setup pages */
|
||||
|
||||
result = add_spu_pages(spu->local_store_phys, LS_SIZE);
|
||||
if (result)
|
||||
goto fail_add;
|
||||
|
||||
result = add_spu_pages(spu->problem_phys, sizeof(struct spu_problem));
|
||||
if (result)
|
||||
goto fail_add;
|
||||
|
||||
/* ioremap */
|
||||
|
||||
spu_pdata(spu)->shadow = __ioremap(
|
||||
spu_pdata(spu)->shadow_addr, sizeof(struct spe_shadow),
|
||||
|
|
@ -260,8 +222,8 @@ static int __init setup_areas(struct spu *spu)
|
|||
|
||||
fail_ioremap:
|
||||
spu_unmap(spu);
|
||||
fail_add:
|
||||
return result;
|
||||
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static int __init setup_interrupts(struct spu *spu)
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ obj-$(CONFIG_SMP) += smp.o
|
|||
obj-$(CONFIG_XICS) += xics.o
|
||||
obj-$(CONFIG_SCANLOG) += scanlog.o
|
||||
obj-$(CONFIG_EEH) += eeh.o eeh_cache.o eeh_driver.o eeh_event.o
|
||||
obj-$(CONFIG_KEXEC) += kexec.o
|
||||
|
||||
obj-$(CONFIG_HOTPLUG_CPU) += hotplug-cpu.o
|
||||
|
||||
|
|
|
|||
|
|
@ -1,17 +0,0 @@
|
|||
/*
|
||||
* Copyright 2006 IBM Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _PSERIES_FIRMWARE_H
|
||||
#define _PSERIES_FIRMWARE_H
|
||||
|
||||
#include <asm/firmware.h>
|
||||
|
||||
extern void __init fw_feature_init(void);
|
||||
|
||||
#endif /* _PSERIES_FIRMWARE_H */
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
/*
|
||||
* Copyright 2006 Michael Ellerman, IBM Corporation
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/firmware.h>
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/mpic.h>
|
||||
|
||||
#include "pseries.h"
|
||||
#include "xics.h"
|
||||
#include "plpar_wrappers.h"
|
||||
|
||||
static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
|
||||
{
|
||||
/* Don't risk a hypervisor call if we're crashing */
|
||||
if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
|
||||
unsigned long addr;
|
||||
|
||||
addr = __pa(get_slb_shadow());
|
||||
if (unregister_slb_shadow(hard_smp_processor_id(), addr))
|
||||
printk("SLB shadow buffer deregistration of "
|
||||
"cpu %u (hw_cpu_id %d) failed\n",
|
||||
smp_processor_id(),
|
||||
hard_smp_processor_id());
|
||||
|
||||
addr = __pa(get_lppaca());
|
||||
if (unregister_vpa(hard_smp_processor_id(), addr)) {
|
||||
printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
|
||||
"failed\n", smp_processor_id(),
|
||||
hard_smp_processor_id());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
|
||||
{
|
||||
pseries_kexec_cpu_down(crash_shutdown, secondary);
|
||||
mpic_teardown_this_cpu(secondary);
|
||||
}
|
||||
|
||||
void __init setup_kexec_cpu_down_mpic(void)
|
||||
{
|
||||
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
|
||||
}
|
||||
|
||||
static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
|
||||
{
|
||||
pseries_kexec_cpu_down(crash_shutdown, secondary);
|
||||
xics_teardown_cpu(secondary);
|
||||
}
|
||||
|
||||
void __init setup_kexec_cpu_down_xics(void)
|
||||
{
|
||||
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
|
||||
}
|
||||
|
||||
static int __init pseries_kexec_setup(void)
|
||||
{
|
||||
ppc_md.machine_kexec = default_machine_kexec;
|
||||
ppc_md.machine_kexec_prepare = default_machine_kexec_prepare;
|
||||
ppc_md.machine_crash_shutdown = default_machine_crash_shutdown;
|
||||
|
||||
return 0;
|
||||
}
|
||||
__initcall(pseries_kexec_setup);
|
||||
|
|
@ -98,6 +98,10 @@ static void fixup_winbond_82c105(struct pci_dev* dev)
|
|||
if (dev->resource[i].flags & IORESOURCE_IO
|
||||
&& dev->bus->number == 0 && dev->devfn == 0x81)
|
||||
dev->resource[i].flags &= ~IORESOURCE_IO;
|
||||
if (dev->resource[i].start == 0 && dev->resource[i].end) {
|
||||
dev->resource[i].flags = 0;
|
||||
dev->resource[i].end = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_82C105,
|
||||
|
|
|
|||
|
|
@ -0,0 +1,36 @@
|
|||
/*
|
||||
* Copyright 2006 IBM Corporation.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*/
|
||||
|
||||
#ifndef _PSERIES_PSERIES_H
|
||||
#define _PSERIES_PSERIES_H
|
||||
|
||||
extern void __init fw_feature_init(void);
|
||||
|
||||
struct pt_regs;
|
||||
|
||||
extern int pSeries_system_reset_exception(struct pt_regs *regs);
|
||||
extern int pSeries_machine_check_exception(struct pt_regs *regs);
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
extern void smp_init_pseries_mpic(void);
|
||||
extern void smp_init_pseries_xics(void);
|
||||
#else
|
||||
static inline smp_init_pseries_mpic(void) { };
|
||||
static inline smp_init_pseries_xics(void) { };
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
extern void setup_kexec_cpu_down_xics(void);
|
||||
extern void setup_kexec_cpu_down_mpic(void);
|
||||
#else
|
||||
static inline setup_kexec_cpu_down_xics(void) { };
|
||||
static inline setup_kexec_cpu_down_mpic(void) { };
|
||||
#endif
|
||||
|
||||
#endif /* _PSERIES_PSERIES_H */
|
||||
|
|
@ -51,7 +51,7 @@
|
|||
#include <asm/udbg.h>
|
||||
#include <asm/firmware.h>
|
||||
|
||||
#include "ras.h"
|
||||
#include "pseries.h"
|
||||
|
||||
static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
|
||||
static DEFINE_SPINLOCK(ras_log_buf_lock);
|
||||
|
|
|
|||
|
|
@ -1,9 +0,0 @@
|
|||
#ifndef _PSERIES_RAS_H
|
||||
#define _PSERIES_RAS_H
|
||||
|
||||
struct pt_regs;
|
||||
|
||||
extern int pSeries_system_reset_exception(struct pt_regs *regs);
|
||||
extern int pSeries_machine_check_exception(struct pt_regs *regs);
|
||||
|
||||
#endif /* _PSERIES_RAS_H */
|
||||
|
|
@ -55,7 +55,6 @@
|
|||
#include <asm/dma.h>
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/kexec.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/nvram.h>
|
||||
#include "xics.h"
|
||||
|
|
@ -65,10 +64,10 @@
|
|||
#include <asm/i8259.h>
|
||||
#include <asm/udbg.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/firmware.h>
|
||||
|
||||
#include "plpar_wrappers.h"
|
||||
#include "ras.h"
|
||||
#include "firmware.h"
|
||||
#include "pseries.h"
|
||||
|
||||
#ifdef DEBUG
|
||||
#define DBG(fmt...) udbg_printf(fmt)
|
||||
|
|
@ -77,8 +76,6 @@
|
|||
#endif
|
||||
|
||||
/* move those away to a .h */
|
||||
extern void smp_init_pseries_mpic(void);
|
||||
extern void smp_init_pseries_xics(void);
|
||||
extern void find_udbg_vterm(void);
|
||||
|
||||
int fwnmi_active; /* TRUE if an FWNMI handler is present */
|
||||
|
|
@ -221,42 +218,6 @@ static void pseries_lpar_enable_pmcs(void)
|
|||
get_lppaca()->pmcregs_in_use = 1;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_KEXEC
|
||||
static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
|
||||
{
|
||||
/* Don't risk a hypervisor call if we're crashing */
|
||||
if (firmware_has_feature(FW_FEATURE_SPLPAR) && !crash_shutdown) {
|
||||
unsigned long addr;
|
||||
|
||||
addr = __pa(get_slb_shadow());
|
||||
if (unregister_slb_shadow(hard_smp_processor_id(), addr))
|
||||
printk("SLB shadow buffer deregistration of "
|
||||
"cpu %u (hw_cpu_id %d) failed\n",
|
||||
smp_processor_id(),
|
||||
hard_smp_processor_id());
|
||||
|
||||
addr = __pa(get_lppaca());
|
||||
if (unregister_vpa(hard_smp_processor_id(), addr)) {
|
||||
printk("VPA deregistration of cpu %u (hw_cpu_id %d) "
|
||||
"failed\n", smp_processor_id(),
|
||||
hard_smp_processor_id());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void pseries_kexec_cpu_down_mpic(int crash_shutdown, int secondary)
|
||||
{
|
||||
pseries_kexec_cpu_down(crash_shutdown, secondary);
|
||||
mpic_teardown_this_cpu(secondary);
|
||||
}
|
||||
|
||||
static void pseries_kexec_cpu_down_xics(int crash_shutdown, int secondary)
|
||||
{
|
||||
pseries_kexec_cpu_down(crash_shutdown, secondary);
|
||||
xics_teardown_cpu(secondary);
|
||||
}
|
||||
#endif /* CONFIG_KEXEC */
|
||||
|
||||
static void __init pseries_discover_pic(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
|
|
@ -269,21 +230,13 @@ static void __init pseries_discover_pic(void)
|
|||
pSeries_mpic_node = of_node_get(np);
|
||||
ppc_md.init_IRQ = pseries_mpic_init_IRQ;
|
||||
ppc_md.get_irq = mpic_get_irq;
|
||||
#ifdef CONFIG_KEXEC
|
||||
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_mpic;
|
||||
#endif
|
||||
#ifdef CONFIG_SMP
|
||||
setup_kexec_cpu_down_mpic();
|
||||
smp_init_pseries_mpic();
|
||||
#endif
|
||||
return;
|
||||
} else if (strstr(typep, "ppc-xicp")) {
|
||||
ppc_md.init_IRQ = xics_init_IRQ;
|
||||
#ifdef CONFIG_KEXEC
|
||||
ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
|
||||
#endif
|
||||
#ifdef CONFIG_SMP
|
||||
setup_kexec_cpu_down_xics();
|
||||
smp_init_pseries_xics();
|
||||
#endif
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
|
@ -554,9 +507,4 @@ define_machine(pseries) {
|
|||
.check_legacy_ioport = pSeries_check_legacy_ioport,
|
||||
.system_reset_exception = pSeries_system_reset_exception,
|
||||
.machine_check_exception = pSeries_machine_check_exception,
|
||||
#ifdef CONFIG_KEXEC
|
||||
.machine_kexec = default_machine_kexec,
|
||||
.machine_kexec_prepare = default_machine_kexec_prepare,
|
||||
.machine_crash_shutdown = default_machine_crash_shutdown,
|
||||
#endif
|
||||
};
|
||||
|
|
|
|||
|
|
@ -48,6 +48,7 @@
|
|||
#include <asm/vdso_datapage.h>
|
||||
|
||||
#include "plpar_wrappers.h"
|
||||
#include "pseries.h"
|
||||
|
||||
#ifdef DEBUG
|
||||
#include <asm/udbg.h>
|
||||
|
|
|
|||
|
|
@ -441,7 +441,8 @@ static int __init fsl_usb_of_init(void)
|
|||
{
|
||||
struct device_node *np;
|
||||
unsigned int i;
|
||||
struct platform_device *usb_dev_mph = NULL, *usb_dev_dr = NULL;
|
||||
struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
|
||||
*usb_dev_dr_client = NULL;
|
||||
int ret;
|
||||
|
||||
for (np = NULL, i = 0;
|
||||
|
|
@ -507,33 +508,72 @@ static int __init fsl_usb_of_init(void)
|
|||
|
||||
of_irq_to_resource(np, 0, &r[1]);
|
||||
|
||||
usb_dev_dr =
|
||||
platform_device_register_simple("fsl-ehci", i, r, 2);
|
||||
if (IS_ERR(usb_dev_dr)) {
|
||||
ret = PTR_ERR(usb_dev_dr);
|
||||
prop = get_property(np, "dr_mode", NULL);
|
||||
|
||||
if (!prop || !strcmp(prop, "host")) {
|
||||
usb_data.operating_mode = FSL_USB2_DR_HOST;
|
||||
usb_dev_dr_host = platform_device_register_simple(
|
||||
"fsl-ehci", i, r, 2);
|
||||
if (IS_ERR(usb_dev_dr_host)) {
|
||||
ret = PTR_ERR(usb_dev_dr_host);
|
||||
goto err;
|
||||
}
|
||||
} else if (prop && !strcmp(prop, "peripheral")) {
|
||||
usb_data.operating_mode = FSL_USB2_DR_DEVICE;
|
||||
usb_dev_dr_client = platform_device_register_simple(
|
||||
"fsl-usb2-udc", i, r, 2);
|
||||
if (IS_ERR(usb_dev_dr_client)) {
|
||||
ret = PTR_ERR(usb_dev_dr_client);
|
||||
goto err;
|
||||
}
|
||||
} else if (prop && !strcmp(prop, "otg")) {
|
||||
usb_data.operating_mode = FSL_USB2_DR_OTG;
|
||||
usb_dev_dr_host = platform_device_register_simple(
|
||||
"fsl-ehci", i, r, 2);
|
||||
if (IS_ERR(usb_dev_dr_host)) {
|
||||
ret = PTR_ERR(usb_dev_dr_host);
|
||||
goto err;
|
||||
}
|
||||
usb_dev_dr_client = platform_device_register_simple(
|
||||
"fsl-usb2-udc", i, r, 2);
|
||||
if (IS_ERR(usb_dev_dr_client)) {
|
||||
ret = PTR_ERR(usb_dev_dr_client);
|
||||
goto err;
|
||||
}
|
||||
} else {
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
usb_dev_dr->dev.coherent_dma_mask = 0xffffffffUL;
|
||||
usb_dev_dr->dev.dma_mask = &usb_dev_dr->dev.coherent_dma_mask;
|
||||
|
||||
usb_data.operating_mode = FSL_USB2_DR_HOST;
|
||||
|
||||
prop = get_property(np, "phy_type", NULL);
|
||||
usb_data.phy_mode = determine_usb_phy(prop);
|
||||
|
||||
ret =
|
||||
platform_device_add_data(usb_dev_dr, &usb_data,
|
||||
sizeof(struct
|
||||
fsl_usb2_platform_data));
|
||||
if (ret)
|
||||
goto unreg_dr;
|
||||
if (usb_dev_dr_host) {
|
||||
usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
|
||||
usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
|
||||
dev.coherent_dma_mask;
|
||||
if ((ret = platform_device_add_data(usb_dev_dr_host,
|
||||
&usb_data, sizeof(struct
|
||||
fsl_usb2_platform_data))))
|
||||
goto unreg_dr;
|
||||
}
|
||||
if (usb_dev_dr_client) {
|
||||
usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
|
||||
usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
|
||||
dev.coherent_dma_mask;
|
||||
if ((ret = platform_device_add_data(usb_dev_dr_client,
|
||||
&usb_data, sizeof(struct
|
||||
fsl_usb2_platform_data))))
|
||||
goto unreg_dr;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
|
||||
unreg_dr:
|
||||
if (usb_dev_dr)
|
||||
platform_device_unregister(usb_dev_dr);
|
||||
if (usb_dev_dr_host)
|
||||
platform_device_unregister(usb_dev_dr_host);
|
||||
if (usb_dev_dr_client)
|
||||
platform_device_unregister(usb_dev_dr_client);
|
||||
unreg_mph:
|
||||
if (usb_dev_mph)
|
||||
platform_device_unregister(usb_dev_mph);
|
||||
|
|
@ -699,7 +739,7 @@ static int __init fs_enet_of_init(void)
|
|||
if (ret)
|
||||
goto unreg;
|
||||
}
|
||||
|
||||
|
||||
of_node_put(phy);
|
||||
of_node_put(mdio);
|
||||
|
||||
|
|
|
|||
|
|
@ -1395,4 +1395,25 @@ void smp_mpic_message_pass(int target, int msg)
|
|||
break;
|
||||
}
|
||||
}
|
||||
|
||||
int __init smp_mpic_probe(void)
|
||||
{
|
||||
int nr_cpus;
|
||||
|
||||
DBG("smp_mpic_probe()...\n");
|
||||
|
||||
nr_cpus = cpus_weight(cpu_possible_map);
|
||||
|
||||
DBG("nr_cpus: %d\n", nr_cpus);
|
||||
|
||||
if (nr_cpus > 1)
|
||||
mpic_request_ipis();
|
||||
|
||||
return nr_cpus;
|
||||
}
|
||||
|
||||
void __devinit smp_mpic_setup_cpu(int cpu)
|
||||
{
|
||||
mpic_setup_this_cpu();
|
||||
}
|
||||
#endif /* CONFIG_SMP */
|
||||
|
|
|
|||
|
|
@ -179,7 +179,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
|
|||
uccs->us_info = us_info;
|
||||
uccs->saved_uccm = 0;
|
||||
uccs->p_rx_frame = 0;
|
||||
uccs->us_regs = us_info->us_regs;
|
||||
uccs->us_regs = us_info->regs;
|
||||
us_regs = uccs->us_regs;
|
||||
uccs->p_ucce = (u16 *) & (us_regs->ucce);
|
||||
uccs->p_uccm = (u16 *) & (us_regs->uccm);
|
||||
|
|
@ -206,7 +206,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
|
|||
uccs->us_pram = qe_muram_addr(uccs->us_pram_offset);
|
||||
|
||||
/* Init Guemr register */
|
||||
if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->us_regs)))) {
|
||||
if ((ret = ucc_init_guemr((struct ucc_common *) (us_info->regs)))) {
|
||||
uccs_err("ucc_slow_init: Could not init the guemr register.");
|
||||
ucc_slow_free(uccs);
|
||||
return ret;
|
||||
|
|
@ -214,7 +214,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
|
|||
|
||||
/* Set UCC to slow type */
|
||||
if ((ret = ucc_set_type(us_info->ucc_num,
|
||||
(struct ucc_common *) (us_info->us_regs),
|
||||
(struct ucc_common *) (us_info->regs),
|
||||
UCC_SPEED_TYPE_SLOW))) {
|
||||
uccs_err("ucc_slow_init: Could not init the guemr register.");
|
||||
ucc_slow_free(uccs);
|
||||
|
|
|
|||
|
|
@ -2811,7 +2811,6 @@ static void dump_spu_fields(struct spu *spu)
|
|||
DUMP_FIELD(spu, "0x%lx", irqs[2]);
|
||||
DUMP_FIELD(spu, "0x%x", slb_replace);
|
||||
DUMP_FIELD(spu, "%d", pid);
|
||||
DUMP_FIELD(spu, "%d", prio);
|
||||
DUMP_FIELD(spu, "0x%p", mm);
|
||||
DUMP_FIELD(spu, "0x%p", ctx);
|
||||
DUMP_FIELD(spu, "0x%p", rq);
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -206,7 +206,8 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
|
||||
mtspr SPRN_MAS0,r7
|
||||
tlbre
|
||||
li r6,0
|
||||
mfspr r6,SPRN_MAS1
|
||||
rlwinm r6,r6,0,2,0 /* clear IPROT */
|
||||
mtspr SPRN_MAS1,r6
|
||||
tlbwe
|
||||
/* Invalidate TLB1 */
|
||||
|
|
@ -248,6 +249,8 @@ skpinv: addi r6,r6,1 /* Increment */
|
|||
rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
|
||||
mtspr SPRN_MAS0,r7
|
||||
tlbre
|
||||
mfspr r8,SPRN_MAS1
|
||||
rlwinm r8,r8,0,2,0 /* clear IPROT */
|
||||
mtspr SPRN_MAS1,r8
|
||||
tlbwe
|
||||
/* Invalidate TLB1 */
|
||||
|
|
@ -889,7 +892,6 @@ load_up_spe:
|
|||
REST_GPR(9, r11)
|
||||
REST_GPR(12, r11)
|
||||
lwz r11,GPR11(r11)
|
||||
SYNC
|
||||
rfi
|
||||
|
||||
/*
|
||||
|
|
@ -953,7 +955,6 @@ _GLOBAL(giveup_altivec)
|
|||
_GLOBAL(giveup_spe)
|
||||
mfmsr r5
|
||||
oris r5,r5,MSR_SPE@h
|
||||
SYNC
|
||||
mtmsr r5 /* enable use of SPE now */
|
||||
isync
|
||||
cmpi 0,r3,0
|
||||
|
|
|
|||
|
|
@ -271,7 +271,7 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
|
|||
extern long *intercept_table;
|
||||
EXPORT_SYMBOL(intercept_table);
|
||||
#endif /* CONFIG_PPC_STD_MMU */
|
||||
#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
|
||||
#ifdef CONFIG_PPC_DCR_NATIVE
|
||||
EXPORT_SYMBOL(__mtdcr);
|
||||
EXPORT_SYMBOL(__mfdcr);
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -314,7 +314,7 @@ void __init mapin_ram(void)
|
|||
}
|
||||
|
||||
/* is x a power of 4? */
|
||||
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1))
|
||||
#define is_power_of_4(x) is_power_of_2(x) && (ffs(x) & 1)
|
||||
|
||||
/*
|
||||
* Set up a mapping for a block of I/O.
|
||||
|
|
|
|||
|
|
@ -98,6 +98,12 @@ config OCOTEA
|
|||
help
|
||||
This option enables support for the IBM PPC440GX evaluation board.
|
||||
|
||||
config TAISHAN
|
||||
bool "Taishan"
|
||||
select WANT_EARLY_SERIAL
|
||||
help
|
||||
This option enables support for the AMCC PPC440GX evaluation board.
|
||||
|
||||
endchoice
|
||||
|
||||
config EP405PC
|
||||
|
|
@ -126,7 +132,7 @@ config 440GP
|
|||
|
||||
config 440GX
|
||||
bool
|
||||
depends on OCOTEA
|
||||
depends on OCOTEA || TAISHAN
|
||||
default y
|
||||
|
||||
config 440SP
|
||||
|
|
@ -173,7 +179,7 @@ config BOOKE
|
|||
|
||||
config IBM_OCP
|
||||
bool
|
||||
depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || WALNUT
|
||||
depends on ASH || BAMBOO || BUBINGA || CPCI405 || EBONY || EP405 || LUAN || YUCCA || OCOTEA || REDWOOD_5 || REDWOOD_6 || SYCAMORE || TAISHAN || WALNUT
|
||||
default y
|
||||
|
||||
config IBM_EMAC4
|
||||
|
|
|
|||
|
|
@ -12,6 +12,7 @@ obj-$(CONFIG_OCOTEA) += ocotea.o
|
|||
obj-$(CONFIG_REDWOOD_5) += redwood5.o
|
||||
obj-$(CONFIG_REDWOOD_6) += redwood6.o
|
||||
obj-$(CONFIG_SYCAMORE) += sycamore.o
|
||||
obj-$(CONFIG_TAISHAN) += taishan.o
|
||||
obj-$(CONFIG_WALNUT) += walnut.o
|
||||
obj-$(CONFIG_XILINX_ML300) += xilinx_ml300.o
|
||||
obj-$(CONFIG_XILINX_ML403) += xilinx_ml403.o
|
||||
|
|
|
|||
|
|
@ -0,0 +1,395 @@
|
|||
/*
|
||||
* arch/ppc/platforms/4xx/taishan.c
|
||||
*
|
||||
* AMCC Taishan board specific routines
|
||||
*
|
||||
* Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/stddef.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/errno.h>
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/kdev_t.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/blkdev.h>
|
||||
#include <linux/console.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/ide.h>
|
||||
#include <linux/initrd.h>
|
||||
#include <linux/seq_file.h>
|
||||
#include <linux/root_dev.h>
|
||||
#include <linux/tty.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/nand.h>
|
||||
#include <linux/mtd/ndfc.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
|
||||
#include <asm/machdep.h>
|
||||
#include <asm/ocp.h>
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/ppcboot.h>
|
||||
|
||||
#include <syslib/gen550.h>
|
||||
#include <syslib/ibm440gx_common.h>
|
||||
|
||||
extern bd_t __res;
|
||||
|
||||
static struct ibm44x_clocks clocks __initdata;
|
||||
|
||||
/*
|
||||
* NOR FLASH configuration (using mtd physmap driver)
|
||||
*/
|
||||
|
||||
/* start will be added dynamically, end is always fixed */
|
||||
static struct resource taishan_nor_resource = {
|
||||
.start = TAISHAN_FLASH_ADDR,
|
||||
.end = 0x1ffffffffULL,
|
||||
.flags = IORESOURCE_MEM,
|
||||
};
|
||||
|
||||
#define RW_PART0_OF 0
|
||||
#define RW_PART0_SZ 0x180000
|
||||
#define RW_PART1_SZ 0x200000
|
||||
/* Partition 2 will be autosized dynamically... */
|
||||
#define RW_PART3_SZ 0x80000
|
||||
#define RW_PART4_SZ 0x40000
|
||||
|
||||
static struct mtd_partition taishan_nor_parts[] = {
|
||||
{
|
||||
.name = "kernel",
|
||||
.offset = 0,
|
||||
.size = RW_PART0_SZ
|
||||
},
|
||||
{
|
||||
.name = "root",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = RW_PART1_SZ,
|
||||
},
|
||||
{
|
||||
.name = "user",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
/* .size = RW_PART2_SZ */ /* will be adjusted dynamically */
|
||||
},
|
||||
{
|
||||
.name = "env",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = RW_PART3_SZ,
|
||||
},
|
||||
{
|
||||
.name = "u-boot",
|
||||
.offset = MTDPART_OFS_APPEND,
|
||||
.size = RW_PART4_SZ,
|
||||
}
|
||||
};
|
||||
|
||||
static struct physmap_flash_data taishan_nor_data = {
|
||||
.width = 4,
|
||||
.parts = taishan_nor_parts,
|
||||
.nr_parts = ARRAY_SIZE(taishan_nor_parts),
|
||||
};
|
||||
|
||||
static struct platform_device taishan_nor_device = {
|
||||
.name = "physmap-flash",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.platform_data = &taishan_nor_data,
|
||||
},
|
||||
.num_resources = 1,
|
||||
.resource = &taishan_nor_resource,
|
||||
};
|
||||
|
||||
static int taishan_setup_flash(void)
|
||||
{
|
||||
/*
|
||||
* Adjust partition 2 to flash size
|
||||
*/
|
||||
taishan_nor_parts[2].size = __res.bi_flashsize -
|
||||
RW_PART0_SZ - RW_PART1_SZ - RW_PART3_SZ - RW_PART4_SZ;
|
||||
|
||||
platform_device_register(&taishan_nor_device);
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(taishan_setup_flash);
|
||||
|
||||
static void __init
|
||||
taishan_calibrate_decr(void)
|
||||
{
|
||||
unsigned int freq;
|
||||
|
||||
if (mfspr(SPRN_CCR1) & CCR1_TCS)
|
||||
freq = TAISHAN_TMR_CLK;
|
||||
else
|
||||
freq = clocks.cpu;
|
||||
|
||||
ibm44x_calibrate_decr(freq);
|
||||
}
|
||||
|
||||
static int
|
||||
taishan_show_cpuinfo(struct seq_file *m)
|
||||
{
|
||||
seq_printf(m, "vendor\t\t: AMCC\n");
|
||||
seq_printf(m, "machine\t\t: PPC440GX EVB (Taishan)\n");
|
||||
ibm440gx_show_cpuinfo(m);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int
|
||||
taishan_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
|
||||
{
|
||||
static char pci_irq_table[][4] =
|
||||
/*
|
||||
* PCI IDSEL/INTPIN->INTLINE
|
||||
* A B C D
|
||||
*/
|
||||
{
|
||||
{ 23, 24, 25, 26 }, /* IDSEL 1 - PCI Slot 0 */
|
||||
{ 24, 25, 26, 23 }, /* IDSEL 2 - PCI Slot 1 */
|
||||
};
|
||||
|
||||
const long min_idsel = 1, max_idsel = 2, irqs_per_slot = 4;
|
||||
return PCI_IRQ_TABLE_LOOKUP;
|
||||
}
|
||||
|
||||
static void __init taishan_set_emacdata(void)
|
||||
{
|
||||
struct ocp_def *def;
|
||||
struct ocp_func_emac_data *emacdata;
|
||||
int i;
|
||||
|
||||
/* Set phy_map, phy_mode, and mac_addr for each EMAC */
|
||||
for (i=2; i<4; i++) {
|
||||
def = ocp_get_one_device(OCP_VENDOR_IBM, OCP_FUNC_EMAC, i);
|
||||
emacdata = def->additions;
|
||||
if (i < 2) {
|
||||
emacdata->phy_map = 0x00000001; /* Skip 0x00 */
|
||||
emacdata->phy_mode = PHY_MODE_SMII;
|
||||
} else {
|
||||
emacdata->phy_map = 0x00000001; /* Skip 0x00 */
|
||||
emacdata->phy_mode = PHY_MODE_RGMII;
|
||||
}
|
||||
if (i == 0)
|
||||
memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6);
|
||||
else if (i == 1)
|
||||
memcpy(emacdata->mac_addr, "\0\0\0\0\0\0", 6);
|
||||
else if (i == 2)
|
||||
memcpy(emacdata->mac_addr, __res.bi_enetaddr, 6);
|
||||
else if (i == 3)
|
||||
memcpy(emacdata->mac_addr, __res.bi_enet1addr, 6);
|
||||
}
|
||||
}
|
||||
|
||||
#define PCIX_READW(offset) \
|
||||
(readw(pcix_reg_base+offset))
|
||||
|
||||
#define PCIX_WRITEW(value, offset) \
|
||||
(writew(value, pcix_reg_base+offset))
|
||||
|
||||
#define PCIX_WRITEL(value, offset) \
|
||||
(writel(value, pcix_reg_base+offset))
|
||||
|
||||
/*
|
||||
* FIXME: This is only here to "make it work". This will move
|
||||
* to a ibm_pcix.c which will contain a generic IBM PCIX bridge
|
||||
* configuration library. -Matt
|
||||
*/
|
||||
static void __init
|
||||
taishan_setup_pcix(void)
|
||||
{
|
||||
void *pcix_reg_base;
|
||||
|
||||
pcix_reg_base = ioremap64(PCIX0_REG_BASE, PCIX_REG_SIZE);
|
||||
|
||||
/* Enable PCIX0 I/O, Mem, and Busmaster cycles */
|
||||
PCIX_WRITEW(PCIX_READW(PCIX0_COMMAND) | PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER, PCIX0_COMMAND);
|
||||
|
||||
/* Disable all windows */
|
||||
PCIX_WRITEL(0, PCIX0_POM0SA);
|
||||
PCIX_WRITEL(0, PCIX0_POM1SA);
|
||||
PCIX_WRITEL(0, PCIX0_POM2SA);
|
||||
PCIX_WRITEL(0, PCIX0_PIM0SA);
|
||||
PCIX_WRITEL(0, PCIX0_PIM0SAH);
|
||||
PCIX_WRITEL(0, PCIX0_PIM1SA);
|
||||
PCIX_WRITEL(0, PCIX0_PIM2SA);
|
||||
PCIX_WRITEL(0, PCIX0_PIM2SAH);
|
||||
|
||||
/* Setup 2GB PLB->PCI outbound mem window (3_8000_0000->0_8000_0000) */
|
||||
PCIX_WRITEL(0x00000003, PCIX0_POM0LAH);
|
||||
PCIX_WRITEL(0x80000000, PCIX0_POM0LAL);
|
||||
PCIX_WRITEL(0x00000000, PCIX0_POM0PCIAH);
|
||||
PCIX_WRITEL(0x80000000, PCIX0_POM0PCIAL);
|
||||
PCIX_WRITEL(0x80000001, PCIX0_POM0SA);
|
||||
|
||||
/* Setup 2GB PCI->PLB inbound memory window at 0, enable MSIs */
|
||||
PCIX_WRITEL(0x00000000, PCIX0_PIM0LAH);
|
||||
PCIX_WRITEL(0x00000000, PCIX0_PIM0LAL);
|
||||
PCIX_WRITEL(0xe0000007, PCIX0_PIM0SA);
|
||||
PCIX_WRITEL(0xffffffff, PCIX0_PIM0SAH);
|
||||
|
||||
iounmap(pcix_reg_base);
|
||||
|
||||
eieio();
|
||||
}
|
||||
|
||||
static void __init
|
||||
taishan_setup_hose(void)
|
||||
{
|
||||
struct pci_controller *hose;
|
||||
|
||||
/* Configure windows on the PCI-X host bridge */
|
||||
taishan_setup_pcix();
|
||||
|
||||
hose = pcibios_alloc_controller();
|
||||
|
||||
if (!hose)
|
||||
return;
|
||||
|
||||
hose->first_busno = 0;
|
||||
hose->last_busno = 0xff;
|
||||
|
||||
hose->pci_mem_offset = TAISHAN_PCI_MEM_OFFSET;
|
||||
|
||||
pci_init_resource(&hose->io_resource,
|
||||
TAISHAN_PCI_LOWER_IO,
|
||||
TAISHAN_PCI_UPPER_IO,
|
||||
IORESOURCE_IO,
|
||||
"PCI host bridge");
|
||||
|
||||
pci_init_resource(&hose->mem_resources[0],
|
||||
TAISHAN_PCI_LOWER_MEM,
|
||||
TAISHAN_PCI_UPPER_MEM,
|
||||
IORESOURCE_MEM,
|
||||
"PCI host bridge");
|
||||
|
||||
hose->io_space.start = TAISHAN_PCI_LOWER_IO;
|
||||
hose->io_space.end = TAISHAN_PCI_UPPER_IO;
|
||||
hose->mem_space.start = TAISHAN_PCI_LOWER_MEM;
|
||||
hose->mem_space.end = TAISHAN_PCI_UPPER_MEM;
|
||||
hose->io_base_virt = ioremap64(TAISHAN_PCI_IO_BASE, TAISHAN_PCI_IO_SIZE);
|
||||
isa_io_base = (unsigned long) hose->io_base_virt;
|
||||
|
||||
setup_indirect_pci(hose,
|
||||
TAISHAN_PCI_CFGA_PLB32,
|
||||
TAISHAN_PCI_CFGD_PLB32);
|
||||
hose->set_cfg_type = 1;
|
||||
|
||||
hose->last_busno = pciauto_bus_scan(hose, hose->first_busno);
|
||||
|
||||
ppc_md.pci_swizzle = common_swizzle;
|
||||
ppc_md.pci_map_irq = taishan_map_irq;
|
||||
}
|
||||
|
||||
|
||||
static void __init
|
||||
taishan_early_serial_map(void)
|
||||
{
|
||||
struct uart_port port;
|
||||
|
||||
/* Setup ioremapped serial port access */
|
||||
memset(&port, 0, sizeof(port));
|
||||
port.membase = ioremap64(PPC440GX_UART0_ADDR, 8);
|
||||
port.irq = UART0_INT;
|
||||
port.uartclk = clocks.uart0;
|
||||
port.regshift = 0;
|
||||
port.iotype = UPIO_MEM;
|
||||
port.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST;
|
||||
port.line = 0;
|
||||
|
||||
if (early_serial_setup(&port) != 0)
|
||||
printk("Early serial init of port 0 failed\n");
|
||||
|
||||
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
|
||||
/* Configure debug serial access */
|
||||
gen550_init(0, &port);
|
||||
|
||||
/* Purge TLB entry added in head_44x.S for early serial access */
|
||||
_tlbie(UART0_IO_BASE);
|
||||
#endif
|
||||
|
||||
port.membase = ioremap64(PPC440GX_UART1_ADDR, 8);
|
||||
port.irq = UART1_INT;
|
||||
port.uartclk = clocks.uart1;
|
||||
port.line = 1;
|
||||
|
||||
if (early_serial_setup(&port) != 0)
|
||||
printk("Early serial init of port 1 failed\n");
|
||||
|
||||
#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
|
||||
/* Configure debug serial access */
|
||||
gen550_init(1, &port);
|
||||
#endif
|
||||
}
|
||||
|
||||
static void __init
|
||||
taishan_setup_arch(void)
|
||||
{
|
||||
taishan_set_emacdata();
|
||||
|
||||
ibm440gx_tah_enable();
|
||||
|
||||
/*
|
||||
* Determine various clocks.
|
||||
* To be completely correct we should get SysClk
|
||||
* from FPGA, because it can be changed by on-board switches
|
||||
* --ebs
|
||||
*/
|
||||
ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
|
||||
ocp_sys_info.opb_bus_freq = clocks.opb;
|
||||
|
||||
/* init to some ~sane value until calibrate_delay() runs */
|
||||
loops_per_jiffy = 50000000/HZ;
|
||||
|
||||
/* Setup PCI host bridge */
|
||||
taishan_setup_hose();
|
||||
|
||||
#ifdef CONFIG_BLK_DEV_INITRD
|
||||
if (initrd_start)
|
||||
ROOT_DEV = Root_RAM0;
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_ROOT_NFS
|
||||
ROOT_DEV = Root_NFS;
|
||||
#else
|
||||
ROOT_DEV = Root_HDA1;
|
||||
#endif
|
||||
|
||||
taishan_early_serial_map();
|
||||
|
||||
/* Identify the system */
|
||||
printk("AMCC PowerPC 440GX Taishan Platform\n");
|
||||
}
|
||||
|
||||
static void __init taishan_init(void)
|
||||
{
|
||||
ibm440gx_l2c_setup(&clocks);
|
||||
}
|
||||
|
||||
void __init platform_init(unsigned long r3, unsigned long r4,
|
||||
unsigned long r5, unsigned long r6, unsigned long r7)
|
||||
{
|
||||
ibm44x_platform_init(r3, r4, r5, r6, r7);
|
||||
|
||||
ppc_md.setup_arch = taishan_setup_arch;
|
||||
ppc_md.show_cpuinfo = taishan_show_cpuinfo;
|
||||
ppc_md.get_irq = NULL; /* Set in ppc4xx_pic_init() */
|
||||
|
||||
ppc_md.calibrate_decr = taishan_calibrate_decr;
|
||||
|
||||
#ifdef CONFIG_KGDB
|
||||
ppc_md.early_serial_map = taishan_early_serial_map;
|
||||
#endif
|
||||
ppc_md.init = taishan_init;
|
||||
}
|
||||
|
||||
|
|
@ -0,0 +1,67 @@
|
|||
/*
|
||||
* arch/ppc/platforms/4xx/taishan.h
|
||||
*
|
||||
* AMCC Taishan board definitions
|
||||
*
|
||||
* Copyright 2007 DENX Software Engineering, Stefan Roese <sr@denx.de>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#ifndef __ASM_TAISHAN_H__
|
||||
#define __ASM_TAISHAN_H__
|
||||
|
||||
#include <platforms/4xx/ibm440gx.h>
|
||||
|
||||
/* External timer clock frequency */
|
||||
#define TAISHAN_TMR_CLK 25000000
|
||||
|
||||
/* Flash */
|
||||
#define TAISHAN_FPGA_ADDR 0x0000000141000000ULL
|
||||
#define TAISHAN_LCM_ADDR 0x0000000142000000ULL
|
||||
#define TAISHAN_FLASH_ADDR 0x00000001fc000000ULL
|
||||
#define TAISHAN_FLASH_SIZE 0x4000000
|
||||
|
||||
/*
|
||||
* Serial port defines
|
||||
*/
|
||||
#define RS_TABLE_SIZE 2
|
||||
|
||||
/* head_44x.S created UART mapping, used before early_serial_setup.
|
||||
* We cannot use default OpenBIOS UART mappings because they
|
||||
* don't work for configurations with more than 512M RAM. --ebs
|
||||
*/
|
||||
#define UART0_IO_BASE 0xF0000200
|
||||
#define UART1_IO_BASE 0xF0000300
|
||||
|
||||
#define BASE_BAUD 11059200/16
|
||||
#define STD_UART_OP(num) \
|
||||
{ 0, BASE_BAUD, 0, UART##num##_INT, \
|
||||
(ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \
|
||||
iomem_base: (void*)UART##num##_IO_BASE, \
|
||||
io_type: SERIAL_IO_MEM},
|
||||
|
||||
#define SERIAL_PORT_DFNS \
|
||||
STD_UART_OP(0) \
|
||||
STD_UART_OP(1)
|
||||
|
||||
/* PCI support */
|
||||
#define TAISHAN_PCI_LOWER_IO 0x00000000
|
||||
#define TAISHAN_PCI_UPPER_IO 0x0000ffff
|
||||
#define TAISHAN_PCI_LOWER_MEM 0x80000000
|
||||
#define TAISHAN_PCI_UPPER_MEM 0xffffefff
|
||||
|
||||
#define TAISHAN_PCI_CFGA_PLB32 0x0ec00000
|
||||
#define TAISHAN_PCI_CFGD_PLB32 0x0ec00004
|
||||
|
||||
#define TAISHAN_PCI_IO_BASE 0x0000000208000000ULL
|
||||
#define TAISHAN_PCI_IO_SIZE 0x00010000
|
||||
#define TAISHAN_PCI_MEM_OFFSET 0x00000000
|
||||
|
||||
#endif /* __ASM_TAISHAN_H__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
|
@ -69,6 +69,7 @@ obj-$(CONFIG_SANDPOINT) += pci_auto.o todc_time.o
|
|||
obj-$(CONFIG_SBC82xx) += todc_time.o
|
||||
obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \
|
||||
todc_time.o
|
||||
obj-$(CONFIG_TAISHAN) += pci_auto.o
|
||||
obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \
|
||||
ppc_sys.o
|
||||
obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o
|
||||
|
|
|
|||
|
|
@ -484,10 +484,8 @@ mpc52xx_ata_resume(struct of_device *op)
|
|||
|
||||
static struct of_device_id mpc52xx_ata_of_match[] = {
|
||||
{
|
||||
.compatible = "mpc5200-ata",
|
||||
},
|
||||
{
|
||||
.compatible = "mpc52xx-ata",
|
||||
.type = "ata",
|
||||
.compatible = "mpc5200-ata",
|
||||
},
|
||||
{},
|
||||
};
|
||||
|
|
|
|||
|
|
@ -574,8 +574,8 @@ static struct adb_request led_request;
|
|||
static int leds_pending[16];
|
||||
static int leds_req_pending;
|
||||
static int pending_devs[16];
|
||||
static int pending_led_start=0;
|
||||
static int pending_led_end=0;
|
||||
static int pending_led_start;
|
||||
static int pending_led_end;
|
||||
static DEFINE_SPINLOCK(leds_lock);
|
||||
|
||||
static void leds_done(struct adb_request *req)
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ static struct pmu_sleep_notifier apm_sleep_notifier = {
|
|||
SLEEP_LEVEL_USERLAND,
|
||||
};
|
||||
|
||||
static char driver_version[] = "0.5"; /* no spaces */
|
||||
static const char driver_version[] = "0.5"; /* no spaces */
|
||||
|
||||
#ifdef DEBUG
|
||||
static char * apm_event_name[] = {
|
||||
|
|
|
|||
|
|
@ -17,10 +17,10 @@
|
|||
|
||||
static struct input_dev *emumousebtn;
|
||||
static int emumousebtn_input_register(void);
|
||||
static int mouse_emulate_buttons = 0;
|
||||
static int mouse_emulate_buttons;
|
||||
static int mouse_button2_keycode = KEY_RIGHTCTRL; /* right control key */
|
||||
static int mouse_button3_keycode = KEY_RIGHTALT; /* right option key */
|
||||
static int mouse_last_keycode = 0;
|
||||
static int mouse_last_keycode;
|
||||
|
||||
#if defined(CONFIG_SYSCTL)
|
||||
/* file(s) in /proc/sys/dev/mac_hid */
|
||||
|
|
|
|||
|
|
@ -48,11 +48,11 @@ static u8 FAN_SPD_SET[2] = {0x30, 0x31};
|
|||
|
||||
static u8 default_limits_local[3] = {70, 50, 70}; /* local, sensor1, sensor2 */
|
||||
static u8 default_limits_chip[3] = {80, 65, 80}; /* local, sensor1, sensor2 */
|
||||
static const char *sensor_location[3] = {NULL, NULL, NULL};
|
||||
static const char *sensor_location[3];
|
||||
|
||||
static int limit_adjust = 0;
|
||||
static int limit_adjust;
|
||||
static int fan_speed = -1;
|
||||
static int verbose = 0;
|
||||
static int verbose;
|
||||
|
||||
MODULE_AUTHOR("Colin Leroy <colin@colino.net>");
|
||||
MODULE_DESCRIPTION("Driver for ADT746x thermostat in iBook G4 and "
|
||||
|
|
|
|||
|
|
@ -86,7 +86,7 @@ static int data_index;
|
|||
#ifdef CONFIG_PPC
|
||||
static struct device_node *vias;
|
||||
#endif
|
||||
static int cuda_fully_inited = 0;
|
||||
static int cuda_fully_inited;
|
||||
|
||||
#ifdef CONFIG_ADB
|
||||
static int cuda_probe(void);
|
||||
|
|
|
|||
|
|
@ -107,10 +107,10 @@ static enum macii_state {
|
|||
awaiting_reply
|
||||
} macii_state;
|
||||
|
||||
static int need_poll = 0;
|
||||
static int command_byte = 0;
|
||||
static int last_reply = 0;
|
||||
static int last_active = 0;
|
||||
static int need_poll;
|
||||
static int command_byte;
|
||||
static int last_reply;
|
||||
static int last_active;
|
||||
|
||||
static struct adb_request *current_req;
|
||||
static struct adb_request *last_req;
|
||||
|
|
@ -124,7 +124,7 @@ static int first_byte;
|
|||
static int prefix_len;
|
||||
static int status = ST_IDLE|TREQ;
|
||||
static int last_status;
|
||||
static int driver_running = 0;
|
||||
static int driver_running;
|
||||
|
||||
/* debug level 10 required for ADB logging (should be && debug_adb, ideally) */
|
||||
|
||||
|
|
|
|||
|
|
@ -63,10 +63,10 @@ static volatile unsigned char *via;
|
|||
|
||||
#undef DEBUG_MACIISI_ADB
|
||||
|
||||
static struct adb_request* current_req = NULL;
|
||||
static struct adb_request* last_req = NULL;
|
||||
static struct adb_request* current_req;
|
||||
static struct adb_request* last_req;
|
||||
static unsigned char maciisi_rbuf[16];
|
||||
static unsigned char *reply_ptr = NULL;
|
||||
static unsigned char *reply_ptr;
|
||||
static int data_index;
|
||||
static int reading_reply;
|
||||
static int reply_len;
|
||||
|
|
|
|||
|
|
@ -141,13 +141,13 @@ static volatile int adb_int_pending;
|
|||
static volatile int disable_poll;
|
||||
static struct device_node *vias;
|
||||
static int pmu_kind = PMU_UNKNOWN;
|
||||
static int pmu_fully_inited = 0;
|
||||
static int pmu_fully_inited;
|
||||
static int pmu_has_adb;
|
||||
static struct device_node *gpio_node;
|
||||
static unsigned char __iomem *gpio_reg = NULL;
|
||||
static unsigned char __iomem *gpio_reg;
|
||||
static int gpio_irq = NO_IRQ;
|
||||
static int gpio_irq_enabled = -1;
|
||||
static volatile int pmu_suspended = 0;
|
||||
static volatile int pmu_suspended;
|
||||
static spinlock_t pmu_lock;
|
||||
static u8 pmu_intr_mask;
|
||||
static int pmu_version;
|
||||
|
|
@ -169,7 +169,7 @@ static int option_server_mode;
|
|||
|
||||
int pmu_battery_count;
|
||||
int pmu_cur_battery;
|
||||
unsigned int pmu_power_flags;
|
||||
unsigned int pmu_power_flags = PMU_PWR_AC_PRESENT;
|
||||
struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES];
|
||||
static int query_batt_timer = BATTERY_POLLING_COUNT;
|
||||
static struct adb_request batt_req;
|
||||
|
|
@ -180,7 +180,7 @@ int asleep;
|
|||
BLOCKING_NOTIFIER_HEAD(sleep_notifier_list);
|
||||
|
||||
#ifdef CONFIG_ADB
|
||||
static int adb_dev_map = 0;
|
||||
static int adb_dev_map;
|
||||
static int pmu_adb_flags;
|
||||
|
||||
static int pmu_probe(void);
|
||||
|
|
@ -2776,7 +2776,7 @@ pmu_polled_request(struct adb_request *req)
|
|||
|
||||
#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
|
||||
|
||||
static int pmu_sys_suspended = 0;
|
||||
static int pmu_sys_suspended;
|
||||
|
||||
static int pmu_sys_suspend(struct sys_device *sysdev, pm_message_t state)
|
||||
{
|
||||
|
|
@ -2816,7 +2816,6 @@ static struct sysdev_class pmu_sysclass = {
|
|||
};
|
||||
|
||||
static struct sys_device device_pmu = {
|
||||
.id = 0,
|
||||
.cls = &pmu_sysclass,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -96,10 +96,10 @@ static int data_index;
|
|||
static int data_len;
|
||||
static int adb_int_pending;
|
||||
static int pmu_adb_flags;
|
||||
static int adb_dev_map = 0;
|
||||
static int adb_dev_map;
|
||||
static struct adb_request bright_req_1, bright_req_2, bright_req_3;
|
||||
static int pmu_kind = PMU_UNKNOWN;
|
||||
static int pmu_fully_inited = 0;
|
||||
static int pmu_fully_inited;
|
||||
|
||||
int asleep;
|
||||
BLOCKING_NOTIFIER_HEAD(sleep_notifier_list);
|
||||
|
|
|
|||
|
|
@ -999,4 +999,14 @@ config SERIAL_NETX_CONSOLE
|
|||
If you have enabled the serial port on the Motorola IMX
|
||||
CPU you can make it the console by answering Y to this option.
|
||||
|
||||
config SERIAL_OF_PLATFORM
|
||||
tristate "Serial port on Open Firmware platform bus"
|
||||
depends on PPC_OF
|
||||
depends on SERIAL_8250
|
||||
help
|
||||
If you have a PowerPC based system that has serial ports
|
||||
on a platform specific bus, you should enable this option.
|
||||
Currently, only 8250 compatible ports are supported, but
|
||||
others can easily be added.
|
||||
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -58,3 +58,4 @@ obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
|
|||
obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
|
||||
obj-$(CONFIG_SERIAL_UARTLITE) += uartlite.o
|
||||
obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
|
||||
obj-$(CONFIG_SERIAL_OF_PLATFORM) += of_serial.o
|
||||
|
|
|
|||
|
|
@ -127,8 +127,7 @@ static irqreturn_t mpc52xx_uart_int(int irq,void *dev_id);
|
|||
|
||||
#if defined(CONFIG_PPC_MERGE)
|
||||
static struct of_device_id mpc52xx_uart_of_match[] = {
|
||||
{ .type = "serial", .compatible = "mpc52xx-psc-uart", },
|
||||
{ .type = "serial", .compatible = "mpc5200-psc", }, /* Efika only! */
|
||||
{ .type = "serial", .compatible = "mpc5200-psc-uart", },
|
||||
{},
|
||||
};
|
||||
#endif
|
||||
|
|
@ -1068,7 +1067,7 @@ mpc52xx_uart_of_enumerate(void)
|
|||
continue;
|
||||
|
||||
/* Is a particular device number requested? */
|
||||
devno = get_property(np, "device_no", NULL);
|
||||
devno = get_property(np, "port-number", NULL);
|
||||
mpc52xx_uart_of_assign(of_node_get(np), devno ? *devno : -1);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -0,0 +1,143 @@
|
|||
/*
|
||||
* Serial Port driver for Open Firmware platform devices
|
||||
*
|
||||
* Copyright (C) 2006 Arnd Bergmann <arnd@arndb.de>, IBM Corp.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License
|
||||
* as published by the Free Software Foundation; either version
|
||||
* 2 of the License, or (at your option) any later version.
|
||||
*
|
||||
*/
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/serial_core.h>
|
||||
#include <linux/serial_8250.h>
|
||||
|
||||
#include <asm/of_platform.h>
|
||||
#include <asm/prom.h>
|
||||
|
||||
/*
|
||||
* Fill a struct uart_port for a given device node
|
||||
*/
|
||||
static int __devinit of_platform_serial_setup(struct of_device *ofdev,
|
||||
int type, struct uart_port *port)
|
||||
{
|
||||
struct resource resource;
|
||||
struct device_node *np = ofdev->node;
|
||||
const unsigned int *clk, *spd;
|
||||
int ret;
|
||||
|
||||
memset(port, 0, sizeof *port);
|
||||
spd = get_property(np, "current-speed", NULL);
|
||||
clk = get_property(np, "clock-frequency", NULL);
|
||||
if (!clk) {
|
||||
dev_warn(&ofdev->dev, "no clock-frequency property set\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
ret = of_address_to_resource(np, 0, &resource);
|
||||
if (ret) {
|
||||
dev_warn(&ofdev->dev, "invalid address\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
spin_lock_init(&port->lock);
|
||||
port->mapbase = resource.start;
|
||||
port->irq = irq_of_parse_and_map(np, 0);
|
||||
port->iotype = UPIO_MEM;
|
||||
port->type = type;
|
||||
port->uartclk = *clk;
|
||||
port->flags = UPF_SHARE_IRQ | UPF_BOOT_AUTOCONF | UPF_IOREMAP;
|
||||
port->dev = &ofdev->dev;
|
||||
port->custom_divisor = *clk / (16 * (*spd));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* Try to register a serial port
|
||||
*/
|
||||
static int __devinit of_platform_serial_probe(struct of_device *ofdev,
|
||||
const struct of_device_id *id)
|
||||
{
|
||||
struct uart_port port;
|
||||
int port_type;
|
||||
int ret;
|
||||
|
||||
if (of_find_property(ofdev->node, "used-by-rtas", NULL))
|
||||
return -EBUSY;
|
||||
|
||||
port_type = (unsigned long)id->data;
|
||||
ret = of_platform_serial_setup(ofdev, port_type, &port);
|
||||
if (ret)
|
||||
goto out;
|
||||
|
||||
switch (port_type) {
|
||||
case PORT_UNKNOWN:
|
||||
dev_info(&ofdev->dev, "Unknown serial port found, "
|
||||
"attempting to use 8250 driver\n");
|
||||
/* fallthrough */
|
||||
case PORT_8250 ... PORT_MAX_8250:
|
||||
ret = serial8250_register_port(&port);
|
||||
break;
|
||||
default:
|
||||
/* need to add code for these */
|
||||
ret = -ENODEV;
|
||||
break;
|
||||
}
|
||||
if (ret < 0)
|
||||
goto out;
|
||||
|
||||
ofdev->dev.driver_data = (void *)(unsigned long)ret;
|
||||
return 0;
|
||||
out:
|
||||
irq_dispose_mapping(port.irq);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/*
|
||||
* Release a line
|
||||
*/
|
||||
static int of_platform_serial_remove(struct of_device *ofdev)
|
||||
{
|
||||
int line = (unsigned long)ofdev->dev.driver_data;
|
||||
serial8250_unregister_port(line);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* A few common types, add more as needed.
|
||||
*/
|
||||
static struct of_device_id __devinitdata of_platform_serial_table[] = {
|
||||
{ .type = "serial", .compatible = "ns8250", .data = (void *)PORT_8250, },
|
||||
{ .type = "serial", .compatible = "ns16450", .data = (void *)PORT_16450, },
|
||||
{ .type = "serial", .compatible = "ns16550", .data = (void *)PORT_16550, },
|
||||
{ .type = "serial", .compatible = "ns16750", .data = (void *)PORT_16750, },
|
||||
{ .type = "serial", .data = (void *)PORT_UNKNOWN, },
|
||||
{ /* end of list */ },
|
||||
};
|
||||
|
||||
static struct of_platform_driver __devinitdata of_platform_serial_driver = {
|
||||
.owner = THIS_MODULE,
|
||||
.name = "of_serial",
|
||||
.probe = of_platform_serial_probe,
|
||||
.remove = of_platform_serial_remove,
|
||||
.match_table = of_platform_serial_table,
|
||||
};
|
||||
|
||||
static int __init of_platform_serial_init(void)
|
||||
{
|
||||
return of_register_platform_driver(&of_platform_serial_driver);
|
||||
}
|
||||
module_init(of_platform_serial_init);
|
||||
|
||||
static void __exit of_platform_serial_exit(void)
|
||||
{
|
||||
return of_unregister_platform_driver(&of_platform_serial_driver);
|
||||
};
|
||||
module_exit(of_platform_serial_exit);
|
||||
|
||||
MODULE_AUTHOR("Arnd Bergmann <arnd@arndb.de>");
|
||||
MODULE_LICENSE("GPL");
|
||||
MODULE_DESCRIPTION("Serial Port driver for Open Firmware platform devices");
|
||||
|
|
@ -53,6 +53,11 @@
|
|||
#define CBE_PM_CTR_POLARITY 0x01000000
|
||||
#define CBE_PM_CTR_COUNT_CYCLES 0x00800000
|
||||
#define CBE_PM_CTR_ENABLE 0x00400000
|
||||
#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26)
|
||||
#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25)
|
||||
#define PM07_CTR_POLARITY(x) (((x) & 1) << 24)
|
||||
#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23)
|
||||
#define PM07_CTR_ENABLE(x) (((x) & 1) << 22)
|
||||
|
||||
/* Macros for the pm_status register. */
|
||||
#define CBE_PM_CTR_OVERFLOW_INTR(ctr) (1 << (31 - ((ctr) & 7)))
|
||||
|
|
@ -89,8 +94,7 @@ extern void cbe_read_trace_buffer(u32 cpu, u64 *buf);
|
|||
|
||||
extern void cbe_enable_pm_interrupts(u32 cpu, u32 thread, u32 mask);
|
||||
extern void cbe_disable_pm_interrupts(u32 cpu);
|
||||
extern u32 cbe_query_pm_interrupts(u32 cpu);
|
||||
extern u32 cbe_clear_pm_interrupts(u32 cpu);
|
||||
extern u32 cbe_get_and_clear_pm_interrupts(u32 cpu);
|
||||
extern void cbe_sync_irq(int node);
|
||||
|
||||
/* Utility functions, macros */
|
||||
|
|
@ -103,11 +107,4 @@ extern u32 cbe_get_hw_thread_id(int cpu);
|
|||
#define CBE_COUNT_PROBLEM_MODE 2
|
||||
#define CBE_COUNT_ALL_MODES 3
|
||||
|
||||
/* Macros for the pm07_control registers. */
|
||||
#define PM07_CTR_INPUT_MUX(x) (((x) & 0x3F) << 26)
|
||||
#define PM07_CTR_INPUT_CONTROL(x) (((x) & 1) << 25)
|
||||
#define PM07_CTR_POLARITY(x) (((x) & 1) << 24)
|
||||
#define PM07_CTR_COUNT_CYCLES(x) (((x) & 1) << 23)
|
||||
#define PM07_CTR_ENABLE(x) (((x) & 1) << 22)
|
||||
|
||||
#endif /* __ASM_CELL_PMU_H__ */
|
||||
|
|
|
|||
|
|
@ -17,28 +17,115 @@
|
|||
#define fd_outb(value,port) outb_p(value,port)
|
||||
|
||||
#define fd_enable_dma() enable_dma(FLOPPY_DMA)
|
||||
#define fd_disable_dma() disable_dma(FLOPPY_DMA)
|
||||
#define fd_request_dma() request_dma(FLOPPY_DMA, "floppy")
|
||||
#define fd_free_dma() free_dma(FLOPPY_DMA)
|
||||
#define fd_disable_dma() fd_ops->_disable_dma(FLOPPY_DMA)
|
||||
#define fd_free_dma() fd_ops->_free_dma(FLOPPY_DMA)
|
||||
#define fd_clear_dma_ff() clear_dma_ff(FLOPPY_DMA)
|
||||
#define fd_set_dma_mode(mode) set_dma_mode(FLOPPY_DMA, mode)
|
||||
#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA, count)
|
||||
#define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA)
|
||||
#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
|
||||
#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
|
||||
#define fd_cacheflush(addr,size) /* nothing */
|
||||
#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt, \
|
||||
IRQF_DISABLED, "floppy", NULL)
|
||||
#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
|
||||
#include <linux/pci.h>
|
||||
#include <asm/ppc-pci.h> /* for ppc64_isabridge_dev */
|
||||
|
||||
#define fd_dma_setup(addr,size,mode,io) powerpc_fd_dma_setup(addr,size,mode,io)
|
||||
#define fd_dma_setup(addr,size,mode,io) fd_ops->_dma_setup(addr,size,mode,io)
|
||||
|
||||
static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size,
|
||||
int mode, int io)
|
||||
static int fd_request_dma(void);
|
||||
|
||||
struct fd_dma_ops {
|
||||
void (*_disable_dma)(unsigned int dmanr);
|
||||
void (*_free_dma)(unsigned int dmanr);
|
||||
int (*_get_dma_residue)(unsigned int dummy);
|
||||
int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
|
||||
};
|
||||
|
||||
static int virtual_dma_count;
|
||||
static int virtual_dma_residue;
|
||||
static char *virtual_dma_addr;
|
||||
static int virtual_dma_mode;
|
||||
static int doing_vdma;
|
||||
static struct fd_dma_ops *fd_ops;
|
||||
|
||||
static irqreturn_t floppy_hardint(int irq, void *dev_id)
|
||||
{
|
||||
unsigned char st;
|
||||
int lcount;
|
||||
char *lptr;
|
||||
|
||||
if (!doing_vdma)
|
||||
return floppy_interrupt(irq, dev_id);
|
||||
|
||||
|
||||
st = 1;
|
||||
for (lcount=virtual_dma_count, lptr=virtual_dma_addr;
|
||||
lcount; lcount--, lptr++) {
|
||||
st=inb(virtual_dma_port+4) & 0xa0 ;
|
||||
if (st != 0xa0)
|
||||
break;
|
||||
if (virtual_dma_mode)
|
||||
outb_p(*lptr, virtual_dma_port+5);
|
||||
else
|
||||
*lptr = inb_p(virtual_dma_port+5);
|
||||
}
|
||||
virtual_dma_count = lcount;
|
||||
virtual_dma_addr = lptr;
|
||||
st = inb(virtual_dma_port+4);
|
||||
|
||||
if (st == 0x20)
|
||||
return IRQ_HANDLED;
|
||||
if (!(st & 0x20)) {
|
||||
virtual_dma_residue += virtual_dma_count;
|
||||
virtual_dma_count=0;
|
||||
doing_vdma = 0;
|
||||
floppy_interrupt(irq, dev_id);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static void vdma_disable_dma(unsigned int dummy)
|
||||
{
|
||||
doing_vdma = 0;
|
||||
virtual_dma_residue += virtual_dma_count;
|
||||
virtual_dma_count=0;
|
||||
}
|
||||
|
||||
static void vdma_nop(unsigned int dummy)
|
||||
{
|
||||
}
|
||||
|
||||
|
||||
static int vdma_get_dma_residue(unsigned int dummy)
|
||||
{
|
||||
return virtual_dma_count + virtual_dma_residue;
|
||||
}
|
||||
|
||||
|
||||
static int fd_request_irq(void)
|
||||
{
|
||||
if (can_use_virtual_dma)
|
||||
return request_irq(FLOPPY_IRQ, floppy_hardint,
|
||||
IRQF_DISABLED, "floppy", NULL);
|
||||
else
|
||||
return request_irq(FLOPPY_IRQ, floppy_interrupt,
|
||||
IRQF_DISABLED, "floppy", NULL);
|
||||
}
|
||||
|
||||
static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
|
||||
{
|
||||
doing_vdma = 1;
|
||||
virtual_dma_port = io;
|
||||
virtual_dma_mode = (mode == DMA_MODE_WRITE);
|
||||
virtual_dma_addr = addr;
|
||||
virtual_dma_count = size;
|
||||
virtual_dma_residue = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
|
||||
{
|
||||
static unsigned long prev_size;
|
||||
static dma_addr_t bus_addr = 0;
|
||||
|
|
@ -46,6 +133,7 @@ static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size,
|
|||
static int prev_dir;
|
||||
int dir;
|
||||
|
||||
doing_vdma = 0;
|
||||
dir = (mode == DMA_MODE_READ) ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE;
|
||||
|
||||
if (bus_addr
|
||||
|
|
@ -74,11 +162,32 @@ static __inline__ int powerpc_fd_dma_setup(char *addr, unsigned long size,
|
|||
return 0;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
__inline__ void virtual_dma_init(void)
|
||||
static struct fd_dma_ops real_dma_ops =
|
||||
{
|
||||
/* Nothing to do on PowerPC */
|
||||
._disable_dma = disable_dma,
|
||||
._free_dma = free_dma,
|
||||
._get_dma_residue = get_dma_residue,
|
||||
._dma_setup = hard_dma_setup
|
||||
};
|
||||
|
||||
static struct fd_dma_ops virt_dma_ops =
|
||||
{
|
||||
._disable_dma = vdma_disable_dma,
|
||||
._free_dma = vdma_nop,
|
||||
._get_dma_residue = vdma_get_dma_residue,
|
||||
._dma_setup = vdma_dma_setup
|
||||
};
|
||||
|
||||
static int fd_request_dma()
|
||||
{
|
||||
if (can_use_virtual_dma & 1) {
|
||||
fd_ops = &virt_dma_ops;
|
||||
return 0;
|
||||
}
|
||||
else {
|
||||
fd_ops = &real_dma_ops;
|
||||
return request_dma(FLOPPY_DMA, "floppy");
|
||||
}
|
||||
}
|
||||
|
||||
static int FDC1 = 0x3f0;
|
||||
|
|
|
|||
|
|
@ -129,7 +129,6 @@ struct spu {
|
|||
struct spu_runqueue *rq;
|
||||
unsigned long long timestamp;
|
||||
pid_t pid;
|
||||
int prio;
|
||||
int class_0_pending;
|
||||
spinlock_t register_lock;
|
||||
|
||||
|
|
|
|||
|
|
@ -305,3 +305,4 @@ SYSCALL_SPU(faccessat)
|
|||
COMPAT_SYS_SPU(get_robust_list)
|
||||
COMPAT_SYS_SPU(set_robust_list)
|
||||
COMPAT_SYS(move_pages)
|
||||
SYSCALL_SPU(getcpu)
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue