mailbox: apple: Add driver for Apple mailboxes
Apple SoCs such as the M1 come with various co-processors. Mailboxes are used to communicate with those. This driver adds support for two variants of those mailboxes. Signed-off-by: Sven Peter <sven@svenpeter.dev> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
This commit is contained in:
Sven Peter
Jassi Brar
parent
29848f309e
commit
f89f9c56e7
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@ -8,6 +8,18 @@ menuconfig MAILBOX
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if MAILBOX
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if MAILBOX
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config APPLE_MAILBOX
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tristate "Apple Mailbox driver"
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depends on ARCH_APPLE || (ARM64 && COMPILE_TEST)
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default ARCH_APPLE
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help
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Apple SoCs have various co-processors required for certain
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peripherals to work (NVMe, display controller, etc.). This
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driver adds support for the mailbox controller used to
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communicate with those.
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Say Y here if you have a Apple SoC.
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config ARM_MHU
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config ARM_MHU
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tristate "ARM MHU Mailbox"
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tristate "ARM MHU Mailbox"
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depends on ARM_AMBA
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depends on ARM_AMBA
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@ -58,3 +58,5 @@ obj-$(CONFIG_SUN6I_MSGBOX) += sun6i-msgbox.o
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obj-$(CONFIG_SPRD_MBOX) += sprd-mailbox.o
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obj-$(CONFIG_SPRD_MBOX) += sprd-mailbox.o
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obj-$(CONFIG_QCOM_IPCC) += qcom-ipcc.o
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obj-$(CONFIG_QCOM_IPCC) += qcom-ipcc.o
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obj-$(CONFIG_APPLE_MAILBOX) += apple-mailbox.o
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@ -0,0 +1,384 @@
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// SPDX-License-Identifier: GPL-2.0-only OR MIT
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/*
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* Apple mailbox driver
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*
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* Copyright (C) 2021 The Asahi Linux Contributors
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*
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* This driver adds support for two mailbox variants (called ASC and M3 by
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* Apple) found in Apple SoCs such as the M1. It consists of two FIFOs used to
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* exchange 64+32 bit messages between the main CPU and a co-processor.
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* Various coprocessors implement different IPC protocols based on these simple
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* messages and shared memory buffers.
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*
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* Both the main CPU and the co-processor see the same set of registers but
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* the first FIFO (A2I) is always used to transfer messages from the application
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* processor (us) to the I/O processor and the second one (I2A) for the
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* other direction.
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*/
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#include <linux/apple-mailbox.h>
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#include <linux/device.h>
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#include <linux/gfp.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/mailbox_controller.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/types.h>
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#define APPLE_ASC_MBOX_CONTROL_FULL BIT(16)
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#define APPLE_ASC_MBOX_CONTROL_EMPTY BIT(17)
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#define APPLE_ASC_MBOX_A2I_CONTROL 0x110
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#define APPLE_ASC_MBOX_A2I_SEND0 0x800
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#define APPLE_ASC_MBOX_A2I_SEND1 0x808
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#define APPLE_ASC_MBOX_A2I_RECV0 0x810
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#define APPLE_ASC_MBOX_A2I_RECV1 0x818
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#define APPLE_ASC_MBOX_I2A_CONTROL 0x114
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#define APPLE_ASC_MBOX_I2A_SEND0 0x820
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#define APPLE_ASC_MBOX_I2A_SEND1 0x828
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#define APPLE_ASC_MBOX_I2A_RECV0 0x830
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#define APPLE_ASC_MBOX_I2A_RECV1 0x838
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#define APPLE_M3_MBOX_CONTROL_FULL BIT(16)
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#define APPLE_M3_MBOX_CONTROL_EMPTY BIT(17)
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#define APPLE_M3_MBOX_A2I_CONTROL 0x50
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#define APPLE_M3_MBOX_A2I_SEND0 0x60
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#define APPLE_M3_MBOX_A2I_SEND1 0x68
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#define APPLE_M3_MBOX_A2I_RECV0 0x70
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#define APPLE_M3_MBOX_A2I_RECV1 0x78
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#define APPLE_M3_MBOX_I2A_CONTROL 0x80
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#define APPLE_M3_MBOX_I2A_SEND0 0x90
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#define APPLE_M3_MBOX_I2A_SEND1 0x98
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#define APPLE_M3_MBOX_I2A_RECV0 0xa0
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#define APPLE_M3_MBOX_I2A_RECV1 0xa8
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#define APPLE_M3_MBOX_IRQ_ENABLE 0x48
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#define APPLE_M3_MBOX_IRQ_ACK 0x4c
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#define APPLE_M3_MBOX_IRQ_A2I_EMPTY BIT(0)
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#define APPLE_M3_MBOX_IRQ_A2I_NOT_EMPTY BIT(1)
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#define APPLE_M3_MBOX_IRQ_I2A_EMPTY BIT(2)
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#define APPLE_M3_MBOX_IRQ_I2A_NOT_EMPTY BIT(3)
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#define APPLE_MBOX_MSG1_OUTCNT GENMASK(56, 52)
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#define APPLE_MBOX_MSG1_INCNT GENMASK(51, 48)
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#define APPLE_MBOX_MSG1_OUTPTR GENMASK(47, 44)
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#define APPLE_MBOX_MSG1_INPTR GENMASK(43, 40)
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#define APPLE_MBOX_MSG1_MSG GENMASK(31, 0)
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struct apple_mbox_hw {
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unsigned int control_full;
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unsigned int control_empty;
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unsigned int a2i_control;
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unsigned int a2i_send0;
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unsigned int a2i_send1;
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unsigned int i2a_control;
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unsigned int i2a_recv0;
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unsigned int i2a_recv1;
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bool has_irq_controls;
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unsigned int irq_enable;
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unsigned int irq_ack;
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unsigned int irq_bit_recv_not_empty;
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unsigned int irq_bit_send_empty;
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};
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struct apple_mbox {
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void __iomem *regs;
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const struct apple_mbox_hw *hw;
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int irq_recv_not_empty;
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int irq_send_empty;
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struct mbox_chan chan;
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struct device *dev;
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struct mbox_controller controller;
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};
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static const struct of_device_id apple_mbox_of_match[];
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static bool apple_mbox_hw_can_send(struct apple_mbox *apple_mbox)
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{
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u32 mbox_ctrl =
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readl_relaxed(apple_mbox->regs + apple_mbox->hw->a2i_control);
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return !(mbox_ctrl & apple_mbox->hw->control_full);
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}
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static int apple_mbox_hw_send(struct apple_mbox *apple_mbox,
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struct apple_mbox_msg *msg)
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{
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if (!apple_mbox_hw_can_send(apple_mbox))
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return -EBUSY;
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dev_dbg(apple_mbox->dev, "> TX %016llx %08x\n", msg->msg0, msg->msg1);
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writeq_relaxed(msg->msg0, apple_mbox->regs + apple_mbox->hw->a2i_send0);
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writeq_relaxed(FIELD_PREP(APPLE_MBOX_MSG1_MSG, msg->msg1),
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apple_mbox->regs + apple_mbox->hw->a2i_send1);
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return 0;
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}
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static bool apple_mbox_hw_can_recv(struct apple_mbox *apple_mbox)
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{
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u32 mbox_ctrl =
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readl_relaxed(apple_mbox->regs + apple_mbox->hw->i2a_control);
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return !(mbox_ctrl & apple_mbox->hw->control_empty);
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}
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static int apple_mbox_hw_recv(struct apple_mbox *apple_mbox,
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struct apple_mbox_msg *msg)
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{
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if (!apple_mbox_hw_can_recv(apple_mbox))
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return -ENOMSG;
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msg->msg0 = readq_relaxed(apple_mbox->regs + apple_mbox->hw->i2a_recv0);
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msg->msg1 = FIELD_GET(
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APPLE_MBOX_MSG1_MSG,
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readq_relaxed(apple_mbox->regs + apple_mbox->hw->i2a_recv1));
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dev_dbg(apple_mbox->dev, "< RX %016llx %08x\n", msg->msg0, msg->msg1);
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return 0;
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}
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static int apple_mbox_chan_send_data(struct mbox_chan *chan, void *data)
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{
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struct apple_mbox *apple_mbox = chan->con_priv;
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struct apple_mbox_msg *msg = data;
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int ret;
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ret = apple_mbox_hw_send(apple_mbox, msg);
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if (ret)
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return ret;
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/*
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* The interrupt is level triggered and will keep firing as long as the
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* FIFO is empty. It will also keep firing if the FIFO was empty
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* at any point in the past until it has been acknowledged at the
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* mailbox level. By acknowledging it here we can ensure that we will
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* only get the interrupt once the FIFO has been cleared again.
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* If the FIFO is already empty before the ack it will fire again
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* immediately after the ack.
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*/
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if (apple_mbox->hw->has_irq_controls) {
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writel_relaxed(apple_mbox->hw->irq_bit_send_empty,
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apple_mbox->regs + apple_mbox->hw->irq_ack);
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}
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enable_irq(apple_mbox->irq_send_empty);
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return 0;
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}
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static irqreturn_t apple_mbox_send_empty_irq(int irq, void *data)
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{
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struct apple_mbox *apple_mbox = data;
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/*
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* We don't need to acknowledge the interrupt at the mailbox level
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* here even if supported by the hardware. It will keep firing but that
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* doesn't matter since it's disabled at the main interrupt controller.
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* apple_mbox_chan_send_data will acknowledge it before enabling
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* it at the main controller again.
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*/
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disable_irq_nosync(apple_mbox->irq_send_empty);
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mbox_chan_txdone(&apple_mbox->chan, 0);
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return IRQ_HANDLED;
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}
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static irqreturn_t apple_mbox_recv_irq(int irq, void *data)
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{
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struct apple_mbox *apple_mbox = data;
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struct apple_mbox_msg msg;
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while (apple_mbox_hw_recv(apple_mbox, &msg) == 0)
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mbox_chan_received_data(&apple_mbox->chan, (void *)&msg);
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/*
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* The interrupt will keep firing even if there are no more messages
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* unless we also acknowledge it at the mailbox level here.
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* There's no race if a message comes in between the check in the while
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* loop above and the ack below: If a new messages arrives inbetween
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* those two the interrupt will just fire again immediately after the
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* ack since it's level triggered.
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*/
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if (apple_mbox->hw->has_irq_controls) {
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writel_relaxed(apple_mbox->hw->irq_bit_recv_not_empty,
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apple_mbox->regs + apple_mbox->hw->irq_ack);
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}
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return IRQ_HANDLED;
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}
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static int apple_mbox_chan_startup(struct mbox_chan *chan)
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{
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struct apple_mbox *apple_mbox = chan->con_priv;
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/*
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* Only some variants of this mailbox HW provide interrupt control
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* at the mailbox level. We therefore need to handle enabling/disabling
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* interrupts at the main interrupt controller anyway for hardware that
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* doesn't. Just always keep the interrupts we care about enabled at
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* the mailbox level so that both hardware revisions behave almost
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* the same.
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*/
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if (apple_mbox->hw->has_irq_controls) {
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writel_relaxed(apple_mbox->hw->irq_bit_recv_not_empty |
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apple_mbox->hw->irq_bit_send_empty,
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apple_mbox->regs + apple_mbox->hw->irq_enable);
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}
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enable_irq(apple_mbox->irq_recv_not_empty);
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return 0;
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}
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static void apple_mbox_chan_shutdown(struct mbox_chan *chan)
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{
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struct apple_mbox *apple_mbox = chan->con_priv;
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disable_irq(apple_mbox->irq_recv_not_empty);
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}
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static const struct mbox_chan_ops apple_mbox_ops = {
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.send_data = apple_mbox_chan_send_data,
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.startup = apple_mbox_chan_startup,
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.shutdown = apple_mbox_chan_shutdown,
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};
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static struct mbox_chan *apple_mbox_of_xlate(struct mbox_controller *mbox,
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const struct of_phandle_args *args)
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{
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if (args->args_count != 0)
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return ERR_PTR(-EINVAL);
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return &mbox->chans[0];
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}
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static int apple_mbox_probe(struct platform_device *pdev)
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{
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int ret;
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const struct of_device_id *match;
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char *irqname;
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struct apple_mbox *mbox;
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struct device *dev = &pdev->dev;
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match = of_match_node(apple_mbox_of_match, pdev->dev.of_node);
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if (!match)
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return -EINVAL;
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if (!match->data)
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return -EINVAL;
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mbox = devm_kzalloc(dev, sizeof(*mbox), GFP_KERNEL);
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if (!mbox)
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return -ENOMEM;
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platform_set_drvdata(pdev, mbox);
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mbox->dev = dev;
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mbox->regs = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(mbox->regs))
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return PTR_ERR(mbox->regs);
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mbox->hw = match->data;
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mbox->irq_recv_not_empty =
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platform_get_irq_byname(pdev, "recv-not-empty");
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if (mbox->irq_recv_not_empty < 0)
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return -ENODEV;
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mbox->irq_send_empty = platform_get_irq_byname(pdev, "send-empty");
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if (mbox->irq_send_empty < 0)
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return -ENODEV;
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mbox->controller.dev = mbox->dev;
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mbox->controller.num_chans = 1;
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mbox->controller.chans = &mbox->chan;
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mbox->controller.ops = &apple_mbox_ops;
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mbox->controller.txdone_irq = true;
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mbox->controller.of_xlate = apple_mbox_of_xlate;
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mbox->chan.con_priv = mbox;
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irqname = devm_kasprintf(dev, GFP_KERNEL, "%s-recv", dev_name(dev));
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if (!irqname)
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return -ENOMEM;
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ret = devm_request_threaded_irq(dev, mbox->irq_recv_not_empty, NULL,
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apple_mbox_recv_irq,
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IRQF_NO_AUTOEN | IRQF_ONESHOT, irqname,
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mbox);
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if (ret)
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return ret;
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irqname = devm_kasprintf(dev, GFP_KERNEL, "%s-send", dev_name(dev));
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if (!irqname)
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return -ENOMEM;
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ret = devm_request_irq(dev, mbox->irq_send_empty,
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apple_mbox_send_empty_irq, IRQF_NO_AUTOEN,
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irqname, mbox);
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if (ret)
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return ret;
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return devm_mbox_controller_register(dev, &mbox->controller);
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}
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|
|
||||||
|
static const struct apple_mbox_hw apple_mbox_asc_hw = {
|
||||||
|
.control_full = APPLE_ASC_MBOX_CONTROL_FULL,
|
||||||
|
.control_empty = APPLE_ASC_MBOX_CONTROL_EMPTY,
|
||||||
|
|
||||||
|
.a2i_control = APPLE_ASC_MBOX_A2I_CONTROL,
|
||||||
|
.a2i_send0 = APPLE_ASC_MBOX_A2I_SEND0,
|
||||||
|
.a2i_send1 = APPLE_ASC_MBOX_A2I_SEND1,
|
||||||
|
|
||||||
|
.i2a_control = APPLE_ASC_MBOX_I2A_CONTROL,
|
||||||
|
.i2a_recv0 = APPLE_ASC_MBOX_I2A_RECV0,
|
||||||
|
.i2a_recv1 = APPLE_ASC_MBOX_I2A_RECV1,
|
||||||
|
|
||||||
|
.has_irq_controls = false,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct apple_mbox_hw apple_mbox_m3_hw = {
|
||||||
|
.control_full = APPLE_M3_MBOX_CONTROL_FULL,
|
||||||
|
.control_empty = APPLE_M3_MBOX_CONTROL_EMPTY,
|
||||||
|
|
||||||
|
.a2i_control = APPLE_M3_MBOX_A2I_CONTROL,
|
||||||
|
.a2i_send0 = APPLE_M3_MBOX_A2I_SEND0,
|
||||||
|
.a2i_send1 = APPLE_M3_MBOX_A2I_SEND1,
|
||||||
|
|
||||||
|
.i2a_control = APPLE_M3_MBOX_I2A_CONTROL,
|
||||||
|
.i2a_recv0 = APPLE_M3_MBOX_I2A_RECV0,
|
||||||
|
.i2a_recv1 = APPLE_M3_MBOX_I2A_RECV1,
|
||||||
|
|
||||||
|
.has_irq_controls = true,
|
||||||
|
.irq_enable = APPLE_M3_MBOX_IRQ_ENABLE,
|
||||||
|
.irq_ack = APPLE_M3_MBOX_IRQ_ACK,
|
||||||
|
.irq_bit_recv_not_empty = APPLE_M3_MBOX_IRQ_I2A_NOT_EMPTY,
|
||||||
|
.irq_bit_send_empty = APPLE_M3_MBOX_IRQ_A2I_EMPTY,
|
||||||
|
};
|
||||||
|
|
||||||
|
static const struct of_device_id apple_mbox_of_match[] = {
|
||||||
|
{ .compatible = "apple,t8103-asc-mailbox", .data = &apple_mbox_asc_hw },
|
||||||
|
{ .compatible = "apple,t8103-m3-mailbox", .data = &apple_mbox_m3_hw },
|
||||||
|
{}
|
||||||
|
};
|
||||||
|
MODULE_DEVICE_TABLE(of, apple_mbox_of_match);
|
||||||
|
|
||||||
|
static struct platform_driver apple_mbox_driver = {
|
||||||
|
.driver = {
|
||||||
|
.name = "apple-mailbox",
|
||||||
|
.of_match_table = apple_mbox_of_match,
|
||||||
|
},
|
||||||
|
.probe = apple_mbox_probe,
|
||||||
|
};
|
||||||
|
module_platform_driver(apple_mbox_driver);
|
||||||
|
|
||||||
|
MODULE_LICENSE("Dual MIT/GPL");
|
||||||
|
MODULE_AUTHOR("Sven Peter <sven@svenpeter.dev>");
|
||||||
|
MODULE_DESCRIPTION("Apple Mailbox driver");
|
||||||
|
|
@ -0,0 +1,19 @@
|
||||||
|
/* SPDX-License-Identifier: GPL-2.0-only OR MIT */
|
||||||
|
/*
|
||||||
|
* Apple mailbox message format
|
||||||
|
*
|
||||||
|
* Copyright (C) 2021 The Asahi Linux Contributors
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef _LINUX_APPLE_MAILBOX_H_
|
||||||
|
#define _LINUX_APPLE_MAILBOX_H_
|
||||||
|
|
||||||
|
#include <linux/types.h>
|
||||||
|
|
||||||
|
/* encodes a single 96bit message sent over the single channel */
|
||||||
|
struct apple_mbox_msg {
|
||||||
|
u64 msg0;
|
||||||
|
u32 msg1;
|
||||||
|
};
|
||||||
|
|
||||||
|
#endif
|
||||||
Loading…
Reference in New Issue