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V4L/DVB (12098): Create table for customize stv0900 ts registers. 

Signed-off-by: Igor M. Liplianin <liplianin@netup.ru>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Igor M. Liplianin 2009-06-19 05:45:23 -03:00 committed by Mauro Carvalho Chehab
parent ee1ebcfea6
commit f867c3f4ea
4 changed files with 42 additions and 5 deletions
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7
drivers/media/dvb/frontends/stv0900.h
View File

@ -29,6 +29,11 @@
#include <linux/dvb/frontend.h>
#include "dvb_frontend.h"
struct stv0900_reg {
u16 addr;
u8 val;
};
struct stv0900_config {
u8 demod_address;
u32 xtal;
@ -38,7 +43,7 @@ struct stv0900_config {
u8 path1_mode;
u8 path2_mode;
struct stv0900_reg *ts_config_regs;
u8 tun1_maddress;/* 0, 1, 2, 3 for 0xc0, 0xc2, 0xc4, 0xc6 */
u8 tun2_maddress;
u8 tun1_adc;/* 1 for stv6110, 2 for stb6100 */

21
drivers/media/dvb/frontends/stv0900_core.c
View File

@ -1393,7 +1393,7 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
struct stv0900_state *state = fe->demodulator_priv;
enum fe_stv0900_error error = STV0900_NO_ERROR;
enum fe_stv0900_error demodError = STV0900_NO_ERROR;
int selosci;
int selosci, i;
struct stv0900_inode *temp_int = find_inode(state->i2c_adap,
state->config->demod_address);
@ -1440,7 +1440,23 @@ static enum fe_stv0900_error stv0900_init_internal(struct dvb_frontend *fe,
stv0900_write_bits(state->internal, F0900_P1_ROLLOFF_CONTROL, p_init->rolloff);
stv0900_write_bits(state->internal, F0900_P2_ROLLOFF_CONTROL, p_init->rolloff);
stv0900_set_ts_parallel_serial(state->internal, p_init->path1_ts_clock, p_init->path2_ts_clock);
state->internal->ts_config = p_init->ts_config;
if (state->internal->ts_config == NULL)
stv0900_set_ts_parallel_serial(state->internal,
p_init->path1_ts_clock,
p_init->path2_ts_clock);
else {
for (i = 0; state->internal->ts_config[i].addr != 0xffff; i++)
stv0900_write_reg(state->internal,
state->internal->ts_config[i].addr,
state->internal->ts_config[i].val);
stv0900_write_bits(state->internal, F0900_P2_RST_HWARE, 1);
stv0900_write_bits(state->internal, F0900_P2_RST_HWARE, 0);
stv0900_write_bits(state->internal, F0900_P1_RST_HWARE, 1);
stv0900_write_bits(state->internal, F0900_P1_RST_HWARE, 0);
}
stv0900_write_bits(state->internal, F0900_P1_TUN_MADDRESS, p_init->tun1_maddress);
switch (p_init->tuner1_adc) {
case 1:
@ -1954,6 +1970,7 @@ struct dvb_frontend *stv0900_attach(const struct stv0900_config *config,
init_params.tun1_iq_inversion = STV0900_IQ_NORMAL;
init_params.tuner1_adc = config->tun1_adc;
init_params.path2_ts_clock = config->path2_mode;
init_params.ts_config = config->ts_config_regs;
init_params.tun2_maddress = config->tun2_maddress;
init_params.tuner2_adc = config->tun2_adc;
init_params.tun2_iq_inversion = STV0900_IQ_SWAPPED;

2
drivers/media/dvb/frontends/stv0900_priv.h
View File

@ -271,6 +271,7 @@ struct stv0900_init_params{
/* IQ from the tuner2 to the demod */
enum stv0900_iq_inversion tun2_iq_inversion;
struct stv0900_reg *ts_config;
};
struct stv0900_search_params {
@ -363,6 +364,7 @@ struct stv0900_internal{
u8 i2c_addr;
u8 clkmode;/* 0 for CLKI, 2 for XTALI */
u8 chip_id;
struct stv0900_reg *ts_config;
enum fe_stv0900_error errs;
int dmds_used;
};

17
drivers/media/video/cx23885/cx23885-dvb.c
View File

@ -45,6 +45,7 @@
#include "dibx000_common.h"
#include "zl10353.h"
#include "stv0900.h"
#include "stv0900_reg.h"
#include "stv6110.h"
#include "lnbh24.h"
#include "cx24116.h"
@ -370,13 +371,25 @@ static struct zl10353_config dvico_fusionhdtv_xc3028 = {
.disable_i2c_gate_ctrl = 1,
};
static struct stv0900_reg stv0900_ts_regs[] = {
{ R0900_TSGENERAL, 0x00 },
{ R0900_P1_TSSPEED, 0x40 },
{ R0900_P2_TSSPEED, 0x40 },
{ R0900_P1_TSCFGM, 0xc0 },
{ R0900_P2_TSCFGM, 0xc0 },
{ R0900_P1_TSCFGH, 0xe0 },
{ R0900_P2_TSCFGH, 0xe0 },
{ R0900_P1_TSCFGL, 0x20 },
{ R0900_P2_TSCFGL, 0x20 },
{ 0xffff, 0xff }, /* terminate */
};
static struct stv0900_config netup_stv0900_config = {
.demod_address = 0x68,
.xtal = 27000000,
.clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
.diseqc_mode = 2,/* 2/3 PWM */
.path1_mode = 2,/*Serial continues clock */
.path2_mode = 2,/*Serial continues clock */
.ts_config_regs = stv0900_ts_regs,
.tun1_maddress = 0,/* 0x60 */
.tun2_maddress = 3,/* 0x63 */
.tun1_adc = 1,/* 1 Vpp */