ASoC: sh: fsi: clean up SPDIF defines
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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@ -50,13 +50,20 @@
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/* DO_FMT */
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/* DO_FMT */
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/* DI_FMT */
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/* DI_FMT */
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#define CR_BWS_24 (0x0 << 20) /* FSI2 */
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#define CR_BWS_16 (0x1 << 20) /* FSI2 */
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#define CR_BWS_20 (0x2 << 20) /* FSI2 */
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#define CR_DTMD_PCM (0x0 << 8) /* FSI2 */
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#define CR_DTMD_SPDIF_PCM (0x1 << 8) /* FSI2 */
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#define CR_DTMD_SPDIF_STREAM (0x2 << 8) /* FSI2 */
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#define CR_MONO (0x0 << 4)
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#define CR_MONO (0x0 << 4)
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#define CR_MONO_D (0x1 << 4)
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#define CR_MONO_D (0x1 << 4)
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#define CR_PCM (0x2 << 4)
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#define CR_PCM (0x2 << 4)
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#define CR_I2S (0x3 << 4)
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#define CR_I2S (0x3 << 4)
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#define CR_TDM (0x4 << 4)
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#define CR_TDM (0x4 << 4)
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#define CR_TDM_D (0x5 << 4)
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#define CR_TDM_D (0x5 << 4)
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#define CR_SPDIF 0x00100120
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/* DOFF_CTL */
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/* DOFF_CTL */
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/* DIFF_CTL */
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/* DIFF_CTL */
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@ -93,6 +100,10 @@
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#define IR (1 << 4) /* Interrupt Reset */
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#define IR (1 << 4) /* Interrupt Reset */
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#define FSISR (1 << 0) /* Software Reset */
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#define FSISR (1 << 0) /* Software Reset */
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/* OUT_SEL (FSI2) */
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#define DMMD (1 << 4) /* SPDIF output timing 0: Biphase only */
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/* 1: Biphase and serial */
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/* FIFO_SZ */
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/* FIFO_SZ */
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#define FIFO_SZ_MASK 0x7
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#define FIFO_SZ_MASK 0x7
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@ -828,10 +839,10 @@ static int fsi_dai_startup(struct snd_pcm_substream *substream,
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dev_err(dai->dev, "This FSI can not use SPDIF\n");
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dev_err(dai->dev, "This FSI can not use SPDIF\n");
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return -EINVAL;
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return -EINVAL;
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}
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}
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data = CR_SPDIF;
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data = CR_BWS_16 | CR_DTMD_SPDIF_PCM | CR_PCM;
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io->chan_num = 2;
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io->chan_num = 2;
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fsi_spdif_clk_ctrl(fsi, 1);
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fsi_spdif_clk_ctrl(fsi, 1);
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fsi_reg_mask_set(fsi, OUT_SEL, 0x0010, 0x0010);
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fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
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break;
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break;
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default:
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default:
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dev_err(dai->dev, "unknown format.\n");
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dev_err(dai->dev, "unknown format.\n");
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