Massive net driver const-ification.
This commit is contained in:
parent
c499ec24c3
commit
f71e130966
|
@ -841,7 +841,7 @@ enum xcvr_types {
|
|||
XCVR_100baseFx, XCVR_MII=6, XCVR_NWAY=8, XCVR_ExtMII=9, XCVR_Default=10,
|
||||
};
|
||||
|
||||
static struct media_table {
|
||||
static const struct media_table {
|
||||
char *name;
|
||||
unsigned int media_bits:16, /* Bits to set in Wn4_Media register. */
|
||||
mask:8, /* The transceiver-present bit in Wn3_Config.*/
|
||||
|
@ -1445,7 +1445,7 @@ static int __devinit vortex_probe1(struct device *gendev,
|
|||
}
|
||||
|
||||
{
|
||||
static const char * ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
|
||||
static const char * const ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
|
||||
unsigned int config;
|
||||
EL3WINDOW(3);
|
||||
vp->available_media = ioread16(ioaddr + Wn3_Options);
|
||||
|
|
|
@ -1276,7 +1276,7 @@ static int cp_change_mtu(struct net_device *dev, int new_mtu)
|
|||
}
|
||||
#endif /* BROKEN */
|
||||
|
||||
static char mii_2_8139_map[8] = {
|
||||
static const char mii_2_8139_map[8] = {
|
||||
BasicModeCtrl,
|
||||
BasicModeStatus,
|
||||
0,
|
||||
|
|
|
@ -229,7 +229,7 @@ typedef enum {
|
|||
|
||||
|
||||
/* indexed by board_t, above */
|
||||
static struct {
|
||||
static const struct {
|
||||
const char *name;
|
||||
u32 hw_flags;
|
||||
} board_info[] __devinitdata = {
|
||||
|
@ -1192,7 +1192,7 @@ static int __devinit read_eeprom (void __iomem *ioaddr, int location, int addr_l
|
|||
#define mdio_delay() RTL_R8(Config4)
|
||||
|
||||
|
||||
static char mii_2_8139_map[8] = {
|
||||
static const char mii_2_8139_map[8] = {
|
||||
BasicModeCtrl,
|
||||
BasicModeStatus,
|
||||
0,
|
||||
|
|
|
@ -46,7 +46,7 @@ typedef enum {
|
|||
} board_t;
|
||||
|
||||
/* indexed by board_t, above */
|
||||
static struct {
|
||||
static const struct {
|
||||
char *name;
|
||||
} board_info[] __devinitdata = {
|
||||
{ "Broadcom NetXtreme II BCM5706 1000Base-T" },
|
||||
|
@ -3476,7 +3476,7 @@ bnx2_test_registers(struct bnx2 *bp)
|
|||
{
|
||||
int ret;
|
||||
int i;
|
||||
static struct {
|
||||
static const struct {
|
||||
u16 offset;
|
||||
u16 flags;
|
||||
u32 rw_mask;
|
||||
|
@ -3891,7 +3891,7 @@ reg_test_err:
|
|||
static int
|
||||
bnx2_do_mem_test(struct bnx2 *bp, u32 start, u32 size)
|
||||
{
|
||||
static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0x55555555,
|
||||
static const u32 test_pattern[] = { 0x00000000, 0xffffffff, 0x55555555,
|
||||
0xaaaaaaaa , 0xaa55aa55, 0x55aa55aa };
|
||||
int i;
|
||||
|
||||
|
@ -3916,7 +3916,7 @@ bnx2_test_memory(struct bnx2 *bp)
|
|||
{
|
||||
int ret = 0;
|
||||
int i;
|
||||
static struct {
|
||||
static const struct {
|
||||
u32 offset;
|
||||
u32 len;
|
||||
} mem_tbl[] = {
|
||||
|
@ -5122,7 +5122,7 @@ static struct {
|
|||
|
||||
#define STATS_OFFSET32(offset_name) (offsetof(struct statistics_block, offset_name) / 4)
|
||||
|
||||
static unsigned long bnx2_stats_offset_arr[BNX2_NUM_STATS] = {
|
||||
static const unsigned long bnx2_stats_offset_arr[BNX2_NUM_STATS] = {
|
||||
STATS_OFFSET32(stat_IfHCInOctets_hi),
|
||||
STATS_OFFSET32(stat_IfHCInBadOctets_hi),
|
||||
STATS_OFFSET32(stat_IfHCOutOctets_hi),
|
||||
|
|
|
@ -14,20 +14,20 @@
|
|||
* accompanying it.
|
||||
*/
|
||||
|
||||
static int bnx2_COM_b06FwReleaseMajor = 0x1;
|
||||
static int bnx2_COM_b06FwReleaseMinor = 0x0;
|
||||
static int bnx2_COM_b06FwReleaseFix = 0x0;
|
||||
static u32 bnx2_COM_b06FwStartAddr = 0x080008b4;
|
||||
static u32 bnx2_COM_b06FwTextAddr = 0x08000000;
|
||||
static int bnx2_COM_b06FwTextLen = 0x57bc;
|
||||
static u32 bnx2_COM_b06FwDataAddr = 0x08005840;
|
||||
static int bnx2_COM_b06FwDataLen = 0x0;
|
||||
static u32 bnx2_COM_b06FwRodataAddr = 0x080057c0;
|
||||
static int bnx2_COM_b06FwRodataLen = 0x58;
|
||||
static u32 bnx2_COM_b06FwBssAddr = 0x08005860;
|
||||
static int bnx2_COM_b06FwBssLen = 0x88;
|
||||
static u32 bnx2_COM_b06FwSbssAddr = 0x08005840;
|
||||
static int bnx2_COM_b06FwSbssLen = 0x1c;
|
||||
static const int bnx2_COM_b06FwReleaseMajor = 0x1;
|
||||
static const int bnx2_COM_b06FwReleaseMinor = 0x0;
|
||||
static const int bnx2_COM_b06FwReleaseFix = 0x0;
|
||||
static const u32 bnx2_COM_b06FwStartAddr = 0x080008b4;
|
||||
static const u32 bnx2_COM_b06FwTextAddr = 0x08000000;
|
||||
static const int bnx2_COM_b06FwTextLen = 0x57bc;
|
||||
static const u32 bnx2_COM_b06FwDataAddr = 0x08005840;
|
||||
static const int bnx2_COM_b06FwDataLen = 0x0;
|
||||
static const u32 bnx2_COM_b06FwRodataAddr = 0x080057c0;
|
||||
static const int bnx2_COM_b06FwRodataLen = 0x58;
|
||||
static const u32 bnx2_COM_b06FwBssAddr = 0x08005860;
|
||||
static const int bnx2_COM_b06FwBssLen = 0x88;
|
||||
static const u32 bnx2_COM_b06FwSbssAddr = 0x08005840;
|
||||
static const int bnx2_COM_b06FwSbssLen = 0x1c;
|
||||
static u32 bnx2_COM_b06FwText[(0x57bc/4) + 1] = {
|
||||
0x0a00022d, 0x00000000, 0x00000000, 0x0000000d, 0x636f6d20, 0x322e352e,
|
||||
0x38000000, 0x02050802, 0x00000000, 0x00000003, 0x00000014, 0x00000032,
|
||||
|
@ -2325,20 +2325,20 @@ static u32 bnx2_rv2p_proc2[] = {
|
|||
0x0000000c, 0x29520000, 0x00000018, 0x80000002, 0x0000000c, 0x29800000,
|
||||
0x00000018, 0x00570000 };
|
||||
|
||||
static int bnx2_TPAT_b06FwReleaseMajor = 0x1;
|
||||
static int bnx2_TPAT_b06FwReleaseMinor = 0x0;
|
||||
static int bnx2_TPAT_b06FwReleaseFix = 0x0;
|
||||
static u32 bnx2_TPAT_b06FwStartAddr = 0x08000860;
|
||||
static u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
|
||||
static int bnx2_TPAT_b06FwTextLen = 0x122c;
|
||||
static u32 bnx2_TPAT_b06FwDataAddr = 0x08001a60;
|
||||
static int bnx2_TPAT_b06FwDataLen = 0x0;
|
||||
static u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
|
||||
static int bnx2_TPAT_b06FwRodataLen = 0x0;
|
||||
static u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0;
|
||||
static int bnx2_TPAT_b06FwBssLen = 0x250;
|
||||
static u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60;
|
||||
static int bnx2_TPAT_b06FwSbssLen = 0x34;
|
||||
static const int bnx2_TPAT_b06FwReleaseMajor = 0x1;
|
||||
static const int bnx2_TPAT_b06FwReleaseMinor = 0x0;
|
||||
static const int bnx2_TPAT_b06FwReleaseFix = 0x0;
|
||||
static const u32 bnx2_TPAT_b06FwStartAddr = 0x08000860;
|
||||
static const u32 bnx2_TPAT_b06FwTextAddr = 0x08000800;
|
||||
static const int bnx2_TPAT_b06FwTextLen = 0x122c;
|
||||
static const u32 bnx2_TPAT_b06FwDataAddr = 0x08001a60;
|
||||
static const int bnx2_TPAT_b06FwDataLen = 0x0;
|
||||
static const u32 bnx2_TPAT_b06FwRodataAddr = 0x00000000;
|
||||
static const int bnx2_TPAT_b06FwRodataLen = 0x0;
|
||||
static const u32 bnx2_TPAT_b06FwBssAddr = 0x08001aa0;
|
||||
static const int bnx2_TPAT_b06FwBssLen = 0x250;
|
||||
static const u32 bnx2_TPAT_b06FwSbssAddr = 0x08001a60;
|
||||
static const int bnx2_TPAT_b06FwSbssLen = 0x34;
|
||||
static u32 bnx2_TPAT_b06FwText[(0x122c/4) + 1] = {
|
||||
0x0a000218, 0x00000000, 0x00000000, 0x0000000d, 0x74706174, 0x20322e35,
|
||||
0x2e313100, 0x02050b01, 0x00000000, 0x00000000, 0x00000000, 0x00000000,
|
||||
|
@ -2540,20 +2540,20 @@ static u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
|
|||
static u32 bnx2_TPAT_b06FwBss[(0x250/4) + 1] = { 0x0 };
|
||||
static u32 bnx2_TPAT_b06FwSbss[(0x34/4) + 1] = { 0x0 };
|
||||
|
||||
static int bnx2_TXP_b06FwReleaseMajor = 0x1;
|
||||
static int bnx2_TXP_b06FwReleaseMinor = 0x0;
|
||||
static int bnx2_TXP_b06FwReleaseFix = 0x0;
|
||||
static u32 bnx2_TXP_b06FwStartAddr = 0x080034b0;
|
||||
static u32 bnx2_TXP_b06FwTextAddr = 0x08000000;
|
||||
static int bnx2_TXP_b06FwTextLen = 0x5748;
|
||||
static u32 bnx2_TXP_b06FwDataAddr = 0x08005760;
|
||||
static int bnx2_TXP_b06FwDataLen = 0x0;
|
||||
static u32 bnx2_TXP_b06FwRodataAddr = 0x00000000;
|
||||
static int bnx2_TXP_b06FwRodataLen = 0x0;
|
||||
static u32 bnx2_TXP_b06FwBssAddr = 0x080057a0;
|
||||
static int bnx2_TXP_b06FwBssLen = 0x1c4;
|
||||
static u32 bnx2_TXP_b06FwSbssAddr = 0x08005760;
|
||||
static int bnx2_TXP_b06FwSbssLen = 0x38;
|
||||
static const int bnx2_TXP_b06FwReleaseMajor = 0x1;
|
||||
static const int bnx2_TXP_b06FwReleaseMinor = 0x0;
|
||||
static const int bnx2_TXP_b06FwReleaseFix = 0x0;
|
||||
static const u32 bnx2_TXP_b06FwStartAddr = 0x080034b0;
|
||||
static const u32 bnx2_TXP_b06FwTextAddr = 0x08000000;
|
||||
static const int bnx2_TXP_b06FwTextLen = 0x5748;
|
||||
static const u32 bnx2_TXP_b06FwDataAddr = 0x08005760;
|
||||
static const int bnx2_TXP_b06FwDataLen = 0x0;
|
||||
static const u32 bnx2_TXP_b06FwRodataAddr = 0x00000000;
|
||||
static const int bnx2_TXP_b06FwRodataLen = 0x0;
|
||||
static const u32 bnx2_TXP_b06FwBssAddr = 0x080057a0;
|
||||
static const int bnx2_TXP_b06FwBssLen = 0x1c4;
|
||||
static const u32 bnx2_TXP_b06FwSbssAddr = 0x08005760;
|
||||
static const int bnx2_TXP_b06FwSbssLen = 0x38;
|
||||
static u32 bnx2_TXP_b06FwText[(0x5748/4) + 1] = {
|
||||
0x0a000d2c, 0x00000000, 0x00000000, 0x0000000d, 0x74787020, 0x322e352e,
|
||||
0x38000000, 0x02050800, 0x0000000a, 0x000003e8, 0x0000ea60, 0x00000000,
|
||||
|
|
|
@ -1261,7 +1261,7 @@ int bond_alb_xmit(struct sk_buff *skb, struct net_device *bond_dev)
|
|||
struct ethhdr *eth_data;
|
||||
struct alb_bond_info *bond_info = &(BOND_ALB_INFO(bond));
|
||||
struct slave *tx_slave = NULL;
|
||||
static u32 ip_bcast = 0xffffffff;
|
||||
static const u32 ip_bcast = 0xffffffff;
|
||||
int hash_size = 0;
|
||||
int do_tx_balance = 1;
|
||||
u32 hash_index = 0;
|
||||
|
|
|
@ -131,7 +131,7 @@ MODULE_PARM_DESC(arp_ip_target, "arp targets in n.n.n.n form");
|
|||
|
||||
/*----------------------------- Global variables ----------------------------*/
|
||||
|
||||
static const char *version =
|
||||
static const char * const version =
|
||||
DRV_DESCRIPTION ": v" DRV_VERSION " (" DRV_RELDATE ")\n";
|
||||
|
||||
LIST_HEAD(bond_dev_list);
|
||||
|
|
|
@ -686,7 +686,7 @@ int t1_init_hw_modules(adapter_t *adapter)
|
|||
*/
|
||||
static void __devinit get_pci_mode(adapter_t *adapter, struct chelsio_pci_params *p)
|
||||
{
|
||||
static unsigned short speed_map[] = { 33, 66, 100, 133 };
|
||||
static const unsigned short speed_map[] = { 33, 66, 100, 133 };
|
||||
u32 pci_mode;
|
||||
|
||||
pci_read_config_dword(adapter->pdev, A_PCICFG_MODE, &pci_mode);
|
||||
|
|
|
@ -993,7 +993,7 @@ dgrs_download(struct net_device *dev0)
|
|||
int is;
|
||||
unsigned long i;
|
||||
|
||||
static int iv2is[16] = {
|
||||
static const int iv2is[16] = {
|
||||
0, 0, 0, ES4H_IS_INT3,
|
||||
0, ES4H_IS_INT5, 0, ES4H_IS_INT7,
|
||||
0, 0, ES4H_IS_INT10, ES4H_IS_INT11,
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
static int dgrs_firmnum = 550;
|
||||
static const int dgrs_firmnum = 550;
|
||||
static char dgrs_firmver[] = "$Version$";
|
||||
static char dgrs_firmdate[] = "11/16/96 03:45:15";
|
||||
static unsigned char dgrs_code[] __initdata = {
|
||||
|
@ -9963,4 +9963,4 @@ static unsigned char dgrs_code[] __initdata = {
|
|||
109,46,99,0,114,99,0,0,48,120,0,0,
|
||||
0,0,0,0,0,0,0,0,0,0,0,0
|
||||
} ;
|
||||
static int dgrs_ncode = 119520 ;
|
||||
static const int dgrs_ncode = 119520 ;
|
||||
|
|
|
@ -90,8 +90,8 @@ module_param(tx_coalesce, int, 0); /* HW xmit count each TxDMAComplete */
|
|||
#define EnableInt() \
|
||||
writew(DEFAULT_INTR, ioaddr + IntEnable)
|
||||
|
||||
static int max_intrloop = 50;
|
||||
static int multicast_filter_limit = 0x40;
|
||||
static const int max_intrloop = 50;
|
||||
static const int multicast_filter_limit = 0x40;
|
||||
|
||||
static int rio_open (struct net_device *dev);
|
||||
static void rio_timer (unsigned long data);
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
rx_align support: enables rx DMA without causing unaligned accesses.
|
||||
*/
|
||||
|
||||
static const char *version =
|
||||
static const char * const version =
|
||||
"eepro100.c:v1.09j-t 9/29/99 Donald Becker http://www.scyld.com/network/eepro100.html\n"
|
||||
"eepro100.c: $Revision: 1.36 $ 2000/11/17 Modified by Andrey V. Savochkin <saw@saw.sw.com.sg> and others\n";
|
||||
|
||||
|
@ -469,7 +469,7 @@ static const char i82558_config_cmd[CONFIG_DATA_SIZE] = {
|
|||
0x31, 0x05, };
|
||||
|
||||
/* PHY media interface chips. */
|
||||
static const char *phys[] = {
|
||||
static const char * const phys[] = {
|
||||
"None", "i82553-A/B", "i82553-C", "i82503",
|
||||
"DP83840", "80c240", "80c24", "i82555",
|
||||
"unknown-8", "unknown-9", "DP83840A", "unknown-11",
|
||||
|
|
|
@ -225,7 +225,7 @@ struct epic_chip_info {
|
|||
|
||||
|
||||
/* indexed by chip_t */
|
||||
static struct epic_chip_info pci_id_tbl[] = {
|
||||
static const struct epic_chip_info pci_id_tbl[] = {
|
||||
{ "SMSC EPIC/100 83c170",
|
||||
EPIC_IOTYPE, EPIC_TOTAL_SIZE, TYPE2_INTR | NO_MII | MII_PWRDWN },
|
||||
{ "SMSC EPIC/100 83c170",
|
||||
|
@ -291,7 +291,7 @@ enum CommandBits {
|
|||
RxDone | RxStarted | RxEarlyWarn | RxOverflow | RxFull)
|
||||
#define EpicNormalEvent (0x0000ffff & ~EpicNapiEvent)
|
||||
|
||||
static u16 media2miictl[16] = {
|
||||
static const u16 media2miictl[16] = {
|
||||
0, 0x0C00, 0x0C00, 0x2000, 0x0100, 0x2100, 0, 0,
|
||||
0, 0, 0, 0, 0, 0, 0, 0 };
|
||||
|
||||
|
|
|
@ -160,7 +160,7 @@ struct chip_info {
|
|||
int flags;
|
||||
};
|
||||
|
||||
static struct chip_info skel_netdrv_tbl[] = {
|
||||
static const struct chip_info skel_netdrv_tbl[] = {
|
||||
{"100/10M Ethernet PCI Adapter", 136, HAS_MII_XCVR},
|
||||
{"100/10M Ethernet PCI Adapter", 136, HAS_CHIP_XCVR},
|
||||
{"1000/100/10M Ethernet PCI Adapter", 136, HAS_MII_XCVR},
|
||||
|
|
|
@ -427,7 +427,7 @@ that case.
|
|||
static void hamachi_timer(unsigned long data);
|
||||
|
||||
enum capability_flags {CanHaveMII=1, };
|
||||
static struct chip_info {
|
||||
static const struct chip_info {
|
||||
u16 vendor_id, device_id, device_id_mask, pad;
|
||||
const char *name;
|
||||
void (*media_timer)(unsigned long data);
|
||||
|
|
|
@ -189,7 +189,7 @@ static int mtu;
|
|||
|
||||
/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
|
||||
This chip uses a 512 element hash table based on the Ethernet CRC. */
|
||||
static int multicast_filter_limit = 100;
|
||||
static const int multicast_filter_limit = 100;
|
||||
|
||||
/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
|
||||
Setting to > 1518 effectively disables this feature. */
|
||||
|
@ -374,7 +374,7 @@ enum pcistuff {
|
|||
|
||||
|
||||
/* array of board data directly indexed by pci_tbl[x].driver_data */
|
||||
static struct {
|
||||
static const struct {
|
||||
const char *name;
|
||||
unsigned long flags;
|
||||
} natsemi_pci_info[] __devinitdata = {
|
||||
|
|
|
@ -117,7 +117,7 @@ enum ne2k_pci_chipsets {
|
|||
};
|
||||
|
||||
|
||||
static struct {
|
||||
static const struct {
|
||||
char *name;
|
||||
int flags;
|
||||
} pci_clone_list[] __devinitdata = {
|
||||
|
|
|
@ -651,7 +651,7 @@ static void FASTCALL(phy_intr(struct net_device *ndev));
|
|||
static void fastcall phy_intr(struct net_device *ndev)
|
||||
{
|
||||
struct ns83820 *dev = PRIV(ndev);
|
||||
static char *speeds[] = { "10", "100", "1000", "1000(?)", "1000F" };
|
||||
static const char *speeds[] = { "10", "100", "1000", "1000(?)", "1000F" };
|
||||
u32 cfg, new_cfg;
|
||||
u32 tbisr, tanar, tanlpar;
|
||||
int speed, fullduplex, newlinkstate;
|
||||
|
|
|
@ -341,7 +341,7 @@ static void tc574_detach(struct pcmcia_device *p_dev)
|
|||
#define CS_CHECK(fn, ret) \
|
||||
do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
|
||||
|
||||
static char *ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
|
||||
static const char *ram_split[] = {"5:3", "3:1", "1:1", "3:5"};
|
||||
|
||||
static void tc574_config(dev_link_t *link)
|
||||
{
|
||||
|
|
|
@ -115,7 +115,7 @@ struct el3_private {
|
|||
spinlock_t lock;
|
||||
};
|
||||
|
||||
static char *if_names[] = { "auto", "10baseT", "10base2", "AUI" };
|
||||
static const char *if_names[] = { "auto", "10baseT", "10base2", "AUI" };
|
||||
|
||||
/*====================================================================*/
|
||||
|
||||
|
|
|
@ -309,7 +309,7 @@ do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0)
|
|||
static int mfc_try_io_port(dev_link_t *link)
|
||||
{
|
||||
int i, ret;
|
||||
static kio_addr_t serial_base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
|
||||
static const kio_addr_t serial_base[5] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8, 0x0 };
|
||||
|
||||
for (i = 0; i < 5; i++) {
|
||||
link->io.BasePort2 = serial_base[i];
|
||||
|
|
|
@ -388,7 +388,7 @@ static char *version =
|
|||
DRV_NAME " " DRV_VERSION " (Roger C. Pao)";
|
||||
#endif
|
||||
|
||||
static char *if_names[]={
|
||||
static const char *if_names[]={
|
||||
"Auto", "10baseT", "BNC",
|
||||
};
|
||||
|
||||
|
|
|
@ -66,7 +66,7 @@
|
|||
|
||||
#define PCNET_RDC_TIMEOUT (2*HZ/100) /* Max wait in jiffies for Tx RDC */
|
||||
|
||||
static char *if_names[] = { "auto", "10baseT", "10base2"};
|
||||
static const char *if_names[] = { "auto", "10baseT", "10base2"};
|
||||
|
||||
#ifdef PCMCIA_DEBUG
|
||||
static int pc_debug = PCMCIA_DEBUG;
|
||||
|
|
|
@ -59,7 +59,7 @@
|
|||
|
||||
/*====================================================================*/
|
||||
|
||||
static char *if_names[] = { "auto", "10baseT", "10base2"};
|
||||
static const char *if_names[] = { "auto", "10baseT", "10base2"};
|
||||
|
||||
/* Module parameters */
|
||||
|
||||
|
@ -777,7 +777,7 @@ free_cfg_mem:
|
|||
static int osi_config(dev_link_t *link)
|
||||
{
|
||||
struct net_device *dev = link->priv;
|
||||
static kio_addr_t com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
|
||||
static const kio_addr_t com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
|
||||
int i, j;
|
||||
|
||||
link->conf.Attributes |= CONF_ENABLE_SPKR;
|
||||
|
|
|
@ -208,7 +208,7 @@ enum xirc_cmd { /* Commands */
|
|||
#define XIRCREG45_REV 15 /* Revision Register (rd) */
|
||||
#define XIRCREG50_IA 8 /* Individual Address (8-13) */
|
||||
|
||||
static char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
|
||||
static const char *if_names[] = { "Auto", "10BaseT", "10Base2", "AUI", "100BaseT" };
|
||||
|
||||
/****************
|
||||
* All the PCMCIA modules use PCMCIA_DEBUG to control debugging. If
|
||||
|
|
|
@ -26,7 +26,7 @@
|
|||
#define DRV_RELDATE "01.Nov.2005"
|
||||
#define PFX DRV_NAME ": "
|
||||
|
||||
static const char *version =
|
||||
static const char * const version =
|
||||
DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " tsbogend@alpha.franken.de\n";
|
||||
|
||||
#include <linux/module.h>
|
||||
|
@ -109,7 +109,7 @@ static int rx_copybreak = 200;
|
|||
* table to translate option values from tulip
|
||||
* to internal options
|
||||
*/
|
||||
static unsigned char options_mapping[] = {
|
||||
static const unsigned char options_mapping[] = {
|
||||
PCNET32_PORT_ASEL, /* 0 Auto-select */
|
||||
PCNET32_PORT_AUI, /* 1 BNC/AUI */
|
||||
PCNET32_PORT_AUI, /* 2 AUI/BNC */
|
||||
|
@ -733,7 +733,7 @@ static int pcnet32_loopback_test(struct net_device *dev, uint64_t *data1)
|
|||
int rc; /* return code */
|
||||
int size; /* size of packets */
|
||||
unsigned char *packet; /* source packet data */
|
||||
static int data_len = 60; /* length of source packets */
|
||||
static const int data_len = 60; /* length of source packets */
|
||||
unsigned long flags;
|
||||
unsigned long ticks;
|
||||
|
||||
|
|
|
@ -132,7 +132,7 @@ struct phy_setting {
|
|||
};
|
||||
|
||||
/* A mapping of all SUPPORTED settings to speed/duplex */
|
||||
static struct phy_setting settings[] = {
|
||||
static const struct phy_setting settings[] = {
|
||||
{
|
||||
.speed = 10000,
|
||||
.duplex = DUPLEX_FULL,
|
||||
|
|
|
@ -123,7 +123,7 @@ static const char version[] = "NET3 PLIP version 2.4-parport gniibe@mri.co.jp\n"
|
|||
#ifndef NET_DEBUG
|
||||
#define NET_DEBUG 1
|
||||
#endif
|
||||
static unsigned int net_debug = NET_DEBUG;
|
||||
static const unsigned int net_debug = NET_DEBUG;
|
||||
|
||||
#define ENABLE(irq) if (irq != -1) enable_irq(irq)
|
||||
#define DISABLE(irq) if (irq != -1) disable_irq(irq)
|
||||
|
@ -351,7 +351,7 @@ static int plip_bh_timeout_error(struct net_device *dev, struct net_local *nl,
|
|||
typedef int (*plip_func)(struct net_device *dev, struct net_local *nl,
|
||||
struct plip_local *snd, struct plip_local *rcv);
|
||||
|
||||
static plip_func connection_state_table[] =
|
||||
static const plip_func connection_state_table[] =
|
||||
{
|
||||
plip_none,
|
||||
plip_receive_packet,
|
||||
|
|
|
@ -108,7 +108,7 @@ static void
|
|||
ppp_print_hex (register __u8 * out, const __u8 * in, int count)
|
||||
{
|
||||
register __u8 next_ch;
|
||||
static char hex[] = "0123456789ABCDEF";
|
||||
static const char hex[] = "0123456789ABCDEF";
|
||||
|
||||
while (count-- > 0) {
|
||||
next_ch = *in++;
|
||||
|
|
|
@ -113,11 +113,11 @@ static int media[MAX_UNITS] = { -1, -1, -1, -1, -1, -1, -1, -1 };
|
|||
static int num_media = 0;
|
||||
|
||||
/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
|
||||
static int max_interrupt_work = 20;
|
||||
static const int max_interrupt_work = 20;
|
||||
|
||||
/* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
|
||||
The RTL chips use a 64 element hash table based on the Ethernet CRC. */
|
||||
static int multicast_filter_limit = 32;
|
||||
static const int multicast_filter_limit = 32;
|
||||
|
||||
/* MAC address length */
|
||||
#define MAC_ADDR_LEN 6
|
||||
|
|
|
@ -214,7 +214,7 @@ static void s2io_vlan_rx_kill_vid(struct net_device *dev, unsigned long vid)
|
|||
#define SWITCH_SIGN 0xA5A5A5A5A5A5A5A5ULL
|
||||
#define END_SIGN 0x0
|
||||
|
||||
static u64 herc_act_dtx_cfg[] = {
|
||||
static const u64 herc_act_dtx_cfg[] = {
|
||||
/* Set address */
|
||||
0x8000051536750000ULL, 0x80000515367500E0ULL,
|
||||
/* Write data */
|
||||
|
@ -235,7 +235,7 @@ static u64 herc_act_dtx_cfg[] = {
|
|||
END_SIGN
|
||||
};
|
||||
|
||||
static u64 xena_mdio_cfg[] = {
|
||||
static const u64 xena_mdio_cfg[] = {
|
||||
/* Reset PMA PLL */
|
||||
0xC001010000000000ULL, 0xC0010100000000E0ULL,
|
||||
0xC0010100008000E4ULL,
|
||||
|
@ -245,7 +245,7 @@ static u64 xena_mdio_cfg[] = {
|
|||
END_SIGN
|
||||
};
|
||||
|
||||
static u64 xena_dtx_cfg[] = {
|
||||
static const u64 xena_dtx_cfg[] = {
|
||||
0x8000051500000000ULL, 0x80000515000000E0ULL,
|
||||
0x80000515D93500E4ULL, 0x8001051500000000ULL,
|
||||
0x80010515000000E0ULL, 0x80010515001E00E4ULL,
|
||||
|
@ -273,7 +273,7 @@ static u64 xena_dtx_cfg[] = {
|
|||
* Constants for Fixing the MacAddress problem seen mostly on
|
||||
* Alpha machines.
|
||||
*/
|
||||
static u64 fix_mac[] = {
|
||||
static const u64 fix_mac[] = {
|
||||
0x0060000000000000ULL, 0x0060600000000000ULL,
|
||||
0x0040600000000000ULL, 0x0000600000000000ULL,
|
||||
0x0020600000000000ULL, 0x0060600000000000ULL,
|
||||
|
|
|
@ -59,7 +59,7 @@ static char version[] = "sb1000.c:v1.1.2 6/01/98 (fventuri@mediaone.net)\n";
|
|||
#ifdef SB1000_DEBUG
|
||||
static int sb1000_debug = SB1000_DEBUG;
|
||||
#else
|
||||
static int sb1000_debug = 1;
|
||||
static const int sb1000_debug = 1;
|
||||
#endif
|
||||
|
||||
static const int SB1000_IO_EXTENT = 8;
|
||||
|
|
|
@ -366,7 +366,7 @@ static const u32 sis190_intr_mask =
|
|||
* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
|
||||
* The chips use a 64 element hash table based on the Ethernet CRC.
|
||||
*/
|
||||
static int multicast_filter_limit = 32;
|
||||
static const int multicast_filter_limit = 32;
|
||||
|
||||
static void __mdio_cmd(void __iomem *ioaddr, u32 ctl)
|
||||
{
|
||||
|
|
|
@ -100,7 +100,7 @@ enum {
|
|||
SIS_900 = 0,
|
||||
SIS_7016
|
||||
};
|
||||
static char * card_names[] = {
|
||||
static const char * card_names[] = {
|
||||
"SiS 900 PCI Fast Ethernet",
|
||||
"SiS 7016 PCI Fast Ethernet"
|
||||
};
|
||||
|
@ -115,7 +115,7 @@ MODULE_DEVICE_TABLE (pci, sis900_pci_tbl);
|
|||
|
||||
static void sis900_read_mode(struct net_device *net_dev, int *speed, int *duplex);
|
||||
|
||||
static struct mii_chip_info {
|
||||
static const struct mii_chip_info {
|
||||
const char * name;
|
||||
u16 phy_id0;
|
||||
u16 phy_id1;
|
||||
|
@ -400,7 +400,7 @@ static int __devinit sis900_probe(struct pci_dev *pci_dev,
|
|||
void *ring_space;
|
||||
long ioaddr;
|
||||
int i, ret;
|
||||
char *card_name = card_names[pci_id->driver_data];
|
||||
const char *card_name = card_names[pci_id->driver_data];
|
||||
const char *dev_name = pci_name(pci_dev);
|
||||
|
||||
/* when built into the kernel, we only print version if device is found */
|
||||
|
@ -1275,7 +1275,7 @@ static void sis900_timer(unsigned long data)
|
|||
struct net_device *net_dev = (struct net_device *)data;
|
||||
struct sis900_private *sis_priv = net_dev->priv;
|
||||
struct mii_phy *mii_phy = sis_priv->mii;
|
||||
static int next_tick = 5*HZ;
|
||||
static const int next_tick = 5*HZ;
|
||||
u16 status;
|
||||
|
||||
if (!sis_priv->autong_complete){
|
||||
|
|
|
@ -89,21 +89,21 @@ static const u_short my_sagp = 0xffff ; /* short group address (n.u.) */
|
|||
/*
|
||||
* useful interrupt bits
|
||||
*/
|
||||
static int mac_imsk1u = FM_STXABRS | FM_STXABRA0 | FM_SXMTABT ;
|
||||
static int mac_imsk1l = FM_SQLCKS | FM_SQLCKA0 | FM_SPCEPDS | FM_SPCEPDA0|
|
||||
static const int mac_imsk1u = FM_STXABRS | FM_STXABRA0 | FM_SXMTABT ;
|
||||
static const int mac_imsk1l = FM_SQLCKS | FM_SQLCKA0 | FM_SPCEPDS | FM_SPCEPDA0|
|
||||
FM_STBURS | FM_STBURA0 ;
|
||||
|
||||
/* delete FM_SRBFL after tests */
|
||||
static int mac_imsk2u = FM_SERRSF | FM_SNFSLD | FM_SRCVOVR | FM_SRBFL |
|
||||
static const int mac_imsk2u = FM_SERRSF | FM_SNFSLD | FM_SRCVOVR | FM_SRBFL |
|
||||
FM_SMYCLM ;
|
||||
static int mac_imsk2l = FM_STRTEXR | FM_SDUPCLM | FM_SFRMCTR |
|
||||
static const int mac_imsk2l = FM_STRTEXR | FM_SDUPCLM | FM_SFRMCTR |
|
||||
FM_SERRCTR | FM_SLSTCTR |
|
||||
FM_STRTEXP | FM_SMULTDA | FM_SRNGOP ;
|
||||
|
||||
static int mac_imsk3u = FM_SRCVOVR2 | FM_SRBFL2 ;
|
||||
static int mac_imsk3l = FM_SRPERRQ2 | FM_SRPERRQ1 ;
|
||||
static const int mac_imsk3u = FM_SRCVOVR2 | FM_SRBFL2 ;
|
||||
static const int mac_imsk3l = FM_SRPERRQ2 | FM_SRPERRQ1 ;
|
||||
|
||||
static int mac_beacon_imsk2u = FM_SOTRBEC | FM_SMYBEC | FM_SBEC |
|
||||
static const int mac_beacon_imsk2u = FM_SOTRBEC | FM_SMYBEC | FM_SBEC |
|
||||
FM_SLOCLM | FM_SHICLM | FM_SMYCLM | FM_SCLM ;
|
||||
|
||||
|
||||
|
|
|
@ -186,7 +186,7 @@ static const struct plt {
|
|||
* Do we need the EBUF error during signaling, too, to detect SUPERNET_3
|
||||
* PLL bug?
|
||||
*/
|
||||
static int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
|
||||
static const int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
|
||||
PL_PCM_ENABLED | PL_SELF_TEST | PL_EBUF_ERR;
|
||||
#else /* SUPERNET_3 */
|
||||
/*
|
||||
|
@ -195,7 +195,7 @@ static int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
|
|||
static int plc_imsk_na = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
|
||||
PL_PCM_ENABLED | PL_SELF_TEST ;
|
||||
#endif /* SUPERNET_3 */
|
||||
static int plc_imsk_act = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
|
||||
static const int plc_imsk_act = PL_PCM_CODE | PL_TRACE_PROP | PL_PCM_BREAK |
|
||||
PL_PCM_ENABLED | PL_SELF_TEST | PL_EBUF_ERR;
|
||||
|
||||
/* external functions */
|
||||
|
|
|
@ -67,7 +67,7 @@
|
|||
/* each new release!!! */
|
||||
#define VERSION "2.07"
|
||||
|
||||
static const char *boot_msg =
|
||||
static const char * const boot_msg =
|
||||
"SysKonnect FDDI PCI Adapter driver v" VERSION " for\n"
|
||||
" SK-55xx/SK-58xx adapters (SK-NET FDDI-FP/UP/LP)";
|
||||
|
||||
|
|
|
@ -201,7 +201,7 @@ static int max_interrupt_work = 20;
|
|||
static int mtu;
|
||||
/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
|
||||
The Starfire has a 512 element hash table based on the Ethernet CRC. */
|
||||
static int multicast_filter_limit = 512;
|
||||
static const int multicast_filter_limit = 512;
|
||||
/* Whether to do TCP/UDP checksums in hardware */
|
||||
static int enable_hw_cksum = 1;
|
||||
|
||||
|
@ -463,7 +463,7 @@ static struct pci_device_id starfire_pci_tbl[] = {
|
|||
MODULE_DEVICE_TABLE(pci, starfire_pci_tbl);
|
||||
|
||||
/* A chip capabilities table, matching the CH_xxx entries in xxx_pci_tbl[] above. */
|
||||
static struct chip_info {
|
||||
static const struct chip_info {
|
||||
const char *name;
|
||||
int drv_flags;
|
||||
} netdrv_tbl[] __devinitdata = {
|
||||
|
|
|
@ -106,7 +106,7 @@
|
|||
static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */
|
||||
/* Maximum number of multicast addresses to filter (vs. rx-all-multicast).
|
||||
Typical is a 64 element hash table based on the Ethernet CRC. */
|
||||
static int multicast_filter_limit = 32;
|
||||
static const int multicast_filter_limit = 32;
|
||||
|
||||
/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
|
||||
Setting to > 1518 effectively disables this feature.
|
||||
|
@ -298,7 +298,7 @@ enum {
|
|||
struct pci_id_info {
|
||||
const char *name;
|
||||
};
|
||||
static struct pci_id_info pci_id_tbl[] = {
|
||||
static const struct pci_id_info pci_id_tbl[] = {
|
||||
{"D-Link DFE-550TX FAST Ethernet Adapter"},
|
||||
{"D-Link DFE-550FX 100Mbps Fiber-optics Adapter"},
|
||||
{"D-Link DFE-580TX 4 port Server Adapter"},
|
||||
|
|
|
@ -39,7 +39,7 @@
|
|||
#include "sungem_phy.h"
|
||||
|
||||
/* Link modes of the BCM5400 PHY */
|
||||
static int phy_BCM5400_link_table[8][3] = {
|
||||
static const int phy_BCM5400_link_table[8][3] = {
|
||||
{ 0, 0, 0 }, /* No link */
|
||||
{ 0, 0, 0 }, /* 10BT Half Duplex */
|
||||
{ 1, 0, 0 }, /* 10BT Full Duplex */
|
||||
|
|
|
@ -7785,7 +7785,7 @@ static int tg3_test_link(struct tg3 *tp)
|
|||
}
|
||||
|
||||
/* Only test the commonly used registers */
|
||||
static int tg3_test_registers(struct tg3 *tp)
|
||||
static const int tg3_test_registers(struct tg3 *tp)
|
||||
{
|
||||
int i, is_5705;
|
||||
u32 offset, read_mask, write_mask, val, save_val, read_val;
|
||||
|
@ -7999,7 +7999,7 @@ out:
|
|||
|
||||
static int tg3_do_mem_test(struct tg3 *tp, u32 offset, u32 len)
|
||||
{
|
||||
static u32 test_pattern[] = { 0x00000000, 0xffffffff, 0xaa55a55a };
|
||||
static const u32 test_pattern[] = { 0x00000000, 0xffffffff, 0xaa55a55a };
|
||||
int i;
|
||||
u32 j;
|
||||
|
||||
|
|
|
@ -178,7 +178,7 @@ enum typhoon_cards {
|
|||
};
|
||||
|
||||
/* directly indexed by enum typhoon_cards, above */
|
||||
static struct typhoon_card_info typhoon_card_info[] __devinitdata = {
|
||||
static const struct typhoon_card_info typhoon_card_info[] __devinitdata = {
|
||||
{ "3Com Typhoon (3C990-TX)",
|
||||
TYPHOON_CRYPTO_NONE},
|
||||
{ "3Com Typhoon (3CR990-TX-95)",
|
||||
|
|
|
@ -69,8 +69,8 @@ static int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
|
|||
static int dma_ctrl = 0x00CAC277; /* Override when loading module! */
|
||||
static int fifo_cfg = 0x0028;
|
||||
#else
|
||||
static int dma_ctrl = 0x004A0263; /* Constrained by errata */
|
||||
static int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
|
||||
static const int dma_ctrl = 0x004A0263; /* Constrained by errata */
|
||||
static const int fifo_cfg = 0x0020; /* Bypass external Tx FIFO. */
|
||||
#endif
|
||||
|
||||
/* Set the copy breakpoint for the copy-only-tiny-frames scheme.
|
||||
|
@ -266,7 +266,7 @@ struct pci_id_info {
|
|||
int drv_flags; /* Driver use, intended as capability flags. */
|
||||
};
|
||||
|
||||
static struct pci_id_info pci_id_tbl[] = {
|
||||
static const struct pci_id_info pci_id_tbl[] = {
|
||||
{"Yellowfin G-NIC Gigabit Ethernet", { 0x07021000, 0xffffffff},
|
||||
PCI_IOTYPE, YELLOWFIN_SIZE,
|
||||
FullTxStatus | IsGigabit | HasMulticastBug | HasMACAddrBug | DontUseEeprom},
|
||||
|
|
Loading…
Reference in New Issue