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clk: renesas: r8a7795: Add HS-USB ch3 clock 

This patch adds valid HS-USB ch3 clock from R8A7795 ES2.0 SoC.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Takeshi Kihara 2017-04-20 02:46:25 +09:00 committed by Geert Uytterhoeven
parent 0a12c4400c
commit f5ca01141c
1 changed files with 1 additions and 0 deletions
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drivers/clk/renesas/r8a7795-cpg-mssr.c
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@ -196,6 +196,7 @@ static struct mssr_mod_clk r8a7795_mod_clks[] __initdata = {
DEF_MOD("ehci1", 702, R8A7795_CLK_S3D4),
DEF_MOD("ehci0", 703, R8A7795_CLK_S3D4),
DEF_MOD("hsusb", 704, R8A7795_CLK_S3D4),
DEF_MOD("hsusb3", 705, R8A7795_CLK_S3D4),
DEF_MOD("csi21", 713, R8A7795_CLK_CSI0), /* ES1.x */
DEF_MOD("csi20", 714, R8A7795_CLK_CSI0),
DEF_MOD("csi41", 715, R8A7795_CLK_CSI0),