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drm/msm/mdp4+5: move aspace/id to base class 

Before we can shift to passing the address-space object to _get_iova(),
we need to fix a few places (dsi+fbdev) that were hard-coding the adress
space id.  That gets somewhat easier if we just move these to the kms
base class.

Prep work for next patch.

Signed-off-by: Rob Clark <robdclark@gmail.com>
This commit is contained in:
Rob Clark 2017-06-13 10:22:37 -04:00
parent aa7cd24297
commit f59f62d592
11 changed files with 56 additions and 40 deletions
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10
drivers/gpu/drm/msm/dsi/dsi_host.c
View File

@ -32,6 +32,7 @@
#include "dsi.xml.h"
#include "sfpb.xml.h"
#include "dsi_cfg.h"
#include "msm_kms.h"
static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor)
{
@ -975,6 +976,7 @@ static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host)
static int dsi_tx_buf_alloc(struct msm_dsi_host *msm_host, int size)
{
struct drm_device *dev = msm_host->dev;
struct msm_drm_private *priv = dev->dev_private;
const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
int ret;
uint64_t iova;
@ -991,7 +993,8 @@ static int dsi_tx_buf_alloc(struct msm_dsi_host *msm_host, int size)
return ret;
}
ret = msm_gem_get_iova_locked(msm_host->tx_gem_obj, 0, &iova);
ret = msm_gem_get_iova_locked(msm_host->tx_gem_obj,
priv->kms->id, &iova);
mutex_unlock(&dev->struct_mutex);
if (ret) {
pr_err("%s: failed to get iova, %d\n", __func__, ret);
@ -1141,12 +1144,15 @@ static int dsi_long_read_resp(u8 *buf, const struct mipi_dsi_msg *msg)
static int dsi_cmd_dma_tx(struct msm_dsi_host *msm_host, int len)
{
const struct msm_dsi_cfg_handler *cfg_hnd = msm_host->cfg_hnd;
struct drm_device *dev = msm_host->dev;
struct msm_drm_private *priv = dev->dev_private;
int ret;
uint64_t dma_base;
bool triggered;
if (cfg_hnd->major == MSM_DSI_VER_MAJOR_6G) {
ret = msm_gem_get_iova(msm_host->tx_gem_obj, 0, &dma_base);
ret = msm_gem_get_iova(msm_host->tx_gem_obj,
priv->kms->id, &dma_base);
if (ret) {
pr_err("%s: failed to get iova: %d\n", __func__, ret);
return ret;

9
drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
View File

@ -126,8 +126,9 @@ static void unref_cursor_worker(struct drm_flip_work *work, void *val)
struct mdp4_crtc *mdp4_crtc =
container_of(work, struct mdp4_crtc, unref_cursor_work);
struct mdp4_kms *mdp4_kms = get_kms(&mdp4_crtc->base);
struct msm_kms *kms = &mdp4_kms->base.base;
msm_gem_put_iova(val, mdp4_kms->id);
msm_gem_put_iova(val, kms->id);
drm_gem_object_unreference_unlocked(val);
}
@ -360,6 +361,7 @@ static void update_cursor(struct drm_crtc *crtc)
{
struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
struct mdp4_kms *mdp4_kms = get_kms(crtc);
struct msm_kms *kms = &mdp4_kms->base.base;
enum mdp4_dma dma = mdp4_crtc->dma;
unsigned long flags;
@ -372,7 +374,7 @@ static void update_cursor(struct drm_crtc *crtc)
if (next_bo) {
/* take a obj ref + iova ref when we start scanning out: */
drm_gem_object_reference(next_bo);
msm_gem_get_iova_locked(next_bo, mdp4_kms->id, &iova);
msm_gem_get_iova_locked(next_bo, kms->id, &iova);
/* enable cursor: */
mdp4_write(mdp4_kms, REG_MDP4_DMA_CURSOR_SIZE(dma),
@ -409,6 +411,7 @@ static int mdp4_crtc_cursor_set(struct drm_crtc *crtc,
{
struct mdp4_crtc *mdp4_crtc = to_mdp4_crtc(crtc);
struct mdp4_kms *mdp4_kms = get_kms(crtc);
struct msm_kms *kms = &mdp4_kms->base.base;
struct drm_device *dev = crtc->dev;
struct drm_gem_object *cursor_bo, *old_bo;
unsigned long flags;
@ -429,7 +432,7 @@ static int mdp4_crtc_cursor_set(struct drm_crtc *crtc,
}
if (cursor_bo) {
ret = msm_gem_get_iova(cursor_bo, mdp4_kms->id, &iova);
ret = msm_gem_get_iova(cursor_bo, kms->id, &iova);
if (ret)
goto fail;
} else {

14
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.c
View File

@ -160,10 +160,10 @@ static void mdp4_destroy(struct msm_kms *kms)
{
struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
struct device *dev = mdp4_kms->dev->dev;
struct msm_gem_address_space *aspace = mdp4_kms->aspace;
struct msm_gem_address_space *aspace = kms->aspace;
if (mdp4_kms->blank_cursor_iova)
msm_gem_put_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id);
msm_gem_put_iova(mdp4_kms->blank_cursor_bo, kms->id);
drm_gem_object_unreference_unlocked(mdp4_kms->blank_cursor_bo);
if (aspace) {
@ -510,7 +510,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
goto fail;
}
mdp4_kms->aspace = aspace;
kms->aspace = aspace;
ret = aspace->mmu->funcs->attach(aspace->mmu, iommu_ports,
ARRAY_SIZE(iommu_ports));
@ -522,9 +522,9 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
aspace = NULL;
}
mdp4_kms->id = msm_register_address_space(dev, aspace);
if (mdp4_kms->id < 0) {
ret = mdp4_kms->id;
kms->id = msm_register_address_space(dev, aspace);
if (kms->id < 0) {
ret = kms->id;
dev_err(dev->dev, "failed to register mdp4 iommu: %d\n", ret);
goto fail;
}
@ -545,7 +545,7 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
goto fail;
}
ret = msm_gem_get_iova(mdp4_kms->blank_cursor_bo, mdp4_kms->id,
ret = msm_gem_get_iova(mdp4_kms->blank_cursor_bo, kms->id,
&mdp4_kms->blank_cursor_iova);
if (ret) {
dev_err(dev->dev, "could not pin blank-cursor bo: %d\n", ret);

4
drivers/gpu/drm/msm/mdp/mdp4/mdp4_kms.h
View File

@ -34,9 +34,6 @@ struct mdp4_kms {
int rev;
/* mapper-id used to request GEM buffer mapped for scanout: */
int id;
void __iomem *mmio;
struct regulator *vdd;
@ -45,7 +42,6 @@ struct mdp4_kms {
struct clk *pclk;
struct clk *lut_clk;
struct clk *axi_clk;
struct msm_gem_address_space *aspace;
struct mdp_irq error_handler;

15
drivers/gpu/drm/msm/mdp/mdp4/mdp4_plane.c
View File

@ -103,13 +103,14 @@ static int mdp4_plane_prepare_fb(struct drm_plane *plane,
{
struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
struct mdp4_kms *mdp4_kms = get_kms(plane);
struct msm_kms *kms = &mdp4_kms->base.base;
struct drm_framebuffer *fb = new_state->fb;
if (!fb)
return 0;
DBG("%s: prepare: FB[%u]", mdp4_plane->name, fb->base.id);
return msm_framebuffer_prepare(fb, mdp4_kms->id);
return msm_framebuffer_prepare(fb, kms->id);
}
static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
@ -117,13 +118,14 @@ static void mdp4_plane_cleanup_fb(struct drm_plane *plane,
{
struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
struct mdp4_kms *mdp4_kms = get_kms(plane);
struct msm_kms *kms = &mdp4_kms->base.base;
struct drm_framebuffer *fb = old_state->fb;
if (!fb)
return;
DBG("%s: cleanup: FB[%u]", mdp4_plane->name, fb->base.id);
msm_framebuffer_cleanup(fb, mdp4_kms->id);
msm_framebuffer_cleanup(fb, kms->id);
}
@ -161,6 +163,7 @@ static void mdp4_plane_set_scanout(struct drm_plane *plane,
{
struct mdp4_plane *mdp4_plane = to_mdp4_plane(plane);
struct mdp4_kms *mdp4_kms = get_kms(plane);
struct msm_kms *kms = &mdp4_kms->base.base;
enum mdp4_pipe pipe = mdp4_plane->pipe;
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRC_STRIDE_A(pipe),
@ -172,13 +175,13 @@ static void mdp4_plane_set_scanout(struct drm_plane *plane,
MDP4_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP0_BASE(pipe),
msm_framebuffer_iova(fb, mdp4_kms->id, 0));
msm_framebuffer_iova(fb, kms->id, 0));
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP1_BASE(pipe),
msm_framebuffer_iova(fb, mdp4_kms->id, 1));
msm_framebuffer_iova(fb, kms->id, 1));
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP2_BASE(pipe),
msm_framebuffer_iova(fb, mdp4_kms->id, 2));
msm_framebuffer_iova(fb, kms->id, 2));
mdp4_write(mdp4_kms, REG_MDP4_PIPE_SRCP3_BASE(pipe),
msm_framebuffer_iova(fb, mdp4_kms->id, 3));
msm_framebuffer_iova(fb, kms->id, 3));
plane->fb = fb;
}

6
drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
View File

@ -160,8 +160,9 @@ static void unref_cursor_worker(struct drm_flip_work *work, void *val)
struct mdp5_crtc *mdp5_crtc =
container_of(work, struct mdp5_crtc, unref_cursor_work);
struct mdp5_kms *mdp5_kms = get_kms(&mdp5_crtc->base);
struct msm_kms *kms = &mdp5_kms->base.base;
msm_gem_put_iova(val, mdp5_kms->id);
msm_gem_put_iova(val, kms->id);
drm_gem_object_unreference_unlocked(val);
}
@ -724,6 +725,7 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
struct mdp5_pipeline *pipeline = &mdp5_cstate->pipeline;
struct drm_device *dev = crtc->dev;
struct mdp5_kms *mdp5_kms = get_kms(crtc);
struct msm_kms *kms = &mdp5_kms->base.base;
struct drm_gem_object *cursor_bo, *old_bo = NULL;
uint32_t blendcfg, stride;
uint64_t cursor_addr;
@ -758,7 +760,7 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
if (!cursor_bo)
return -ENOENT;
ret = msm_gem_get_iova(cursor_bo, mdp5_kms->id, &cursor_addr);
ret = msm_gem_get_iova(cursor_bo, kms->id, &cursor_addr);
if (ret)
return -EINVAL;

10
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.c
View File

@ -163,7 +163,7 @@ static void mdp5_set_encoder_mode(struct msm_kms *kms,
static void mdp5_kms_destroy(struct msm_kms *kms)
{
struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
struct msm_gem_address_space *aspace = mdp5_kms->aspace;
struct msm_gem_address_space *aspace = kms->aspace;
int i;
for (i = 0; i < mdp5_kms->num_hwmixers; i++)
@ -663,7 +663,7 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
goto fail;
}
mdp5_kms->aspace = aspace;
kms->aspace = aspace;
ret = aspace->mmu->funcs->attach(aspace->mmu, iommu_ports,
ARRAY_SIZE(iommu_ports));
@ -678,9 +678,9 @@ struct msm_kms *mdp5_kms_init(struct drm_device *dev)
aspace = NULL;;
}
mdp5_kms->id = msm_register_address_space(dev, aspace);
if (mdp5_kms->id < 0) {
ret = mdp5_kms->id;
kms->id = msm_register_address_space(dev, aspace);
if (kms->id < 0) {
ret = kms->id;
dev_err(&pdev->dev, "failed to register mdp5 iommu: %d\n", ret);
goto fail;
}

4
drivers/gpu/drm/msm/mdp/mdp5/mdp5_kms.h
View File

@ -55,10 +55,6 @@ struct mdp5_kms {
struct mdp5_state *state;
struct drm_modeset_lock state_lock;
/* mapper-id used to request GEM buffer mapped for scanout: */
int id;
struct msm_gem_address_space *aspace;
struct mdp5_smp *smp;
struct mdp5_ctl_manager *ctlm;

16
drivers/gpu/drm/msm/mdp/mdp5/mdp5_plane.c
View File

@ -272,26 +272,28 @@ static int mdp5_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *new_state)
{
struct mdp5_kms *mdp5_kms = get_kms(plane);
struct msm_kms *kms = &mdp5_kms->base.base;
struct drm_framebuffer *fb = new_state->fb;
if (!new_state->fb)
return 0;
DBG("%s: prepare: FB[%u]", plane->name, fb->base.id);
return msm_framebuffer_prepare(fb, mdp5_kms->id);
return msm_framebuffer_prepare(fb, kms->id);
}
static void mdp5_plane_cleanup_fb(struct drm_plane *plane,
struct drm_plane_state *old_state)
{
struct mdp5_kms *mdp5_kms = get_kms(plane);
struct msm_kms *kms = &mdp5_kms->base.base;
struct drm_framebuffer *fb = old_state->fb;
if (!fb)
return;
DBG("%s: cleanup: FB[%u]", plane->name, fb->base.id);
msm_framebuffer_cleanup(fb, mdp5_kms->id);
msm_framebuffer_cleanup(fb, kms->id);
}
#define FRAC_16_16(mult, div) (((mult) << 16) / (div))
@ -498,6 +500,8 @@ static void set_scanout_locked(struct mdp5_kms *mdp5_kms,
enum mdp5_pipe pipe,
struct drm_framebuffer *fb)
{
struct msm_kms *kms = &mdp5_kms->base.base;
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC_STRIDE_A(pipe),
MDP5_PIPE_SRC_STRIDE_A_P0(fb->pitches[0]) |
MDP5_PIPE_SRC_STRIDE_A_P1(fb->pitches[1]));
@ -507,13 +511,13 @@ static void set_scanout_locked(struct mdp5_kms *mdp5_kms,
MDP5_PIPE_SRC_STRIDE_B_P3(fb->pitches[3]));
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC0_ADDR(pipe),
msm_framebuffer_iova(fb, mdp5_kms->id, 0));
msm_framebuffer_iova(fb, kms->id, 0));
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC1_ADDR(pipe),
msm_framebuffer_iova(fb, mdp5_kms->id, 1));
msm_framebuffer_iova(fb, kms->id, 1));
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC2_ADDR(pipe),
msm_framebuffer_iova(fb, mdp5_kms->id, 2));
msm_framebuffer_iova(fb, kms->id, 2));
mdp5_write(mdp5_kms, REG_MDP5_PIPE_SRC3_ADDR(pipe),
msm_framebuffer_iova(fb, mdp5_kms->id, 3));
msm_framebuffer_iova(fb, kms->id, 3));
}
/* Note: mdp5_plane->pipe_lock must be locked */

4
drivers/gpu/drm/msm/msm_fbdev.c
View File

@ -20,6 +20,7 @@
#include "msm_drv.h"
#include "msm_gem.h"
#include "msm_kms.h"
extern int msm_gem_mmap_obj(struct drm_gem_object *obj,
struct vm_area_struct *vma);
@ -73,6 +74,7 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
{
struct msm_fbdev *fbdev = to_msm_fbdev(helper);
struct drm_device *dev = helper->dev;
struct msm_drm_private *priv = dev->dev_private;
struct drm_framebuffer *fb = NULL;
struct fb_info *fbi = NULL;
struct drm_mode_fb_cmd2 mode_cmd = {0};
@ -124,7 +126,7 @@ static int msm_fbdev_create(struct drm_fb_helper *helper,
* in panic (ie. lock-safe, etc) we could avoid pinning the
* buffer now:
*/
ret = msm_gem_get_iova_locked(fbdev->bo, 0, &paddr);
ret = msm_gem_get_iova_locked(fbdev->bo, priv->kms->id, &paddr);
if (ret) {
dev_err(dev->dev, "failed to get buffer obj iova: %d\n", ret);
goto fail_unlock;

4
drivers/gpu/drm/msm/msm_kms.h
View File

@ -72,6 +72,10 @@ struct msm_kms {
/* irq number to be passed on to drm_irq_install */
int irq;
/* mapper-id used to request GEM buffer mapped for scanout: */
int id;
struct msm_gem_address_space *aspace;
};
/**