staging:iio:meter:ade7758: Fix timing on SPI read accessor functions.
According to the ADE7758 datasheet the minimum time between read command (that is, a write to communication register) and data read must not be less than 4us. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Acked-by: Jonathan Cameron <jic23@cam.ac.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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69c272cc8e
commit
f535e08eb6
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@ -100,7 +100,7 @@ static int ade7758_spi_write_reg_24(struct device *dev,
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return ret;
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return ret;
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}
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}
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static int ade7758_spi_read_reg_8(struct device *dev,
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int ade7758_spi_read_reg_8(struct device *dev,
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u8 reg_address,
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u8 reg_address,
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u8 *val)
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u8 *val)
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{
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{
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@ -111,9 +111,15 @@ static int ade7758_spi_read_reg_8(struct device *dev,
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struct spi_transfer xfers[] = {
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struct spi_transfer xfers[] = {
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{
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{
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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.bits_per_word = 8,
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.len = 1,
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.delay_usecs = 4,
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},
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{
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.tx_buf = &st->tx[1],
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.rx_buf = st->rx,
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.rx_buf = st->rx,
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.bits_per_word = 8,
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.bits_per_word = 8,
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.len = 2,
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.len = 1,
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},
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},
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};
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};
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@ -122,14 +128,15 @@ static int ade7758_spi_read_reg_8(struct device *dev,
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st->tx[1] = 0;
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st->tx[1] = 0;
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spi_message_init(&msg);
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync(st->us, &msg);
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if (ret) {
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
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dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
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reg_address);
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reg_address);
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goto error_ret;
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goto error_ret;
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}
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}
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*val = st->rx[1];
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*val = st->rx[0];
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error_ret:
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error_ret:
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mutex_unlock(&st->buf_lock);
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mutex_unlock(&st->buf_lock);
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@ -147,26 +154,35 @@ static int ade7758_spi_read_reg_16(struct device *dev,
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struct spi_transfer xfers[] = {
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struct spi_transfer xfers[] = {
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{
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{
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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.bits_per_word = 8,
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.len = 1,
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.delay_usecs = 4,
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},
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{
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.tx_buf = &st->tx[1],
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.rx_buf = st->rx,
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.rx_buf = st->rx,
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.bits_per_word = 8,
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.bits_per_word = 8,
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.len = 3,
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.len = 2,
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},
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},
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};
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};
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mutex_lock(&st->buf_lock);
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mutex_lock(&st->buf_lock);
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st->tx[0] = ADE7758_READ_REG(reg_address);
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st->tx[0] = ADE7758_READ_REG(reg_address);
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st->tx[1] = 0;
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st->tx[1] = 0;
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st->tx[2] = 0;
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st->tx[2] = 0;
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spi_message_init(&msg);
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync(st->us, &msg);
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if (ret) {
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
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dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
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reg_address);
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reg_address);
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goto error_ret;
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goto error_ret;
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}
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}
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*val = (st->rx[1] << 8) | st->rx[2];
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*val = (st->rx[0] << 8) | st->rx[1];
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error_ret:
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error_ret:
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mutex_unlock(&st->buf_lock);
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mutex_unlock(&st->buf_lock);
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@ -184,9 +200,15 @@ static int ade7758_spi_read_reg_24(struct device *dev,
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struct spi_transfer xfers[] = {
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struct spi_transfer xfers[] = {
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{
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{
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.tx_buf = st->tx,
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.tx_buf = st->tx,
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.bits_per_word = 8,
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.len = 1,
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.delay_usecs = 4,
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},
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{
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.tx_buf = &st->tx[1],
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.rx_buf = st->rx,
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.rx_buf = st->rx,
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.bits_per_word = 8,
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.bits_per_word = 8,
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.len = 4,
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.len = 3,
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},
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},
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};
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};
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@ -197,14 +219,15 @@ static int ade7758_spi_read_reg_24(struct device *dev,
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st->tx[3] = 0;
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st->tx[3] = 0;
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spi_message_init(&msg);
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spi_message_init(&msg);
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spi_message_add_tail(xfers, &msg);
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spi_message_add_tail(&xfers[0], &msg);
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spi_message_add_tail(&xfers[1], &msg);
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ret = spi_sync(st->us, &msg);
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ret = spi_sync(st->us, &msg);
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if (ret) {
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if (ret) {
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dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
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dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
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reg_address);
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reg_address);
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goto error_ret;
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goto error_ret;
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}
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}
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*val = (st->rx[1] << 16) | (st->rx[2] << 8) | st->rx[3];
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*val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
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error_ret:
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error_ret:
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mutex_unlock(&st->buf_lock);
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mutex_unlock(&st->buf_lock);
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