jump label: Make dynamic no-op selection available outside of ftrace
Move Steve's code for finding the best 5-byte no-op from ftrace.c to alternative.c. The idea is that other consumers (in this case jump label) want to make use of that code. Signed-off-by: Jason Baron <jbaron@redhat.com> LKML-Reference: <96259ae74172dcac99c0020c249743c523a92e18.1284733808.git.jbaron@redhat.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org>
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@ -180,4 +180,12 @@ static inline void apply_paravirt(struct paravirt_patch_site *start,
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extern void *text_poke(void *addr, const void *opcode, size_t len);
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extern void *text_poke_smp(void *addr, const void *opcode, size_t len);
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#if defined(CONFIG_DYNAMIC_FTRACE)
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#define IDEAL_NOP_SIZE_5 5
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extern unsigned char ideal_nop5[IDEAL_NOP_SIZE_5];
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extern void arch_init_ideal_nop5(void);
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#else
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static inline void arch_init_ideal_nop5(void) {}
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#endif
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#endif /* _ASM_X86_ALTERNATIVE_H */
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@ -641,3 +641,67 @@ void *__kprobes text_poke_smp(void *addr, const void *opcode, size_t len)
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return addr;
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}
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#if defined(CONFIG_DYNAMIC_FTRACE)
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unsigned char ideal_nop5[IDEAL_NOP_SIZE_5];
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void __init arch_init_ideal_nop5(void)
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{
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extern const unsigned char ftrace_test_p6nop[];
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extern const unsigned char ftrace_test_nop5[];
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extern const unsigned char ftrace_test_jmp[];
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int faulted = 0;
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/*
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* There is no good nop for all x86 archs.
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* We will default to using the P6_NOP5, but first we
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* will test to make sure that the nop will actually
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* work on this CPU. If it faults, we will then
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* go to a lesser efficient 5 byte nop. If that fails
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* we then just use a jmp as our nop. This isn't the most
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* efficient nop, but we can not use a multi part nop
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* since we would then risk being preempted in the middle
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* of that nop, and if we enabled tracing then, it might
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* cause a system crash.
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*
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* TODO: check the cpuid to determine the best nop.
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*/
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asm volatile (
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"ftrace_test_jmp:"
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"jmp ftrace_test_p6nop\n"
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"nop\n"
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"nop\n"
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"nop\n" /* 2 byte jmp + 3 bytes */
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"ftrace_test_p6nop:"
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P6_NOP5
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"jmp 1f\n"
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"ftrace_test_nop5:"
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".byte 0x66,0x66,0x66,0x66,0x90\n"
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"1:"
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".section .fixup, \"ax\"\n"
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"2: movl $1, %0\n"
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" jmp ftrace_test_nop5\n"
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"3: movl $2, %0\n"
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" jmp 1b\n"
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".previous\n"
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_ASM_EXTABLE(ftrace_test_p6nop, 2b)
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_ASM_EXTABLE(ftrace_test_nop5, 3b)
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: "=r"(faulted) : "0" (faulted));
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switch (faulted) {
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case 0:
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pr_info("converting mcount calls to 0f 1f 44 00 00\n");
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memcpy(ideal_nop5, ftrace_test_p6nop, IDEAL_NOP_SIZE_5);
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break;
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case 1:
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pr_info("converting mcount calls to 66 66 66 66 90\n");
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memcpy(ideal_nop5, ftrace_test_nop5, IDEAL_NOP_SIZE_5);
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break;
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case 2:
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pr_info("converting mcount calls to jmp . + 5\n");
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memcpy(ideal_nop5, ftrace_test_jmp, IDEAL_NOP_SIZE_5);
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break;
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}
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}
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#endif
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@ -257,14 +257,9 @@ do_ftrace_mod_code(unsigned long ip, void *new_code)
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return mod_code_status;
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}
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static unsigned char ftrace_nop[MCOUNT_INSN_SIZE];
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static unsigned char *ftrace_nop_replace(void)
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{
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return ftrace_nop;
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return ideal_nop5;
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}
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static int
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@ -338,62 +333,6 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
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int __init ftrace_dyn_arch_init(void *data)
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{
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extern const unsigned char ftrace_test_p6nop[];
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extern const unsigned char ftrace_test_nop5[];
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extern const unsigned char ftrace_test_jmp[];
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int faulted = 0;
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/*
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* There is no good nop for all x86 archs.
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* We will default to using the P6_NOP5, but first we
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* will test to make sure that the nop will actually
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* work on this CPU. If it faults, we will then
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* go to a lesser efficient 5 byte nop. If that fails
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* we then just use a jmp as our nop. This isn't the most
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* efficient nop, but we can not use a multi part nop
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* since we would then risk being preempted in the middle
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* of that nop, and if we enabled tracing then, it might
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* cause a system crash.
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*
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* TODO: check the cpuid to determine the best nop.
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*/
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asm volatile (
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"ftrace_test_jmp:"
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"jmp ftrace_test_p6nop\n"
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"nop\n"
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"nop\n"
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"nop\n" /* 2 byte jmp + 3 bytes */
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"ftrace_test_p6nop:"
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P6_NOP5
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"jmp 1f\n"
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"ftrace_test_nop5:"
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".byte 0x66,0x66,0x66,0x66,0x90\n"
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"1:"
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".section .fixup, \"ax\"\n"
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"2: movl $1, %0\n"
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" jmp ftrace_test_nop5\n"
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"3: movl $2, %0\n"
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" jmp 1b\n"
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".previous\n"
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_ASM_EXTABLE(ftrace_test_p6nop, 2b)
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_ASM_EXTABLE(ftrace_test_nop5, 3b)
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: "=r"(faulted) : "0" (faulted));
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switch (faulted) {
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case 0:
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pr_info("converting mcount calls to 0f 1f 44 00 00\n");
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memcpy(ftrace_nop, ftrace_test_p6nop, MCOUNT_INSN_SIZE);
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break;
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case 1:
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pr_info("converting mcount calls to 66 66 66 66 90\n");
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memcpy(ftrace_nop, ftrace_test_nop5, MCOUNT_INSN_SIZE);
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break;
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case 2:
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pr_info("converting mcount calls to jmp . + 5\n");
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memcpy(ftrace_nop, ftrace_test_jmp, MCOUNT_INSN_SIZE);
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break;
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}
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/* The return code is retured via data */
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*(unsigned long *)data = 0;
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@ -112,6 +112,7 @@
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#include <asm/numa_64.h>
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#endif
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#include <asm/mce.h>
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#include <asm/alternative.h>
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/*
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* end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
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@ -726,6 +727,7 @@ void __init setup_arch(char **cmdline_p)
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{
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int acpi = 0;
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int k8 = 0;
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unsigned long flags;
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#ifdef CONFIG_X86_32
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memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
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@ -1071,6 +1073,10 @@ void __init setup_arch(char **cmdline_p)
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x86_init.oem.banner();
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mcheck_init();
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local_irq_save(flags);
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arch_init_ideal_nop5();
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local_irq_restore(flags);
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}
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#ifdef CONFIG_X86_32
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