clk: clps711x: Migrate to clk_hw based OF and registration APIs
Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers while registering clks in these drivers, allowing us to move closer to a clear split of consumer and provider clk APIs. Cc: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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@ -40,9 +40,8 @@ static const struct clk_div_table timer_div_table[] = {
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};
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struct clps711x_clk {
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struct clk_onecell_data clk_data;
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spinlock_t lock;
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struct clk *clks[CLPS711X_CLK_MAX];
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spinlock_t lock;
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struct clk_hw_onecell_data clk_data;
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};
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static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
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@ -55,7 +54,9 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
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if (!base)
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return ERR_PTR(-ENOMEM);
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clps711x_clk = kzalloc(sizeof(*clps711x_clk), GFP_KERNEL);
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clps711x_clk = kzalloc(sizeof(*clps711x_clk) +
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sizeof(*clps711x_clk->clk_data.hws) * CLPS711X_CLK_MAX,
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GFP_KERNEL);
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if (!clps711x_clk)
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return ERR_PTR(-ENOMEM);
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@ -106,40 +107,40 @@ static struct clps711x_clk * __init _clps711x_clk_init(void __iomem *base,
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tmp |= SYSCON1_TC2M | SYSCON1_TC2S;
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writel(tmp, base + CLPS711X_SYSCON1);
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clps711x_clk->clks[CLPS711X_CLK_DUMMY] =
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clk_register_fixed_rate(NULL, "dummy", NULL, 0, 0);
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clps711x_clk->clks[CLPS711X_CLK_CPU] =
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clk_register_fixed_rate(NULL, "cpu", NULL, 0, f_cpu);
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clps711x_clk->clks[CLPS711X_CLK_BUS] =
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clk_register_fixed_rate(NULL, "bus", NULL, 0, f_bus);
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clps711x_clk->clks[CLPS711X_CLK_PLL] =
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clk_register_fixed_rate(NULL, "pll", NULL, 0, f_pll);
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clps711x_clk->clks[CLPS711X_CLK_TIMERREF] =
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clk_register_fixed_rate(NULL, "timer_ref", NULL, 0, f_tim);
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clps711x_clk->clks[CLPS711X_CLK_TIMER1] =
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clk_register_divider_table(NULL, "timer1", "timer_ref", 0,
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clps711x_clk->clk_data.hws[CLPS711X_CLK_DUMMY] =
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clk_hw_register_fixed_rate(NULL, "dummy", NULL, 0, 0);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_CPU] =
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clk_hw_register_fixed_rate(NULL, "cpu", NULL, 0, f_cpu);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_BUS] =
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clk_hw_register_fixed_rate(NULL, "bus", NULL, 0, f_bus);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_PLL] =
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clk_hw_register_fixed_rate(NULL, "pll", NULL, 0, f_pll);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMERREF] =
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clk_hw_register_fixed_rate(NULL, "timer_ref", NULL, 0, f_tim);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER1] =
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clk_hw_register_divider_table(NULL, "timer1", "timer_ref", 0,
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base + CLPS711X_SYSCON1, 5, 1, 0,
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timer_div_table, &clps711x_clk->lock);
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clps711x_clk->clks[CLPS711X_CLK_TIMER2] =
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clk_register_divider_table(NULL, "timer2", "timer_ref", 0,
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clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER2] =
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clk_hw_register_divider_table(NULL, "timer2", "timer_ref", 0,
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base + CLPS711X_SYSCON1, 7, 1, 0,
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timer_div_table, &clps711x_clk->lock);
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clps711x_clk->clks[CLPS711X_CLK_PWM] =
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clk_register_fixed_rate(NULL, "pwm", NULL, 0, f_pwm);
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clps711x_clk->clks[CLPS711X_CLK_SPIREF] =
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clk_register_fixed_rate(NULL, "spi_ref", NULL, 0, f_spi);
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clps711x_clk->clks[CLPS711X_CLK_SPI] =
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clk_register_divider_table(NULL, "spi", "spi_ref", 0,
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clps711x_clk->clk_data.hws[CLPS711X_CLK_PWM] =
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clk_hw_register_fixed_rate(NULL, "pwm", NULL, 0, f_pwm);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_SPIREF] =
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clk_hw_register_fixed_rate(NULL, "spi_ref", NULL, 0, f_spi);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_SPI] =
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clk_hw_register_divider_table(NULL, "spi", "spi_ref", 0,
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base + CLPS711X_SYSCON1, 16, 2, 0,
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spi_div_table, &clps711x_clk->lock);
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clps711x_clk->clks[CLPS711X_CLK_UART] =
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clk_register_fixed_factor(NULL, "uart", "bus", 0, 1, 10);
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clps711x_clk->clks[CLPS711X_CLK_TICK] =
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clk_register_fixed_rate(NULL, "tick", NULL, 0, 64);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_UART] =
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clk_hw_register_fixed_factor(NULL, "uart", "bus", 0, 1, 10);
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clps711x_clk->clk_data.hws[CLPS711X_CLK_TICK] =
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clk_hw_register_fixed_rate(NULL, "tick", NULL, 0, 64);
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for (i = 0; i < CLPS711X_CLK_MAX; i++)
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if (IS_ERR(clps711x_clk->clks[i]))
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if (IS_ERR(clps711x_clk->clk_data.hws[i]))
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pr_err("clk %i: register failed with %ld\n",
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i, PTR_ERR(clps711x_clk->clks[i]));
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i, PTR_ERR(clps711x_clk->clk_data.hws[i]));
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return clps711x_clk;
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}
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@ -153,17 +154,17 @@ void __init clps711x_clk_init(void __iomem *base)
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BUG_ON(IS_ERR(clps711x_clk));
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/* Clocksource */
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clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_TIMER1],
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clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER1],
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NULL, "clps711x-timer.0");
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clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_TIMER2],
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clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_TIMER2],
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NULL, "clps711x-timer.1");
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/* Drivers */
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clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_PWM],
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clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_PWM],
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NULL, "clps711x-pwm");
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clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_UART],
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clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_UART],
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NULL, "clps711x-uart.0");
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clk_register_clkdev(clps711x_clk->clks[CLPS711X_CLK_UART],
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clk_hw_register_clkdev(clps711x_clk->clk_data.hws[CLPS711X_CLK_UART],
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NULL, "clps711x-uart.1");
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}
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@ -179,10 +180,9 @@ static void __init clps711x_clk_init_dt(struct device_node *np)
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clps711x_clk = _clps711x_clk_init(base, fref);
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BUG_ON(IS_ERR(clps711x_clk));
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clps711x_clk->clk_data.clks = clps711x_clk->clks;
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clps711x_clk->clk_data.clk_num = CLPS711X_CLK_MAX;
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of_clk_add_provider(np, of_clk_src_onecell_get,
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&clps711x_clk->clk_data);
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clps711x_clk->clk_data.num = CLPS711X_CLK_MAX;
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of_clk_add_hw_provider(np, of_clk_hw_onecell_get,
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&clps711x_clk->clk_data);
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}
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CLK_OF_DECLARE(clps711x, "cirrus,ep7209-clk", clps711x_clk_init_dt);
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#endif
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