staging: comedi: addi_apci_3xxx: rename 'dw_AiBase' in private data
This variable holds the ioremap'ed PCI bar 3 used to read/write the analog input and output registers. Rename it to simply 'mmio'. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -27,7 +27,7 @@ static int i_APCI3XXX_TestConversionStarted(struct comedi_device *dev)
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{
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struct apci3xxx_private *devpriv = dev->private;
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if ((readl(devpriv->dw_AiBase + 8) & 0x80000UL) == 0x80000UL)
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if ((readl(devpriv->mmio + 8) & 0x80000) == 0x80000)
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return 1;
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else
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return 0;
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@ -164,13 +164,13 @@ static int i_APCI3XXX_AnalogInputConfigOperatingMode(struct comedi_device *dev,
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/*******************************/
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writel((unsigned int)b_TimeBase,
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devpriv->dw_AiBase + 36);
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devpriv->mmio + 36);
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/**************************/
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/* Set the convert timing */
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/*************************/
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writel(dw_ReloadValue, devpriv->dw_AiBase + 32);
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writel(dw_ReloadValue, devpriv->mmio + 32);
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} else {
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/**************************/
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/* Any conversion started */
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@ -304,29 +304,29 @@ static int apci3xxx_ai_insn_read(struct comedi_device *dev,
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return -EBUSY;
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/* Clear the FIFO */
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writel(0x10000, devpriv->dw_AiBase + 12);
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writel(0x10000, devpriv->mmio + 12);
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/* Get and save the delay mode */
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delay_mode = readl(devpriv->dw_AiBase + 4);
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delay_mode = readl(devpriv->mmio + 4);
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delay_mode &= 0xfffffef0;
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/* Channel configuration selection */
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writel(delay_mode, devpriv->dw_AiBase + 4);
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writel(delay_mode, devpriv->mmio + 4);
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/* Make the configuration */
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val = (range & 3) | ((range >> 2) << 6) |
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(devpriv->b_SingelDiff << 7);
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writel(val, devpriv->dw_AiBase + 0);
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writel(val, devpriv->mmio + 0);
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/* Channel selection */
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writel(delay_mode | 0x100, devpriv->dw_AiBase + 4);
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writel(chan, devpriv->dw_AiBase + 0);
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writel(delay_mode | 0x100, devpriv->mmio + 4);
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writel(chan, devpriv->mmio + 0);
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/* Restore delay mode */
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writel(delay_mode, devpriv->dw_AiBase + 4);
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writel(delay_mode, devpriv->mmio + 4);
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/* Set the number of sequence to 1 */
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writel(1, devpriv->dw_AiBase + 48);
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writel(1, devpriv->mmio + 48);
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/* Save the interrupt flag */
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devpriv->b_EocEosInterrupt = use_interrupt;
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@ -338,20 +338,20 @@ static int apci3xxx_ai_insn_read(struct comedi_device *dev,
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if (!use_interrupt) {
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for (i = 0; i < insn->n; i++) {
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/* Start the conversion */
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writel(0x80000, devpriv->dw_AiBase + 8);
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writel(0x80000, devpriv->mmio + 8);
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/* Wait the EOS */
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do {
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val = readl(devpriv->dw_AiBase + 20);
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val = readl(devpriv->mmio + 20);
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val &= 0x1;
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} while (!val);
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/* Read the analog value */
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data[i] = readl(devpriv->dw_AiBase + 28);
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data[i] = readl(devpriv->mmio + 28);
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}
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} else {
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/* Start the conversion */
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writel(0x180000, devpriv->dw_AiBase + 8);
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writel(0x180000, devpriv->mmio + 8);
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}
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return insn->n;
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@ -367,7 +367,7 @@ static const struct apci3xxx_boardinfo apci3xxx_boardtypes[] = {
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};
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struct apci3xxx_private {
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void __iomem *dw_AiBase;
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void __iomem *mmio;
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unsigned int ui_AiNbrofChannels; /* how many channels is measured */
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unsigned int ui_AiReadData[32];
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unsigned char b_EocEosInterrupt;
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@ -387,10 +387,10 @@ static irqreturn_t apci3xxx_irq_handler(int irq, void *d)
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int i;
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/* Test if interrupt occur */
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status = readl(devpriv->dw_AiBase + 16);
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status = readl(devpriv->mmio + 16);
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if ((status & 0x2) == 0x2) {
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/* Reset the interrupt */
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writel(status, devpriv->dw_AiBase + 16);
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writel(status, devpriv->mmio + 16);
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/* Test if interrupt enabled */
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if (devpriv->b_EocEosInterrupt == 1) {
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@ -398,7 +398,7 @@ static irqreturn_t apci3xxx_irq_handler(int irq, void *d)
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for (i = 0; i < devpriv->ui_AiNbrofChannels; i++) {
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unsigned int val;
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val = readl(devpriv->dw_AiBase + 28);
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val = readl(devpriv->mmio + 28);
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devpriv->ui_AiReadData[i] = val;
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}
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@ -425,14 +425,14 @@ static int apci3xxx_ao_insn_write(struct comedi_device *dev,
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for (i = 0; i < insn->n; i++) {
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/* Set the range selection */
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writel(range, devpriv->dw_AiBase + 96);
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writel(range, devpriv->mmio + 96);
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/* Write the analog value to the selected channel */
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writel((data[i] << 8) | chan, devpriv->dw_AiBase + 100);
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writel((data[i] << 8) | chan, devpriv->mmio + 100);
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/* Wait the end of transfer */
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do {
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status = readl(devpriv->dw_AiBase + 96);
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status = readl(devpriv->mmio + 96);
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} while ((status & 0x100) != 0x100);
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}
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@ -558,18 +558,18 @@ static int apci3xxx_reset(struct comedi_device *dev)
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devpriv->b_EocEosInterrupt = 0;
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/* Clear the start command */
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writel(0, devpriv->dw_AiBase + 8);
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writel(0, devpriv->mmio + 8);
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/* Reset the interrupt flags */
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val = readl(devpriv->dw_AiBase + 16);
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writel(val, devpriv->dw_AiBase + 16);
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val = readl(devpriv->mmio + 16);
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writel(val, devpriv->mmio + 16);
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/* clear the EOS */
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readl(devpriv->dw_AiBase + 20);
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readl(devpriv->mmio + 20);
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/* Clear the FIFO */
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for (i = 0; i < 16; i++)
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val = readl(devpriv->dw_AiBase + 28);
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val = readl(devpriv->mmio + 28);
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/* Enable the interrupt */
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enable_irq(dev->irq);
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@ -603,7 +603,7 @@ static int apci3xxx_auto_attach(struct comedi_device *dev,
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return ret;
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dev->iobase = pci_resource_start(pcidev, 2);
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devpriv->dw_AiBase = pci_ioremap_bar(pcidev, 3);
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devpriv->mmio = pci_ioremap_bar(pcidev, 3);
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if (pcidev->irq > 0) {
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ret = request_irq(pcidev->irq, apci3xxx_irq_handler,
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@ -717,8 +717,8 @@ static void apci3xxx_detach(struct comedi_device *dev)
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apci3xxx_reset(dev);
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if (dev->irq)
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free_irq(dev->irq, dev);
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if (devpriv->dw_AiBase)
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iounmap(devpriv->dw_AiBase);
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if (devpriv->mmio)
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iounmap(devpriv->mmio);
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}
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comedi_pci_disable(dev);
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}
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