powerpc/64s: Reduce exception alignment
Exception handlers are aligned to 128 bytes (L1 cache) on 64s, which is overkill. It can reduce the icache footprint of any individual exception path. However taken as a whole, the expansion in icache footprint seems likely to be counter-productive and cause more total misses. Create IFETCH_ALIGN_SHIFT/BYTES, which should give optimal ifetch alignment with much more reasonable alignment. This saves 1792 bytes from head_64.o text with an allmodconfig build. Other subarchitectures should define appropriate IFETCH_ALIGN_SHIFT values if this becomes more widely used. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -20,12 +20,15 @@
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#endif
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#else /* CONFIG_PPC64 */
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#define L1_CACHE_SHIFT 7
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#define IFETCH_ALIGN_SHIFT 4 /* POWER8,9 */
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#endif
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#define SMP_CACHE_BYTES L1_CACHE_BYTES
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#define IFETCH_ALIGN_BYTES (1 << IFETCH_ALIGN_SHIFT)
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#if defined(__powerpc64__) && !defined(__ASSEMBLY__)
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struct ppc64_caches {
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u32 dsize; /* L1 d-cache size */
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@ -95,12 +95,12 @@ end_##sname:
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#define __FIXED_SECTION_ENTRY_BEGIN(sname, name, __align) \
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USE_FIXED_SECTION(sname); \
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.align __align; \
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.balign __align; \
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.global name; \
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name:
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#define FIXED_SECTION_ENTRY_BEGIN(sname, name) \
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__FIXED_SECTION_ENTRY_BEGIN(sname, name, 0)
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__FIXED_SECTION_ENTRY_BEGIN(sname, name, IFETCH_ALIGN_BYTES)
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#define FIXED_SECTION_ENTRY_BEGIN_LOCATION(sname, name, start) \
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USE_FIXED_SECTION(sname); \
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@ -203,9 +203,9 @@ name:
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#define EXC_VIRT_END(name, start, end) \
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FIXED_SECTION_ENTRY_END_LOCATION(virt_vectors, exc_virt_##start##_##name, end)
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#define EXC_COMMON_BEGIN(name) \
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#define EXC_COMMON_BEGIN(name) \
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USE_TEXT_SECTION(); \
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.align 7; \
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.balign IFETCH_ALIGN_BYTES; \
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.global name; \
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DEFINE_FIXED_SYMBOL(name); \
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name:
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@ -1403,7 +1403,7 @@ USE_TEXT_SECTION()
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/*
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* Hash table stuff
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*/
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.align 7
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.balign IFETCH_ALIGN_BYTES
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do_hash_page:
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#ifdef CONFIG_PPC_STD_MMU_64
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andis. r0,r4,0xa410 /* weird error? */
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