drm/exynos: mixer: enable NV12MT support for the video plane
The video processor supports a tiled version of the NV12 format,
known as NV12MT in V4L2 terms. The support was removed in commit
083500baef
due to not being a real
pixel format, but rather NV12 with a special memory layout.
With the introduction of FB modifiers, we can now properly support
this format again.
Tested with a hacked up modetest from libdrm's test suite on
an ODROID-X2 (Exynos4412).
Signed-off-by: Tobias Jakobi <tjakobi@math.uni-bielefeld.de>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
parent
dc500cfb86
commit
f40031c231
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@ -91,6 +91,7 @@ struct exynos_drm_plane {
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#define EXYNOS_DRM_PLANE_CAP_DOUBLE (1 << 0)
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#define EXYNOS_DRM_PLANE_CAP_SCALE (1 << 1)
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#define EXYNOS_DRM_PLANE_CAP_ZPOS (1 << 2)
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#define EXYNOS_DRM_PLANE_CAP_TILE (1 << 3)
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/*
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* Exynos DRM plane configuration structure.
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@ -225,4 +225,6 @@ void exynos_drm_mode_config_init(struct drm_device *dev)
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dev->mode_config.funcs = &exynos_drm_mode_config_funcs;
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dev->mode_config.helper_private = &exynos_drm_mode_config_helpers;
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dev->mode_config.allow_fb_modifiers = true;
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}
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@ -178,6 +178,29 @@ static struct drm_plane_funcs exynos_plane_funcs = {
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.atomic_destroy_state = exynos_drm_plane_destroy_state,
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};
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static int
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exynos_drm_plane_check_format(const struct exynos_drm_plane_config *config,
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struct exynos_drm_plane_state *state)
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{
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struct drm_framebuffer *fb = state->base.fb;
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switch (fb->modifier) {
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case DRM_FORMAT_MOD_SAMSUNG_64_32_TILE:
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if (!(config->capabilities & EXYNOS_DRM_PLANE_CAP_TILE))
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return -ENOTSUPP;
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break;
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case DRM_FORMAT_MOD_LINEAR:
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break;
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default:
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DRM_ERROR("unsupported pixel format modifier");
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return -ENOTSUPP;
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}
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return 0;
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}
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static int
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exynos_drm_plane_check_size(const struct exynos_drm_plane_config *config,
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struct exynos_drm_plane_state *state)
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@ -222,6 +245,10 @@ static int exynos_plane_atomic_check(struct drm_plane *plane,
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/* translate state into exynos_state */
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exynos_plane_mode_set(exynos_state);
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ret = exynos_drm_plane_check_format(exynos_plane->config, exynos_state);
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if (ret)
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return ret;
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ret = exynos_drm_plane_check_size(exynos_plane->config, exynos_state);
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return ret;
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}
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@ -148,7 +148,8 @@ static const struct exynos_drm_plane_config plane_configs[MIXER_WIN_NR] = {
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.pixel_formats = vp_formats,
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.num_pixel_formats = ARRAY_SIZE(vp_formats),
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.capabilities = EXYNOS_DRM_PLANE_CAP_SCALE |
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EXYNOS_DRM_PLANE_CAP_ZPOS,
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EXYNOS_DRM_PLANE_CAP_ZPOS |
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EXYNOS_DRM_PLANE_CAP_TILE,
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},
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};
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@ -500,6 +501,9 @@ static void vp_video_buffer(struct mixer_context *ctx,
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return;
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}
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if (fb->modifier == DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
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tiled_mode = true;
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luma_addr[0] = exynos_drm_fb_dma_addr(fb, 0);
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chroma_addr[0] = exynos_drm_fb_dma_addr(fb, 1);
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