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ARM: mvebu: MPIC: read number of interrupts from control register 

Read the number of MPIC interrupts from the controller and only register
that many.

[gregory.clement@free-electrons.com: rename armada symbol name to fit
with new name: armada_370_xp]

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Lior Amsalem <alior@marvell.com>
This commit is contained in:
Ben Dooks 2012-06-04 18:50:12 +02:00 committed by Arnd Bergmann
parent 75f41273ec
commit f3e16ccd03
1 changed files with 6 additions and 3 deletions
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9
arch/arm/mach-mvebu/irq-armada-370-xp.c
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@ -29,13 +29,12 @@
#define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48) #define ARMADA_370_XP_INT_SET_MASK_OFFS (0x48)
#define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C) #define ARMADA_370_XP_INT_CLEAR_MASK_OFFS (0x4C)
#define ARMADA_370_XP_INT_CONTROL (0x00)
#define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30) #define ARMADA_370_XP_INT_SET_ENABLE_OFFS (0x30)
#define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34) #define ARMADA_370_XP_INT_CLEAR_ENABLE_OFFS (0x34)
#define ARMADA_370_XP_CPU_INTACK_OFFS (0x44) #define ARMADA_370_XP_CPU_INTACK_OFFS (0x44)
#define ARMADA_370_XP_NR_IRQS (115)
static void __iomem *per_cpu_int_base; static void __iomem *per_cpu_int_base;
static void __iomem *main_int_base; static void __iomem *main_int_base;
static struct irq_domain *armada_370_xp_mpic_domain; static struct irq_domain *armada_370_xp_mpic_domain;
@ -81,14 +80,18 @@ static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
static int __init armada_370_xp_mpic_of_init(struct device_node *node, static int __init armada_370_xp_mpic_of_init(struct device_node *node,
struct device_node *parent) struct device_node *parent)
{ {
u32 control;
main_int_base = of_iomap(node, 0); main_int_base = of_iomap(node, 0);
per_cpu_int_base = of_iomap(node, 1); per_cpu_int_base = of_iomap(node, 1);
BUG_ON(!main_int_base); BUG_ON(!main_int_base);
BUG_ON(!per_cpu_int_base); BUG_ON(!per_cpu_int_base);
control = readl(main_int_base + ARMADA_370_XP_INT_CONTROL);
armada_370_xp_mpic_domain = armada_370_xp_mpic_domain =
irq_domain_add_linear(node, ARMADA_370_XP_NR_IRQS, irq_domain_add_linear(node, (control >> 2) & 0x3ff,
&armada_370_xp_mpic_irq_ops, NULL); &armada_370_xp_mpic_irq_ops, NULL);
if (!armada_370_xp_mpic_domain) if (!armada_370_xp_mpic_domain)