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drm/i915: Use complete virtual address range on 32-bit platforms 

With the offset length being taken care of in ("drm/i915/gtt: Allow >=
4GB offsets in X86_32"), the code should be finally safe in 32-bit
kernels.

This reverts commit 501fd70fca
Author: Michel Thierry <michel.thierry@intel.com>
Date:   Fri May 29 14:15:05 2015 +0100

    drm/i915: limit PPGTT size to 2GB in 32-bit platforms

Signed-off-by: Michel Thierry <michel.thierry@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Michel Thierry 2015-08-07 17:40:18 +01:00 committed by Daniel Vetter
parent 088e0df402
commit f365f91181
1 changed files with 0 additions and 8 deletions
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8
drivers/gpu/drm/i915/i915_gem_gtt.c
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@ -1480,14 +1480,6 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
goto free_scratch;
ppgtt->base.total = 1ULL << 32;
if (IS_ENABLED(CONFIG_X86_32))
/* While we have a proliferation of size_t variables
* we cannot represent the full ppgtt size on 32bit,
* so limit it to the same size as the GGTT (currently
* 2GiB).
*/
ppgtt->base.total = to_i915(ppgtt->base.dev)->gtt.base.total;
ppgtt->switch_mm = gen8_legacy_mm_switch;
trace_i915_page_directory_pointer_entry_alloc(&ppgtt->base,
0, 0,