The i.MX fixes for 3.16:

- Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
    because controller base CD/WP is not working in esdhc driver due to
    runtime PM support
  - A couple of random ventana gw5xxx board fixes
  - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
    IPUv3 driver out of staging tree
  - Fix enet/fec clock selection on imx6sl
  - Fix display node on imx53-m53evk board
  - A couple of Cubox-i updates from Russell, which were omitted from
    the merge window due to dependency
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Merge tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into fixes

Pull "i.MX fixes for 3.16" from Shawn Guo:

 - Use GPIO for card CD/WP on imx51-babbage and eukrea-mbimxsd51,
   because controller base CD/WP is not working in esdhc driver due to
   runtime PM support
 - A couple of random ventana gw5xxx board fixes
 - Add IMX_IPUV3_CORE back to defconfig, which gets lost when moving
   IPUv3 driver out of staging tree
 - Fix enet/fec clock selection on imx6sl
 - Fix display node on imx53-m53evk board
 - A couple of Cubox-i updates from Russell, which were omitted from
   the merge window due to dependency

* tag 'imx-fixes-3.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx51-eukrea-mbimxsd51-baseboard: unbreak esdhc.
  ARM: dts: imx51-babbage: Fix esdhc setup
  ARM: dts: mx5: Move the display out of soc {} node
  ARM: dts: mx5: Fix IPU port node placement
  ARM: imx_v6_v7_defconfig: Enable CONFIG_IMX_IPUV3_CORE
  ARM: dts: hummingboard/cubox-i: move usb otg configuration to platform level
  ARM: dts: cubox-i: add support for PWM-driven front panel LED
  ARM: dts: imx6: ventana: correct gw52xx sgtl5000 clock source
  ARM: dts: imx6qdl-gw5xxx: Fix Linear Technology vendor prefix
  ARM: dts: imx6: ventana: fix include typo
  ARM: dts: imx6sl: correct the fec ipg clock source
  ARM: imx6sl: add missing enet clock for imx6sl
This commit is contained in:
Arnd Bergmann 2014-06-23 14:12:48 +02:00
commit f340a59f38
14 changed files with 72 additions and 47 deletions

View File

@ -315,15 +315,15 @@
&esdhc1 { &esdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1>; pinctrl-0 = <&pinctrl_esdhc1>;
fsl,cd-controller; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
fsl,wp-controller; wp-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
}; };
&esdhc2 { &esdhc2 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc2>; pinctrl-0 = <&pinctrl_esdhc2>;
cd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; cd-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; wp-gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>;
status = "okay"; status = "okay";
}; };
@ -468,8 +468,8 @@
MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
MX51_PAD_GPIO1_0__SD1_CD 0x20d5 MX51_PAD_GPIO1_0__GPIO1_0 0x100
MX51_PAD_GPIO1_1__SD1_WP 0x20d5 MX51_PAD_GPIO1_1__GPIO1_1 0x100
>; >;
}; };

View File

@ -107,7 +107,7 @@
&esdhc1 { &esdhc1 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>; pinctrl-0 = <&pinctrl_esdhc1 &pinctrl_esdhc1_cd>;
fsl,cd-controller; cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
status = "okay"; status = "okay";
}; };
@ -206,7 +206,7 @@
pinctrl_esdhc1_cd: esdhc1_cd { pinctrl_esdhc1_cd: esdhc1_cd {
fsl,pins = < fsl,pins = <
MX51_PAD_GPIO1_0__SD1_CD 0x20d5 MX51_PAD_GPIO1_0__GPIO1_0 0xd5
>; >;
}; };

View File

@ -21,7 +21,6 @@
<0xb0000000 0x20000000>; <0xb0000000 0x20000000>;
}; };
soc {
display1: display@di1 { display1: display@di1 {
compatible = "fsl,imx-parallel-display"; compatible = "fsl,imx-parallel-display";
interface-pix-fmt = "bgr666"; interface-pix-fmt = "bgr666";
@ -43,7 +42,6 @@
vsync-active = <1>; vsync-active = <1>;
}; };
}; };
};
port { port {
display1_in: endpoint { display1_in: endpoint {

View File

@ -143,6 +143,14 @@
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>; fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0>;
}; };
pinctrl_hummingboard_usbotg_id: hummingboard-usbotg-id {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus { pinctrl_hummingboard_usbotg_vbus: hummingboard-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>; fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0>;
}; };
@ -178,6 +186,8 @@
}; };
&usbotg { &usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_hummingboard_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>; vbus-supply = <&reg_usbotg_vbus>;
status = "okay"; status = "okay";
}; };

View File

@ -11,7 +11,7 @@
/dts-v1/; /dts-v1/;
#include "imx6q.dtsi" #include "imx6q.dtsi"
#include "imx6qdl-gw54xx.dtsi" #include "imx6qdl-gw51xx.dtsi"
/ { / {
model = "Gateworks Ventana i.MX6 Quad GW51XX"; model = "Gateworks Ventana i.MX6 Quad GW51XX";

View File

@ -12,6 +12,19 @@
pinctrl-0 = <&pinctrl_cubox_i_ir>; pinctrl-0 = <&pinctrl_cubox_i_ir>;
}; };
pwmleds {
compatible = "pwm-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_pwm1>;
front {
active-low;
label = "imx6:red:front";
max-brightness = <248>;
pwms = <&pwm1 0 50000>;
};
};
regulators { regulators {
compatible = "simple-bus"; compatible = "simple-bus";
@ -109,6 +122,10 @@
>; >;
}; };
pinctrl_cubox_i_pwm1: cubox-i-pwm1-front-led {
fsl,pins = <MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0>;
};
pinctrl_cubox_i_spdif: cubox-i-spdif { pinctrl_cubox_i_spdif: cubox-i-spdif {
fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>; fsl,pins = <MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x13091>;
}; };
@ -117,6 +134,14 @@
fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>; fsl,pins = <MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x4001b0b0>;
}; };
pinctrl_cubox_i_usbotg_id: cubox-i-usbotg-id {
/*
* The Cubox-i pulls this low, but as it's pointless
* leaving it as a pull-up, even if it is just 10uA.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus { pinctrl_cubox_i_usbotg_vbus: cubox-i-usbotg-vbus {
fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>; fsl,pins = <MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x4001b0b0>;
}; };
@ -153,6 +178,8 @@
}; };
&usbotg { &usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_cubox_i_usbotg_id>;
vbus-supply = <&reg_usbotg_vbus>; vbus-supply = <&reg_usbotg_vbus>;
status = "okay"; status = "okay";
}; };

View File

@ -161,7 +161,7 @@
status = "okay"; status = "okay";
pmic: ltc3676@3c { pmic: ltc3676@3c {
compatible = "ltc,ltc3676"; compatible = "lltc,ltc3676";
reg = <0x3c>; reg = <0x3c>;
regulators { regulators {

View File

@ -220,7 +220,7 @@
}; };
pmic: ltc3676@3c { pmic: ltc3676@3c {
compatible = "ltc,ltc3676"; compatible = "lltc,ltc3676";
reg = <0x3c>; reg = <0x3c>;
regulators { regulators {
@ -288,7 +288,7 @@
codec: sgtl5000@0a { codec: sgtl5000@0a {
compatible = "fsl,sgtl5000"; compatible = "fsl,sgtl5000";
reg = <0x0a>; reg = <0x0a>;
clocks = <&clks 169>; clocks = <&clks 201>;
VDDA-supply = <&reg_1p8v>; VDDA-supply = <&reg_1p8v>;
VDDIO-supply = <&reg_3p3v>; VDDIO-supply = <&reg_3p3v>;
}; };

View File

@ -234,7 +234,7 @@
}; };
pmic: ltc3676@3c { pmic: ltc3676@3c {
compatible = "ltc,ltc3676"; compatible = "lltc,ltc3676";
reg = <0x3c>; reg = <0x3c>;
regulators { regulators {

View File

@ -10,14 +10,6 @@
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>; >;
}; };
pinctrl_microsom_usbotg: microsom-usbotg {
/*
* Similar to pinctrl_usbotg_2, but we want it
* pulled down for a fixed host connection.
*/
fsl,pins = <MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x13059>;
};
}; };
}; };
@ -26,8 +18,3 @@
pinctrl-0 = <&pinctrl_microsom_uart1>; pinctrl-0 = <&pinctrl_microsom_uart1>;
status = "okay"; status = "okay";
}; };
&usbotg {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_usbotg>;
};

View File

@ -686,7 +686,7 @@
compatible = "fsl,imx6sl-fec", "fsl,imx25-fec"; compatible = "fsl,imx6sl-fec", "fsl,imx25-fec";
reg = <0x02188000 0x4000>; reg = <0x02188000 0x4000>;
interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SL_CLK_ENET_REF>, clocks = <&clks IMX6SL_CLK_ENET>,
<&clks IMX6SL_CLK_ENET_REF>; <&clks IMX6SL_CLK_ENET_REF>;
clock-names = "ipg", "ahb"; clock-names = "ipg", "ahb";
status = "disabled"; status = "disabled";

View File

@ -186,6 +186,7 @@ CONFIG_VIDEO_MX3=y
CONFIG_V4L_MEM2MEM_DRIVERS=y CONFIG_V4L_MEM2MEM_DRIVERS=y
CONFIG_VIDEO_CODA=y CONFIG_VIDEO_CODA=y
CONFIG_SOC_CAMERA_OV2640=y CONFIG_SOC_CAMERA_OV2640=y
CONFIG_IMX_IPUV3_CORE=y
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_SIMPLE=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LCD_SUPPORT=y

View File

@ -312,6 +312,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2); clks[IMX6SL_CLK_ECSPI2] = imx_clk_gate2("ecspi2", "ecspi_root", base + 0x6c, 2);
clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4); clks[IMX6SL_CLK_ECSPI3] = imx_clk_gate2("ecspi3", "ecspi_root", base + 0x6c, 4);
clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6); clks[IMX6SL_CLK_ECSPI4] = imx_clk_gate2("ecspi4", "ecspi_root", base + 0x6c, 6);
clks[IMX6SL_CLK_ENET] = imx_clk_gate2("enet", "ipg", base + 0x6c, 10);
clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12); clks[IMX6SL_CLK_EPIT1] = imx_clk_gate2("epit1", "perclk", base + 0x6c, 12);
clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14); clks[IMX6SL_CLK_EPIT2] = imx_clk_gate2("epit2", "perclk", base + 0x6c, 14);
clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16); clks[IMX6SL_CLK_EXTERN_AUDIO] = imx_clk_gate2("extern_audio", "extern_audio_podf", base + 0x6c, 16);

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@ -145,6 +145,7 @@
#define IMX6SL_CLK_USDHC4 132 #define IMX6SL_CLK_USDHC4 132
#define IMX6SL_CLK_PLL4_AUDIO_DIV 133 #define IMX6SL_CLK_PLL4_AUDIO_DIV 133
#define IMX6SL_CLK_SPBA 134 #define IMX6SL_CLK_SPBA 134
#define IMX6SL_CLK_END 135 #define IMX6SL_CLK_ENET 135
#define IMX6SL_CLK_END 136
#endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */ #endif /* __DT_BINDINGS_CLOCK_IMX6SL_H */