[ALSA] Fix missing suspend/resume-code for ens1371
Modules: ENS1370/1+ driver This patch fixes missing suspend/resume-code for snd-ens1371 (but not for snd-ens1370) Signed-off-by: Kurt J. Bosch <kjb-temp-2005@gmx.de> Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Kurt J. Bosch
Jaroslav Kysela
parent
26741b5512
commit
f31a31b902
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@ -19,6 +19,13 @@
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*
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*/
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/* Power-Management-Code ( CONFIG_PM )
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* for ens1371 only ( FIXME )
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* derived from cs4281.c, atiixp.c and via82xx.c
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* using http://www.alsa-project.org/~iwai/writing-an-alsa-driver/c1540.htm
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* by Kurt J. Bosch
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*/
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#include <sound/driver.h>
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#include <asm/io.h>
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#include <linux/delay.h>
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@ -1924,6 +1931,117 @@ static struct {
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};
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#endif
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static void snd_ensoniq_chip_init(ensoniq_t * ensoniq)
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{
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#ifdef CHIP1371
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int idx;
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struct pci_dev *pci = ensoniq->pci;
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#endif
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// this code was part of snd_ensoniq_create before intruduction of suspend/resume
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#ifdef CHIP1370
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outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
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outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
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outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE));
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outl(ensoniq->dma_bug.addr, ES_REG(ensoniq, PHANTOM_FRAME));
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outl(0, ES_REG(ensoniq, PHANTOM_COUNT));
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#else
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outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
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outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
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outl(0, ES_REG(ensoniq, 1371_LEGACY));
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for (idx = 0; es1371_ac97_reset_hack[idx].vid != (unsigned short)PCI_ANY_ID; idx++)
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if (pci->vendor == es1371_ac97_reset_hack[idx].vid &&
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pci->device == es1371_ac97_reset_hack[idx].did &&
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ensoniq->rev == es1371_ac97_reset_hack[idx].rev) {
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outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
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/* need to delay around 20ms(bleech) to give
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some CODECs enough time to wakeup */
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msleep(20);
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break;
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}
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/* AC'97 warm reset to start the bitclk */
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outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL));
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inl(ES_REG(ensoniq, CONTROL));
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udelay(20);
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outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
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/* Init the sample rate converter */
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snd_es1371_wait_src_ready(ensoniq);
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outl(ES_1371_SRC_DISABLE, ES_REG(ensoniq, 1371_SMPRATE));
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for (idx = 0; idx < 0x80; idx++)
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snd_es1371_src_write(ensoniq, idx, 0);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
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snd_es1371_adc_rate(ensoniq, 22050);
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snd_es1371_dac1_rate(ensoniq, 22050);
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snd_es1371_dac2_rate(ensoniq, 22050);
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/* WARNING:
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* enabling the sample rate converter without properly programming
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* its parameters causes the chip to lock up (the SRC busy bit will
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* be stuck high, and I've found no way to rectify this other than
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* power cycle) - Thomas Sailer
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*/
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snd_es1371_wait_src_ready(ensoniq);
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outl(0, ES_REG(ensoniq, 1371_SMPRATE));
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/* try reset codec directly */
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outl(ES_1371_CODEC_WRITE(0, 0), ES_REG(ensoniq, 1371_CODEC));
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#endif
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outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL));
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outb(0x00, ES_REG(ensoniq, UART_RES));
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outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
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synchronize_irq(ensoniq->irq);
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}
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#ifdef CONFIG_PM
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static int snd_ensoniq_suspend (snd_card_t * card,
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pm_message_t state)
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{
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ensoniq_t *ensoniq = card->pm_private_data;
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snd_pcm_suspend_all(ensoniq->pcm1);
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snd_pcm_suspend_all(ensoniq->pcm2);
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#ifdef CHIP1371
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if (ensoniq->u.es1371.ac97)
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snd_ac97_suspend(ensoniq->u.es1371.ac97);
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#else
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/* FIXME */
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#endif
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pci_set_power_state(ensoniq->pci, 3);
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pci_disable_device(ensoniq->pci);
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// snd_power_change_state(card, SNDRV_CTL_POWER_D3hot); // only 2.6.10
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return 0;
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}
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static int snd_ensoniq_resume (snd_card_t * card
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)
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{
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ensoniq_t *ensoniq = card->pm_private_data;
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pci_enable_device(ensoniq->pci);
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pci_set_power_state(ensoniq->pci, 0);
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pci_set_master(ensoniq->pci);
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snd_ensoniq_chip_init(ensoniq);
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#ifdef CHIP1371
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if (ensoniq->u.es1371.ac97)
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snd_ac97_resume(ensoniq->u.es1371.ac97);
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#else
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/* FIXME */
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#endif
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// snd_power_change_state(card, SNDRV_CTL_POWER_D0); // only 2.6.10
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return 0;
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}
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#endif /* CONFIG_PM */
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static int __devinit snd_ensoniq_create(snd_card_t * card,
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struct pci_dev *pci,
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ensoniq_t ** rensoniq)
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@ -1986,12 +2104,6 @@ static int __devinit snd_ensoniq_create(snd_card_t * card,
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ensoniq->ctrl = ES_1370_CDC_EN | ES_1370_PCLKDIVO(ES_1370_SRTODIV(8000));
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#endif
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ensoniq->sctrl = 0;
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/* initialize the chips */
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outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
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outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
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outl(ES_MEM_PAGEO(ES_PAGE_ADC), ES_REG(ensoniq, MEM_PAGE));
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outl(ensoniq->dma_bug.addr, ES_REG(ensoniq, PHANTOM_FRAME));
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outl(0, ES_REG(ensoniq, PHANTOM_COUNT));
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#else
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ensoniq->ctrl = 0;
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ensoniq->sctrl = 0;
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@ -2002,59 +2114,16 @@ static int __devinit snd_ensoniq_create(snd_card_t * card,
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ensoniq->ctrl |= ES_1371_GPIO_OUT(1); /* turn amplifier on */
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break;
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}
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/* initialize the chips */
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outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
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outl(ensoniq->sctrl, ES_REG(ensoniq, SERIAL));
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outl(0, ES_REG(ensoniq, 1371_LEGACY));
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for (idx = 0; es1371_ac97_reset_hack[idx].vid != (unsigned short)PCI_ANY_ID; idx++)
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if (pci->vendor == es1371_ac97_reset_hack[idx].vid &&
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pci->device == es1371_ac97_reset_hack[idx].did &&
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ensoniq->rev == es1371_ac97_reset_hack[idx].rev) {
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ensoniq->cssr |= ES_1371_ST_AC97_RST;
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outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
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/* need to delay around 20ms(bleech) to give
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some CODECs enough time to wakeup */
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msleep(20);
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break;
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}
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/* AC'97 warm reset to start the bitclk */
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outl(ensoniq->ctrl | ES_1371_SYNC_RES, ES_REG(ensoniq, CONTROL));
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inl(ES_REG(ensoniq, CONTROL));
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udelay(20);
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outl(ensoniq->ctrl, ES_REG(ensoniq, CONTROL));
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/* Init the sample rate converter */
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snd_es1371_wait_src_ready(ensoniq);
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outl(ES_1371_SRC_DISABLE, ES_REG(ensoniq, 1371_SMPRATE));
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for (idx = 0; idx < 0x80; idx++)
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snd_es1371_src_write(ensoniq, idx, 0);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_TRUNC_N, 16 << 4);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC1 + ES_SMPREG_INT_REGS, 16 << 10);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_TRUNC_N, 16 << 4);
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snd_es1371_src_write(ensoniq, ES_SMPREG_DAC2 + ES_SMPREG_INT_REGS, 16 << 10);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_ADC + 1, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC1 + 1, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2, 1 << 12);
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snd_es1371_src_write(ensoniq, ES_SMPREG_VOL_DAC2 + 1, 1 << 12);
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snd_es1371_adc_rate(ensoniq, 22050);
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snd_es1371_dac1_rate(ensoniq, 22050);
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snd_es1371_dac2_rate(ensoniq, 22050);
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/* WARNING:
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* enabling the sample rate converter without properly programming
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* its parameters causes the chip to lock up (the SRC busy bit will
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* be stuck high, and I've found no way to rectify this other than
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* power cycle) - Thomas Sailer
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*/
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snd_es1371_wait_src_ready(ensoniq);
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outl(0, ES_REG(ensoniq, 1371_SMPRATE));
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/* try reset codec directly */
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outl(ES_1371_CODEC_WRITE(0, 0), ES_REG(ensoniq, 1371_CODEC));
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#endif
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outb(ensoniq->uartc = 0x00, ES_REG(ensoniq, UART_CONTROL));
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outb(0x00, ES_REG(ensoniq, UART_RES));
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outl(ensoniq->cssr, ES_REG(ensoniq, STATUS));
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synchronize_irq(ensoniq->irq);
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snd_ensoniq_chip_init(ensoniq);
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if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ensoniq, &ops)) < 0) {
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snd_ensoniq_free(ensoniq);
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@ -2063,6 +2132,8 @@ static int __devinit snd_ensoniq_create(snd_card_t * card,
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snd_ensoniq_proc_init(ensoniq);
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snd_card_set_pm_callback(card, snd_ensoniq_suspend, snd_ensoniq_resume, ensoniq);
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snd_card_set_dev(card, &pci->dev);
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*rensoniq = ensoniq;
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@ -2389,6 +2460,7 @@ static struct pci_driver driver = {
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.id_table = snd_audiopci_ids,
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.probe = snd_audiopci_probe,
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.remove = __devexit_p(snd_audiopci_remove),
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SND_PCI_PM_CALLBACKS
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};
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static int __init alsa_card_ens137x_init(void)
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