crypto: arm64/chacha - optimize for arbitrary length inputs
Update the 4-way NEON ChaCha routine so it can handle input of any length >64 bytes in its entirety, rather than having to call into the 1-way routine and/or memcpy()s via temp buffers to handle the tail of a ChaCha invocation that is not a multiple of 256 bytes. On inputs that are a multiple of 256 bytes (and thus in tcrypt benchmarks), performance drops by around 1% on Cortex-A57, while performance for inputs drawn randomly from the range [64, 1024) increases by around 30%. Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
This commit is contained in:
Ard Biesheuvel
Herbert Xu
parent
ee5bbc9fd3
commit
f2ca1cbd0f
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@ -19,6 +19,8 @@
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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#include <asm/cache.h>
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.text
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.align 6
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@ -36,7 +38,7 @@
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*/
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chacha_permute:
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adr x10, ROT8
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adr_l x10, ROT8
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ld1 {v12.4s}, [x10]
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.Ldoubleround:
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@ -169,6 +171,12 @@ ENTRY(chacha_4block_xor_neon)
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// x1: 4 data blocks output, o
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// x2: 4 data blocks input, i
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// w3: nrounds
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// x4: byte count
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adr_l x10, .Lpermute
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and x5, x4, #63
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add x10, x10, x5
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add x11, x10, #64
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//
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// This function encrypts four consecutive ChaCha blocks by loading
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@ -178,15 +186,15 @@ ENTRY(chacha_4block_xor_neon)
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// matrix by interleaving 32- and then 64-bit words, which allows us to
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// do XOR in NEON registers.
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//
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adr x9, CTRINC // ... and ROT8
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adr_l x9, CTRINC // ... and ROT8
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ld1 {v30.4s-v31.4s}, [x9]
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// x0..15[0-3] = s0..3[0..3]
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mov x4, x0
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ld4r { v0.4s- v3.4s}, [x4], #16
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ld4r { v4.4s- v7.4s}, [x4], #16
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ld4r { v8.4s-v11.4s}, [x4], #16
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ld4r {v12.4s-v15.4s}, [x4]
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add x8, x0, #16
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ld4r { v0.4s- v3.4s}, [x0]
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ld4r { v4.4s- v7.4s}, [x8], #16
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ld4r { v8.4s-v11.4s}, [x8], #16
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ld4r {v12.4s-v15.4s}, [x8]
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// x12 += counter values 0-3
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add v12.4s, v12.4s, v30.4s
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@ -430,24 +438,47 @@ ENTRY(chacha_4block_xor_neon)
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zip1 v30.4s, v14.4s, v15.4s
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zip2 v31.4s, v14.4s, v15.4s
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mov x3, #64
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subs x5, x4, #64
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add x6, x5, x2
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csel x3, x3, xzr, ge
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csel x2, x2, x6, ge
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// interleave 64-bit words in state n, n+2
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zip1 v0.2d, v16.2d, v18.2d
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zip2 v4.2d, v16.2d, v18.2d
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zip1 v8.2d, v17.2d, v19.2d
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zip2 v12.2d, v17.2d, v19.2d
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ld1 {v16.16b-v19.16b}, [x2], #64
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ld1 {v16.16b-v19.16b}, [x2], x3
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subs x6, x4, #128
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ccmp x3, xzr, #4, lt
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add x7, x6, x2
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csel x3, x3, xzr, eq
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csel x2, x2, x7, eq
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zip1 v1.2d, v20.2d, v22.2d
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zip2 v5.2d, v20.2d, v22.2d
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zip1 v9.2d, v21.2d, v23.2d
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zip2 v13.2d, v21.2d, v23.2d
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ld1 {v20.16b-v23.16b}, [x2], #64
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ld1 {v20.16b-v23.16b}, [x2], x3
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subs x7, x4, #192
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ccmp x3, xzr, #4, lt
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add x8, x7, x2
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csel x3, x3, xzr, eq
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csel x2, x2, x8, eq
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zip1 v2.2d, v24.2d, v26.2d
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zip2 v6.2d, v24.2d, v26.2d
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zip1 v10.2d, v25.2d, v27.2d
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zip2 v14.2d, v25.2d, v27.2d
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ld1 {v24.16b-v27.16b}, [x2], #64
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ld1 {v24.16b-v27.16b}, [x2], x3
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subs x8, x4, #256
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ccmp x3, xzr, #4, lt
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add x9, x8, x2
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csel x2, x2, x9, eq
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zip1 v3.2d, v28.2d, v30.2d
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zip2 v7.2d, v28.2d, v30.2d
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@ -456,29 +487,155 @@ ENTRY(chacha_4block_xor_neon)
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ld1 {v28.16b-v31.16b}, [x2]
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// xor with corresponding input, write to output
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tbnz x5, #63, 0f
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eor v16.16b, v16.16b, v0.16b
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eor v17.16b, v17.16b, v1.16b
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eor v18.16b, v18.16b, v2.16b
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eor v19.16b, v19.16b, v3.16b
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st1 {v16.16b-v19.16b}, [x1], #64
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tbnz x6, #63, 1f
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eor v20.16b, v20.16b, v4.16b
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eor v21.16b, v21.16b, v5.16b
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st1 {v16.16b-v19.16b}, [x1], #64
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eor v22.16b, v22.16b, v6.16b
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eor v23.16b, v23.16b, v7.16b
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st1 {v20.16b-v23.16b}, [x1], #64
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tbnz x7, #63, 2f
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eor v24.16b, v24.16b, v8.16b
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eor v25.16b, v25.16b, v9.16b
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st1 {v20.16b-v23.16b}, [x1], #64
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eor v26.16b, v26.16b, v10.16b
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eor v27.16b, v27.16b, v11.16b
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eor v28.16b, v28.16b, v12.16b
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st1 {v24.16b-v27.16b}, [x1], #64
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tbnz x8, #63, 3f
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eor v28.16b, v28.16b, v12.16b
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eor v29.16b, v29.16b, v13.16b
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eor v30.16b, v30.16b, v14.16b
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eor v31.16b, v31.16b, v15.16b
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st1 {v28.16b-v31.16b}, [x1]
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ret
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// fewer than 64 bytes of in/output
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0: ld1 {v8.16b}, [x10]
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ld1 {v9.16b}, [x11]
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movi v10.16b, #16
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sub x2, x1, #64
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add x1, x1, x5
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ld1 {v16.16b-v19.16b}, [x2]
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tbl v4.16b, {v0.16b-v3.16b}, v8.16b
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tbx v20.16b, {v16.16b-v19.16b}, v9.16b
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add v8.16b, v8.16b, v10.16b
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add v9.16b, v9.16b, v10.16b
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tbl v5.16b, {v0.16b-v3.16b}, v8.16b
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tbx v21.16b, {v16.16b-v19.16b}, v9.16b
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add v8.16b, v8.16b, v10.16b
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add v9.16b, v9.16b, v10.16b
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tbl v6.16b, {v0.16b-v3.16b}, v8.16b
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tbx v22.16b, {v16.16b-v19.16b}, v9.16b
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add v8.16b, v8.16b, v10.16b
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add v9.16b, v9.16b, v10.16b
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tbl v7.16b, {v0.16b-v3.16b}, v8.16b
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tbx v23.16b, {v16.16b-v19.16b}, v9.16b
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eor v20.16b, v20.16b, v4.16b
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eor v21.16b, v21.16b, v5.16b
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eor v22.16b, v22.16b, v6.16b
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eor v23.16b, v23.16b, v7.16b
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st1 {v20.16b-v23.16b}, [x1]
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ret
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// fewer than 128 bytes of in/output
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1: ld1 {v8.16b}, [x10]
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ld1 {v9.16b}, [x11]
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movi v10.16b, #16
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add x1, x1, x6
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tbl v0.16b, {v4.16b-v7.16b}, v8.16b
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tbx v20.16b, {v16.16b-v19.16b}, v9.16b
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add v8.16b, v8.16b, v10.16b
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add v9.16b, v9.16b, v10.16b
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tbl v1.16b, {v4.16b-v7.16b}, v8.16b
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tbx v21.16b, {v16.16b-v19.16b}, v9.16b
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add v8.16b, v8.16b, v10.16b
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add v9.16b, v9.16b, v10.16b
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tbl v2.16b, {v4.16b-v7.16b}, v8.16b
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tbx v22.16b, {v16.16b-v19.16b}, v9.16b
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add v8.16b, v8.16b, v10.16b
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add v9.16b, v9.16b, v10.16b
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tbl v3.16b, {v4.16b-v7.16b}, v8.16b
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tbx v23.16b, {v16.16b-v19.16b}, v9.16b
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eor v20.16b, v20.16b, v0.16b
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eor v21.16b, v21.16b, v1.16b
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eor v22.16b, v22.16b, v2.16b
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eor v23.16b, v23.16b, v3.16b
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st1 {v20.16b-v23.16b}, [x1]
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ret
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// fewer than 192 bytes of in/output
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2: ld1 {v4.16b}, [x10]
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ld1 {v5.16b}, [x11]
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movi v6.16b, #16
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add x1, x1, x7
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tbl v0.16b, {v8.16b-v11.16b}, v4.16b
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tbx v24.16b, {v20.16b-v23.16b}, v5.16b
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add v4.16b, v4.16b, v6.16b
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add v5.16b, v5.16b, v6.16b
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tbl v1.16b, {v8.16b-v11.16b}, v4.16b
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tbx v25.16b, {v20.16b-v23.16b}, v5.16b
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add v4.16b, v4.16b, v6.16b
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add v5.16b, v5.16b, v6.16b
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tbl v2.16b, {v8.16b-v11.16b}, v4.16b
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tbx v26.16b, {v20.16b-v23.16b}, v5.16b
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add v4.16b, v4.16b, v6.16b
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add v5.16b, v5.16b, v6.16b
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tbl v3.16b, {v8.16b-v11.16b}, v4.16b
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tbx v27.16b, {v20.16b-v23.16b}, v5.16b
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eor v24.16b, v24.16b, v0.16b
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eor v25.16b, v25.16b, v1.16b
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eor v26.16b, v26.16b, v2.16b
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eor v27.16b, v27.16b, v3.16b
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st1 {v24.16b-v27.16b}, [x1]
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ret
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// fewer than 256 bytes of in/output
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3: ld1 {v4.16b}, [x10]
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ld1 {v5.16b}, [x11]
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movi v6.16b, #16
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add x1, x1, x8
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tbl v0.16b, {v12.16b-v15.16b}, v4.16b
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tbx v28.16b, {v24.16b-v27.16b}, v5.16b
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add v4.16b, v4.16b, v6.16b
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add v5.16b, v5.16b, v6.16b
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tbl v1.16b, {v12.16b-v15.16b}, v4.16b
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tbx v29.16b, {v24.16b-v27.16b}, v5.16b
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add v4.16b, v4.16b, v6.16b
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add v5.16b, v5.16b, v6.16b
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tbl v2.16b, {v12.16b-v15.16b}, v4.16b
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tbx v30.16b, {v24.16b-v27.16b}, v5.16b
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add v4.16b, v4.16b, v6.16b
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add v5.16b, v5.16b, v6.16b
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tbl v3.16b, {v12.16b-v15.16b}, v4.16b
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tbx v31.16b, {v24.16b-v27.16b}, v5.16b
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eor v28.16b, v28.16b, v0.16b
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eor v29.16b, v29.16b, v1.16b
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eor v30.16b, v30.16b, v2.16b
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eor v31.16b, v31.16b, v3.16b
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st1 {v28.16b-v31.16b}, [x1]
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ret
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ENDPROC(chacha_4block_xor_neon)
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.section ".rodata", "a", %progbits
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.align L1_CACHE_SHIFT
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.Lpermute:
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.set .Li, 0
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.rept 192
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.byte (.Li - 64)
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.set .Li, .Li + 1
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.endr
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CTRINC: .word 0, 1, 2, 3
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ROT8: .word 0x02010003, 0x06050407, 0x0a09080b, 0x0e0d0c0f
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@ -32,41 +32,29 @@
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asmlinkage void chacha_block_xor_neon(u32 *state, u8 *dst, const u8 *src,
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int nrounds);
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asmlinkage void chacha_4block_xor_neon(u32 *state, u8 *dst, const u8 *src,
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int nrounds);
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int nrounds, int bytes);
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asmlinkage void hchacha_block_neon(const u32 *state, u32 *out, int nrounds);
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static void chacha_doneon(u32 *state, u8 *dst, const u8 *src,
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unsigned int bytes, int nrounds)
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int bytes, int nrounds)
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{
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u8 buf[CHACHA_BLOCK_SIZE];
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while (bytes >= CHACHA_BLOCK_SIZE * 4) {
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kernel_neon_begin();
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chacha_4block_xor_neon(state, dst, src, nrounds);
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kernel_neon_end();
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if (bytes < CHACHA_BLOCK_SIZE) {
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memcpy(buf, src, bytes);
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chacha_block_xor_neon(state, buf, buf, nrounds);
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memcpy(dst, buf, bytes);
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return;
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}
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while (bytes > 0) {
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chacha_4block_xor_neon(state, dst, src, nrounds,
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min(bytes, CHACHA_BLOCK_SIZE * 4));
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bytes -= CHACHA_BLOCK_SIZE * 4;
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src += CHACHA_BLOCK_SIZE * 4;
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dst += CHACHA_BLOCK_SIZE * 4;
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state[12] += 4;
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}
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if (!bytes)
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return;
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kernel_neon_begin();
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while (bytes >= CHACHA_BLOCK_SIZE) {
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chacha_block_xor_neon(state, dst, src, nrounds);
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bytes -= CHACHA_BLOCK_SIZE;
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src += CHACHA_BLOCK_SIZE;
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dst += CHACHA_BLOCK_SIZE;
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state[12]++;
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}
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if (bytes) {
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memcpy(buf, src, bytes);
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chacha_block_xor_neon(state, buf, buf, nrounds);
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memcpy(dst, buf, bytes);
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}
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kernel_neon_end();
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}
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static int chacha_neon_stream_xor(struct skcipher_request *req,
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@ -86,8 +74,10 @@ static int chacha_neon_stream_xor(struct skcipher_request *req,
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if (nbytes < walk.total)
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nbytes = round_down(nbytes, walk.stride);
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kernel_neon_begin();
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chacha_doneon(state, walk.dst.virt.addr, walk.src.virt.addr,
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nbytes, ctx->nrounds);
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kernel_neon_end();
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err = skcipher_walk_done(&walk, walk.nbytes - nbytes);
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}
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