[PATCH] Au1550/1200: add missing PSC #define's, make OSS driver use the proper ones
Add missing PSC #define's required for the drivers using PSC on DBAu1550 board (also fixing Au1550 PSC3 address) and all Au1200-based boards as well. Make the OSS driver use the correct PSC definitions fo each board. Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -39,7 +39,12 @@
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#define PSC0_BASE_ADDR 0xb1a00000
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#define PSC1_BASE_ADDR 0xb1b00000
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#define PSC2_BASE_ADDR 0xb0a00000
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#define PSC3_BASE_ADDR 0xb0d00000
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#define PSC3_BASE_ADDR 0xb0b00000
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#endif
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#ifdef CONFIG_SOC_AU1200
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#define PSC0_BASE_ADDR 0xb1a00000
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#define PSC1_BASE_ADDR 0xb1b00000
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#endif
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/* The PSC select and control registers are common to
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@ -227,6 +232,8 @@ typedef struct psc_i2s {
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#define PSC_I2SCFG_DD_DISABLE (1 << 27)
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#define PSC_I2SCFG_DE_ENABLE (1 << 26)
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#define PSC_I2SCFG_SET_WS(x) (((((x) / 2) - 1) & 0x7f) << 16)
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#define PSC_I2SCFG_WS(n) ((n & 0xFF) << 16)
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#define PSC_I2SCFG_WS_MASK (PSC_I2SCFG_WS(0x3F))
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#define PSC_I2SCFG_WI (1 << 15)
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#define PSC_I2SCFG_DIV_MASK (3 << 13)
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@ -30,8 +30,20 @@
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#ifdef CONFIG_MIPS_DB1550
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#define DBDMA_AC97_TX_CHAN DSCR_CMD0_PSC1_TX
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#define DBDMA_AC97_RX_CHAN DSCR_CMD0_PSC1_RX
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#define DBDMA_I2S_TX_CHAN DSCR_CMD0_PSC3_TX
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#define DBDMA_I2S_RX_CHAN DSCR_CMD0_PSC3_RX
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#define SPI_PSC_BASE PSC0_BASE_ADDR
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#define AC97_PSC_BASE PSC1_BASE_ADDR
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#define SMBUS_PSC_BASE PSC2_BASE_ADDR
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#define I2S_PSC_BASE PSC3_BASE_ADDR
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#define BCSR_KSEG1_ADDR 0xAF000000
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#define NAND_PHYS_ADDR 0x20000000
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#else
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#define BCSR_KSEG1_ADDR 0xAE000000
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#endif
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@ -57,9 +57,9 @@
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/hardirq.h>
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#include <asm/mach-au1x00/au1000.h>
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#include <asm/mach-au1x00/au1xxx_psc.h>
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#include <asm/mach-au1x00/au1xxx_dbdma.h>
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#include <asm/mach-au1x00/au1xxx.h>
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#undef OSS_DOCUMENTED_MIXER_SEMANTICS
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