ARM: 8690/1: lpae: build TTB control register value from scratch in v7_ttb_setup
Reading TTBCR in early boot stage might return the value of the previous kernel's configuration, especially in case of kexec. For example, if normal kernel (first kernel) had run on a configuration of PHYS_OFFSET <= PAGE_OFFSET and crash kernel (second kernel) is running on a configuration PHYS_OFFSET > PAGE_OFFSET, which can happen because it depends on the reserved area for crash kernel, reading TTBCR and using the value to OR other bit fields might be risky because it doesn't have a reset value for TTBCR. Suggested-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Hoeun Ryu <hoeun.ryu@gmail.com> Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
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@ -129,8 +129,7 @@ ENDPROC(cpu_v7_set_pte_ext)
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.macro v7_ttb_setup, zero, ttbr0l, ttbr0h, ttbr1, tmp
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ldr \tmp, =swapper_pg_dir @ swapper_pg_dir virtual address
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cmp \ttbr1, \tmp, lsr #12 @ PHYS_OFFSET > PAGE_OFFSET?
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mrc p15, 0, \tmp, c2, c0, 2 @ TTB control egister
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orr \tmp, \tmp, #TTB_EAE
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mov \tmp, #TTB_EAE @ for TTB control egister
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ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP)
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ALT_UP(orr \tmp, \tmp, #TTB_FLAGS_UP)
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ALT_SMP(orr \tmp, \tmp, #TTB_FLAGS_SMP << 16)
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