DMA: PL08x: separately store source/destination cctl
Store the source/destination cctl values into the channel structure. This moves us towards being able to avoid a configuration call each time we use the channel. Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
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@ -1095,12 +1095,21 @@ static const struct burst_table burst_sizes[] = {
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},
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},
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};
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};
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static u32 pl08x_cctl(u32 cctl)
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{
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cctl &= ~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 |
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PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR |
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PL080_CONTROL_PROT_MASK);
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/* Access the cell in privileged mode, non-bufferable, non-cacheable */
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return cctl | PL080_CONTROL_PROT_SYS;
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}
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static int dma_set_runtime_config(struct dma_chan *chan,
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static int dma_set_runtime_config(struct dma_chan *chan,
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struct dma_slave_config *config)
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struct dma_slave_config *config)
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{
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{
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struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
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struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
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struct pl08x_driver_data *pl08x = plchan->host;
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struct pl08x_driver_data *pl08x = plchan->host;
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struct pl08x_channel_data *cd = plchan->cd;
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enum dma_slave_buswidth addr_width;
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enum dma_slave_buswidth addr_width;
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u32 maxburst;
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u32 maxburst;
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u32 cctl = 0;
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u32 cctl = 0;
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@ -1160,13 +1169,12 @@ static int dma_set_runtime_config(struct dma_chan *chan,
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if (plchan->runtime_direction == DMA_FROM_DEVICE) {
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if (plchan->runtime_direction == DMA_FROM_DEVICE) {
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plchan->src_addr = config->src_addr;
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plchan->src_addr = config->src_addr;
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plchan->src_cctl = pl08x_cctl(cctl);
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} else {
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} else {
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plchan->dst_addr = config->dst_addr;
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plchan->dst_addr = config->dst_addr;
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plchan->dst_cctl = pl08x_cctl(cctl);
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}
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}
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/* Modify the default channel data to fit PrimeCell request */
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cd->cctl = cctl;
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dev_dbg(&pl08x->adev->dev,
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dev_dbg(&pl08x->adev->dev,
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"configured channel %s (%s) for %s, data width %d, "
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"configured channel %s (%s) for %s, data width %d, "
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"maxburst %d words, LE, CCTL=0x%08x\n",
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"maxburst %d words, LE, CCTL=0x%08x\n",
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@ -1385,24 +1393,16 @@ static struct dma_async_tx_descriptor *pl08x_prep_slave_sg(
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txd->direction = direction;
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txd->direction = direction;
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txd->len = sgl->length;
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txd->len = sgl->length;
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txd->cctl = plchan->cd->cctl &
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~(PL080_CONTROL_SRC_AHB2 | PL080_CONTROL_DST_AHB2 |
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PL080_CONTROL_SRC_INCR | PL080_CONTROL_DST_INCR |
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PL080_CONTROL_PROT_MASK);
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/* Access the cell in privileged mode, non-bufferable, non-cacheable */
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txd->cctl |= PL080_CONTROL_PROT_SYS;
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if (direction == DMA_TO_DEVICE) {
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if (direction == DMA_TO_DEVICE) {
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txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->ccfg |= PL080_FLOW_MEM2PER << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->cctl |= PL080_CONTROL_SRC_INCR;
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txd->cctl = plchan->dst_cctl | PL080_CONTROL_SRC_INCR;
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txd->src_addr = sgl->dma_address;
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txd->src_addr = sgl->dma_address;
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txd->dst_addr = plchan->dst_addr;
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txd->dst_addr = plchan->dst_addr;
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src_buses = pl08x->mem_buses;
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src_buses = pl08x->mem_buses;
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dst_buses = plchan->cd->periph_buses;
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dst_buses = plchan->cd->periph_buses;
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} else if (direction == DMA_FROM_DEVICE) {
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} else if (direction == DMA_FROM_DEVICE) {
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txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->ccfg |= PL080_FLOW_PER2MEM << PL080_CONFIG_FLOW_CONTROL_SHIFT;
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txd->cctl |= PL080_CONTROL_DST_INCR;
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txd->cctl = plchan->src_cctl | PL080_CONTROL_DST_INCR;
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txd->src_addr = plchan->src_addr;
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txd->src_addr = plchan->src_addr;
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txd->dst_addr = sgl->dma_address;
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txd->dst_addr = sgl->dma_address;
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src_buses = plchan->cd->periph_buses;
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src_buses = plchan->cd->periph_buses;
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@ -1701,6 +1701,8 @@ static int pl08x_dma_init_virtual_channels(struct pl08x_driver_data *pl08x,
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chan->cd = &pl08x->pd->slave_channels[i];
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chan->cd = &pl08x->pd->slave_channels[i];
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chan->src_addr = chan->cd->addr;
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chan->src_addr = chan->cd->addr;
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chan->dst_addr = chan->cd->addr;
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chan->dst_addr = chan->cd->addr;
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chan->src_cctl = pl08x_cctl(chan->cd->cctl);
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chan->dst_cctl = pl08x_cctl(chan->cd->cctl);
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} else {
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} else {
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chan->cd = &pl08x->pd->memcpy_channel;
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chan->cd = &pl08x->pd->memcpy_channel;
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chan->name = kasprintf(GFP_KERNEL, "memcpy%d", i);
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chan->name = kasprintf(GFP_KERNEL, "memcpy%d", i);
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@ -175,6 +175,8 @@ struct pl08x_dma_chan {
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struct pl08x_channel_data *cd;
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struct pl08x_channel_data *cd;
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dma_addr_t src_addr;
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dma_addr_t src_addr;
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dma_addr_t dst_addr;
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dma_addr_t dst_addr;
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u32 src_cctl;
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u32 dst_cctl;
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enum dma_data_direction runtime_direction;
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enum dma_data_direction runtime_direction;
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dma_cookie_t lc;
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dma_cookie_t lc;
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struct list_head pend_list;
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struct list_head pend_list;
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