spi: imx: add support for all SPI word width for DMA
DMA transfer for SPI was limited to up to 8 bits word size until now. Sync in SPI burst size and DMA bus width is necessary to correctly support 16 and 32 BPW. Signed-off-by: Anton Bondarenko <anton.bondarenko.sama@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -89,11 +89,15 @@ struct spi_imx_data {
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struct completion xfer_done;
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void __iomem *base;
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unsigned long base_phys;
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struct clk *clk_per;
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struct clk *clk_ipg;
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unsigned long spi_clk;
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unsigned int spi_bus_clk;
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unsigned int bytes_per_word;
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unsigned int count;
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void (*tx)(struct spi_imx_data *);
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void (*rx)(struct spi_imx_data *);
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@ -199,15 +203,35 @@ static unsigned int spi_imx_clkdiv_2(unsigned int fin,
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return 7;
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}
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static int spi_imx_bytes_per_word(const int bpw)
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{
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return DIV_ROUND_UP(bpw, BITS_PER_BYTE);
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}
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static bool spi_imx_can_dma(struct spi_master *master, struct spi_device *spi,
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struct spi_transfer *transfer)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
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unsigned int bpw = transfer->bits_per_word;
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if (master->dma_rx && transfer->len >= spi_imx->wml &&
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(transfer->len % spi_imx->wml) == 0)
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return true;
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return false;
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if (!master->dma_rx)
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return false;
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if (!bpw)
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bpw = spi->bits_per_word;
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bpw = spi_imx_bytes_per_word(bpw);
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if (bpw != 1 && bpw != 2 && bpw != 4)
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return false;
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if (transfer->len < spi_imx->wml * bpw)
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return false;
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if (transfer->len % (spi_imx->wml * bpw))
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return false;
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return true;
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}
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#define MX51_ECSPI_CTRL 0x08
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@ -775,11 +799,63 @@ static irqreturn_t spi_imx_isr(int irq, void *dev_id)
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return IRQ_HANDLED;
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}
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static int spi_imx_dma_configure(struct spi_master *master,
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int bytes_per_word)
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{
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int ret;
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enum dma_slave_buswidth buswidth;
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struct dma_slave_config rx = {}, tx = {};
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struct spi_imx_data *spi_imx = spi_master_get_devdata(master);
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if (bytes_per_word == spi_imx->bytes_per_word)
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/* Same as last time */
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return 0;
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switch (bytes_per_word) {
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case 4:
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buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES;
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break;
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case 2:
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buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES;
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break;
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case 1:
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buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE;
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break;
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default:
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return -EINVAL;
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}
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tx.direction = DMA_MEM_TO_DEV;
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tx.dst_addr = spi_imx->base_phys + MXC_CSPITXDATA;
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tx.dst_addr_width = buswidth;
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tx.dst_maxburst = spi_imx->wml;
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ret = dmaengine_slave_config(master->dma_tx, &tx);
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if (ret) {
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dev_err(spi_imx->dev, "TX dma configuration failed with %d\n", ret);
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return ret;
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}
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rx.direction = DMA_DEV_TO_MEM;
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rx.src_addr = spi_imx->base_phys + MXC_CSPIRXDATA;
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rx.src_addr_width = buswidth;
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rx.src_maxburst = spi_imx->wml;
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ret = dmaengine_slave_config(master->dma_rx, &rx);
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if (ret) {
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dev_err(spi_imx->dev, "RX dma configuration failed with %d\n", ret);
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return ret;
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}
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spi_imx->bytes_per_word = bytes_per_word;
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return 0;
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}
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static int spi_imx_setupxfer(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct spi_imx_data *spi_imx = spi_master_get_devdata(spi->master);
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struct spi_imx_config config;
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int ret;
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config.bpw = t ? t->bits_per_word : spi->bits_per_word;
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config.speed_hz = t ? t->speed_hz : spi->max_speed_hz;
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@ -808,6 +884,13 @@ static int spi_imx_setupxfer(struct spi_device *spi,
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else
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spi_imx->usedma = 0;
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if (spi_imx->usedma) {
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ret = spi_imx_dma_configure(spi->master,
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spi_imx_bytes_per_word(config.bpw));
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if (ret)
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return ret;
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}
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spi_imx->devtype_data->config(spi_imx, &config);
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return 0;
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@ -829,10 +912,8 @@ static void spi_imx_sdma_exit(struct spi_imx_data *spi_imx)
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}
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static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
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struct spi_master *master,
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const struct resource *res)
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struct spi_master *master)
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{
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struct dma_slave_config slave_config = {};
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int ret;
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/* use pio mode for i.mx6dl chip TKT238285 */
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@ -850,16 +931,6 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
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goto err;
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}
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slave_config.direction = DMA_MEM_TO_DEV;
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slave_config.dst_addr = res->start + MXC_CSPITXDATA;
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slave_config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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slave_config.dst_maxburst = spi_imx->wml;
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ret = dmaengine_slave_config(master->dma_tx, &slave_config);
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if (ret) {
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dev_err(dev, "error in TX dma configuration.\n");
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goto err;
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}
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/* Prepare for RX : */
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master->dma_rx = dma_request_slave_channel_reason(dev, "rx");
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if (IS_ERR(master->dma_rx)) {
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@ -869,15 +940,7 @@ static int spi_imx_sdma_init(struct device *dev, struct spi_imx_data *spi_imx,
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goto err;
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}
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slave_config.direction = DMA_DEV_TO_MEM;
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slave_config.src_addr = res->start + MXC_CSPIRXDATA;
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slave_config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE;
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slave_config.src_maxburst = spi_imx->wml;
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ret = dmaengine_slave_config(master->dma_rx, &slave_config);
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if (ret) {
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dev_err(dev, "error in RX dma configuration.\n");
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goto err;
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}
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spi_imx_dma_configure(master, 1);
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init_completion(&spi_imx->dma_rx_completion);
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init_completion(&spi_imx->dma_tx_completion);
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@ -1164,6 +1227,7 @@ static int spi_imx_probe(struct platform_device *pdev)
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ret = PTR_ERR(spi_imx->base);
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goto out_master_put;
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}
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spi_imx->base_phys = res->start;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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@ -1204,7 +1268,7 @@ static int spi_imx_probe(struct platform_device *pdev)
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* other chips.
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*/
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if (is_imx51_ecspi(spi_imx)) {
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ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master, res);
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ret = spi_imx_sdma_init(&pdev->dev, spi_imx, master);
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if (ret == -EPROBE_DEFER)
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goto out_clk_put;
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