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[MIPS] TX49x7: Fix reporting of the CPU name and PCI clock 

I've noticed that PCI clock was incorrectly reported as 66 MHz while being
mere 33 MHz on RBTX4937 board -- this was due to the different encoding of
the PCI divisor field in CCFG register between TX4927 and TX4937 chips...
    
Also, RBTX49x7 was printed out as a CPU name (e.g., "CPU is RBTX4937");
and some debug printk() were duplicating each other...
    
Signed-off-by: Konstantin Baydarov <kbaidarov@ru.mvista.com>
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Sergei Shtylylov 2006-02-04 15:11:14 +03:00 committed by Ralf Baechle
parent c226f2601f
commit f09678af51
3 changed files with 107 additions and 49 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_prom.c
View File

@ -60,7 +60,6 @@ void __init prom_init_cmdline(void)
void __init prom_init(void) void __init prom_init(void)
{ {
const char* toshiba_name_list[] = GROUP_TOSHIBA_NAMES;
extern int tx4927_get_mem_size(void); extern int tx4927_get_mem_size(void);
extern char* toshiba_name; extern char* toshiba_name;
int msize; int msize;
@ -69,12 +68,13 @@ void __init prom_init(void)
mips_machgroup = MACH_GROUP_TOSHIBA; mips_machgroup = MACH_GROUP_TOSHIBA;
if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) if ((read_c0_prid() & 0xff) == PRID_REV_TX4927) {
mips_machtype = MACH_TOSHIBA_RBTX4927; mips_machtype = MACH_TOSHIBA_RBTX4927;
else toshiba_name = "TX4927";
} else {
mips_machtype = MACH_TOSHIBA_RBTX4937; mips_machtype = MACH_TOSHIBA_RBTX4937;
toshiba_name = "TX4937";
toshiba_name = toshiba_name_list[mips_machtype]; }
msize = tx4927_get_mem_size(); msize = tx4927_get_mem_size();
add_memory_region(0, msize << 20, BOOT_MEM_RAM); add_memory_region(0, msize << 20, BOOT_MEM_RAM);

136
arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_setup.c
View File

@ -539,19 +539,10 @@ void tx4927_pci_setup(void)
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2, TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
"0x%08lx=mips_io_port_base", "0x%08lx=mips_io_port_base",
mips_io_port_base); mips_io_port_base);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
"setup pci_io_resource to 0x%08lx 0x%08lx\n",
pci_io_resource.start,
pci_io_resource.end);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI2,
"setup pci_mem_resource to 0x%08lx 0x%08lx\n",
pci_mem_resource.start,
pci_mem_resource.end);
if (!called) { if (!called) {
printk printk
("TX4927 PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n", ("%s PCIC -- DID:%04x VID:%04x RID:%02x Arbiter:%s\n",
toshiba_name,
(unsigned short) (tx4927_pcicptr->pciid >> 16), (unsigned short) (tx4927_pcicptr->pciid >> 16),
(unsigned short) (tx4927_pcicptr->pciid & 0xffff), (unsigned short) (tx4927_pcicptr->pciid & 0xffff),
(unsigned short) (tx4927_pcicptr->pciccrev & 0xff), (unsigned short) (tx4927_pcicptr->pciccrev & 0xff),
@ -564,21 +555,52 @@ void tx4927_pci_setup(void)
(tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : ""); (tx4927_ccfgptr->ccfg & TX4927_CCFG_PCI66) ? " PCI66" : "");
if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) { if (tx4927_ccfgptr->pcfg & TX4927_PCFG_PCICLKEN_ALL) {
int pciclk = 0; int pciclk = 0;
switch ((unsigned long) tx4927_ccfgptr-> if (mips_machtype == MACH_TOSHIBA_RBTX4937)
ccfg & TX4927_CCFG_PCIDIVMODE_MASK) { switch ((unsigned long) tx4927_ccfgptr->
case TX4927_CCFG_PCIDIVMODE_2_5: ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
pciclk = tx4927_cpu_clock * 2 / 5; case TX4937_CCFG_PCIDIVMODE_4:
break; pciclk = tx4927_cpu_clock / 4;
case TX4927_CCFG_PCIDIVMODE_3: break;
pciclk = tx4927_cpu_clock / 3; case TX4937_CCFG_PCIDIVMODE_4_5:
break; pciclk = tx4927_cpu_clock * 2 / 9;
case TX4927_CCFG_PCIDIVMODE_5: break;
pciclk = tx4927_cpu_clock / 5; case TX4937_CCFG_PCIDIVMODE_5:
break; pciclk = tx4927_cpu_clock / 5;
case TX4927_CCFG_PCIDIVMODE_6: break;
pciclk = tx4927_cpu_clock / 6; case TX4937_CCFG_PCIDIVMODE_5_5:
break; pciclk = tx4927_cpu_clock * 2 / 11;
} break;
case TX4937_CCFG_PCIDIVMODE_8:
pciclk = tx4927_cpu_clock / 8;
break;
case TX4937_CCFG_PCIDIVMODE_9:
pciclk = tx4927_cpu_clock / 9;
break;
case TX4937_CCFG_PCIDIVMODE_10:
pciclk = tx4927_cpu_clock / 10;
break;
case TX4937_CCFG_PCIDIVMODE_11:
pciclk = tx4927_cpu_clock / 11;
break;
}
else
switch ((unsigned long) tx4927_ccfgptr->
ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
case TX4927_CCFG_PCIDIVMODE_2_5:
pciclk = tx4927_cpu_clock * 2 / 5;
break;
case TX4927_CCFG_PCIDIVMODE_3:
pciclk = tx4927_cpu_clock / 3;
break;
case TX4927_CCFG_PCIDIVMODE_5:
pciclk = tx4927_cpu_clock / 5;
break;
case TX4927_CCFG_PCIDIVMODE_6:
pciclk = tx4927_cpu_clock / 6;
break;
}
printk("Internal(%dMHz)", pciclk / 1000000); printk("Internal(%dMHz)", pciclk / 1000000);
} else { } else {
int pciclk = 0; int pciclk = 0;
@ -823,17 +845,33 @@ void __init toshiba_rbtx4927_setup(void)
/* PCIC */ /* PCIC */
/* /*
* ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz. * ASSUMPTION: PCIDIVMODE is configured for PCI 33MHz or 66MHz.
* PCIDIVMODE[12:11]'s initial value are given by S9[4:3] (ON:0, OFF:1). *
* For TX4927:
* PCIDIVMODE[12:11]'s initial value is given by S9[4:3] (ON:0, OFF:1).
* CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5) * CPU 166MHz: PCI 66MHz : PCIDIVMODE: 00 (1/2.5)
* CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3) * CPU 200MHz: PCI 66MHz : PCIDIVMODE: 01 (1/3)
* CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5) * CPU 166MHz: PCI 33MHz : PCIDIVMODE: 10 (1/5)
* CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6) * CPU 200MHz: PCI 33MHz : PCIDIVMODE: 11 (1/6)
* i.e. S9[3]: ON (83MHz), OFF (100MHz) * i.e. S9[3]: ON (83MHz), OFF (100MHz)
*
* For TX4937:
* PCIDIVMODE[12:11]'s initial value is given by S1[5:4] (ON:0, OFF:1)
* PCIDIVMODE[10] is 0.
* CPU 266MHz: PCI 33MHz : PCIDIVMODE: 000 (1/8)
* CPU 266MHz: PCI 66MHz : PCIDIVMODE: 001 (1/4)
* CPU 300MHz: PCI 33MHz : PCIDIVMODE: 010 (1/9)
* CPU 300MHz: PCI 66MHz : PCIDIVMODE: 011 (1/4.5)
* CPU 333MHz: PCI 33MHz : PCIDIVMODE: 100 (1/10)
* CPU 333MHz: PCI 66MHz : PCIDIVMODE: 101 (1/5)
*
*/ */
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1, TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
"ccfg is %lx, DIV is %x\n", "ccfg is %lx, PCIDIVMODE is %x\n",
(unsigned long) tx4927_ccfgptr-> (unsigned long) tx4927_ccfgptr->ccfg,
ccfg, TX4927_CCFG_PCIDIVMODE_MASK); (unsigned long) tx4927_ccfgptr->ccfg &
(mips_machtype == MACH_TOSHIBA_RBTX4937 ?
TX4937_CCFG_PCIDIVMODE_MASK :
TX4927_CCFG_PCIDIVMODE_MASK));
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1, TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1,
"PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n", "PCI66 mode is %lx, PCI mode is %lx, pci arb is %lx\n",
@ -844,20 +882,30 @@ void __init toshiba_rbtx4927_setup(void)
(unsigned long) tx4927_ccfgptr-> (unsigned long) tx4927_ccfgptr->
ccfg & TX4927_CCFG_PCIXARB); ccfg & TX4927_CCFG_PCIXARB);
TOSHIBA_RBTX4927_SETUP_DPRINTK(TOSHIBA_RBTX4927_SETUP_PCI1, if (mips_machtype == MACH_TOSHIBA_RBTX4937)
"PCIDIVMODE is %lx\n", switch ((unsigned long)tx4927_ccfgptr->
(unsigned long) tx4927_ccfgptr-> ccfg & TX4937_CCFG_PCIDIVMODE_MASK) {
ccfg & TX4927_CCFG_PCIDIVMODE_MASK); case TX4937_CCFG_PCIDIVMODE_8:
case TX4937_CCFG_PCIDIVMODE_4:
switch ((unsigned long) tx4927_ccfgptr-> tx4927_cpu_clock = 266666666; /* 266MHz */
ccfg & TX4927_CCFG_PCIDIVMODE_MASK) { break;
case TX4927_CCFG_PCIDIVMODE_2_5: case TX4937_CCFG_PCIDIVMODE_9:
case TX4927_CCFG_PCIDIVMODE_5: case TX4937_CCFG_PCIDIVMODE_4_5:
tx4927_cpu_clock = 166000000; /* 166MHz */ tx4927_cpu_clock = 300000000; /* 300MHz */
break; break;
default: default:
tx4927_cpu_clock = 200000000; /* 200MHz */ tx4927_cpu_clock = 333333333; /* 333MHz */
} }
else
switch ((unsigned long)tx4927_ccfgptr->
ccfg & TX4927_CCFG_PCIDIVMODE_MASK) {
case TX4927_CCFG_PCIDIVMODE_2_5:
case TX4927_CCFG_PCIDIVMODE_5:
tx4927_cpu_clock = 166666666; /* 166MHz */
break;
default:
tx4927_cpu_clock = 200000000; /* 200MHz */
}
/* CCFG */ /* CCFG */
/* enable Timeout BusError */ /* enable Timeout BusError */

10
include/asm-mips/tx4927/tx4927_pci.h
View File

@ -253,6 +253,16 @@ struct tx4927_pcic_reg {
#define TX4927_CCFG_PCIDIVMODE_5 0x00001000 #define TX4927_CCFG_PCIDIVMODE_5 0x00001000
#define TX4927_CCFG_PCIDIVMODE_6 0x00001800 #define TX4927_CCFG_PCIDIVMODE_6 0x00001800
#define TX4937_CCFG_PCIDIVMODE_MASK 0x00001c00
#define TX4937_CCFG_PCIDIVMODE_8 0x00000000
#define TX4937_CCFG_PCIDIVMODE_4 0x00000400
#define TX4937_CCFG_PCIDIVMODE_9 0x00000800
#define TX4937_CCFG_PCIDIVMODE_4_5 0x00000c00
#define TX4937_CCFG_PCIDIVMODE_10 0x00001000
#define TX4937_CCFG_PCIDIVMODE_5 0x00001400
#define TX4937_CCFG_PCIDIVMODE_11 0x00001800
#define TX4937_CCFG_PCIDIVMODE_5_5 0x00001c00
/* PCFG : Pin Configuration */ /* PCFG : Pin Configuration */
#define TX4927_PCFG_PCICLKEN_ALL 0x003f0000 #define TX4927_PCFG_PCICLKEN_ALL 0x003f0000
#define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch)) #define TX4927_PCFG_PCICLKEN(ch) (0x00010000<<(ch))