KVM: arm64: vgic-its: ITT save and restore
Implement routines to save and restore device ITT and their interrupt table entries (ITE). Signed-off-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Christoffer Dall <cdall@linaro.org>
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@ -1750,7 +1750,7 @@ static u32 compute_next_devid_offset(struct list_head *h,
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return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
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return min_t(u32, next_offset, VITS_DTE_MAX_DEVID_OFFSET);
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}
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}
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u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
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static u32 compute_next_eventid_offset(struct list_head *h, struct its_ite *ite)
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{
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{
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struct its_ite *next;
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struct its_ite *next;
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u32 next_offset;
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u32 next_offset;
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@ -1827,14 +1827,124 @@ out:
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return ret;
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return ret;
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}
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}
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/**
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* vgic_its_save_ite - Save an interrupt translation entry at @gpa
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*/
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static int vgic_its_save_ite(struct vgic_its *its, struct its_device *dev,
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struct its_ite *ite, gpa_t gpa, int ite_esz)
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{
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struct kvm *kvm = its->dev->kvm;
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u32 next_offset;
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u64 val;
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next_offset = compute_next_eventid_offset(&dev->itt_head, ite);
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val = ((u64)next_offset << KVM_ITS_ITE_NEXT_SHIFT) |
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((u64)ite->lpi << KVM_ITS_ITE_PINTID_SHIFT) |
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ite->collection->collection_id;
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val = cpu_to_le64(val);
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return kvm_write_guest(kvm, gpa, &val, ite_esz);
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}
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/**
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* vgic_its_restore_ite - restore an interrupt translation entry
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* @event_id: id used for indexing
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* @ptr: pointer to the ITE entry
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* @opaque: pointer to the its_device
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*/
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static int vgic_its_restore_ite(struct vgic_its *its, u32 event_id,
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void *ptr, void *opaque)
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{
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struct its_device *dev = (struct its_device *)opaque;
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struct its_collection *collection;
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struct kvm *kvm = its->dev->kvm;
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struct kvm_vcpu *vcpu = NULL;
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u64 val;
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u64 *p = (u64 *)ptr;
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struct vgic_irq *irq;
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u32 coll_id, lpi_id;
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struct its_ite *ite;
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u32 offset;
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val = *p;
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val = le64_to_cpu(val);
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coll_id = val & KVM_ITS_ITE_ICID_MASK;
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lpi_id = (val & KVM_ITS_ITE_PINTID_MASK) >> KVM_ITS_ITE_PINTID_SHIFT;
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if (!lpi_id)
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return 1; /* invalid entry, no choice but to scan next entry */
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if (lpi_id < VGIC_MIN_LPI)
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return -EINVAL;
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offset = val >> KVM_ITS_ITE_NEXT_SHIFT;
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if (event_id + offset >= BIT_ULL(dev->num_eventid_bits))
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return -EINVAL;
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collection = find_collection(its, coll_id);
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if (!collection)
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return -EINVAL;
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ite = vgic_its_alloc_ite(dev, collection, lpi_id, event_id);
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if (IS_ERR(ite))
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return PTR_ERR(ite);
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if (its_is_collection_mapped(collection))
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vcpu = kvm_get_vcpu(kvm, collection->target_addr);
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irq = vgic_add_lpi(kvm, lpi_id, vcpu);
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if (IS_ERR(irq))
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return PTR_ERR(irq);
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ite->irq = irq;
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return offset;
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}
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static int vgic_its_ite_cmp(void *priv, struct list_head *a,
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struct list_head *b)
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{
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struct its_ite *itea = container_of(a, struct its_ite, ite_list);
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struct its_ite *iteb = container_of(b, struct its_ite, ite_list);
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if (itea->event_id < iteb->event_id)
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return -1;
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else
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return 1;
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}
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static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)
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static int vgic_its_save_itt(struct vgic_its *its, struct its_device *device)
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{
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{
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return -ENXIO;
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const struct vgic_its_abi *abi = vgic_its_get_abi(its);
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gpa_t base = device->itt_addr;
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struct its_ite *ite;
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int ret;
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int ite_esz = abi->ite_esz;
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list_sort(NULL, &device->itt_head, vgic_its_ite_cmp);
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list_for_each_entry(ite, &device->itt_head, ite_list) {
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gpa_t gpa = base + ite->event_id * ite_esz;
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ret = vgic_its_save_ite(its, device, ite, gpa, ite_esz);
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if (ret)
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return ret;
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}
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return 0;
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}
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}
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static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)
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static int vgic_its_restore_itt(struct vgic_its *its, struct its_device *dev)
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{
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{
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return -ENXIO;
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const struct vgic_its_abi *abi = vgic_its_get_abi(its);
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gpa_t base = dev->itt_addr;
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int ret;
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int ite_esz = abi->ite_esz;
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size_t max_size = BIT_ULL(dev->num_eventid_bits) * ite_esz;
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ret = scan_its_table(its, base, max_size, ite_esz, 0,
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vgic_its_restore_ite, dev);
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return ret;
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}
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}
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/**
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/**
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@ -81,6 +81,10 @@
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#define KVM_ITS_CTE_VALID_MASK BIT_ULL(63)
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#define KVM_ITS_CTE_VALID_MASK BIT_ULL(63)
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#define KVM_ITS_CTE_RDBASE_SHIFT 16
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#define KVM_ITS_CTE_RDBASE_SHIFT 16
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#define KVM_ITS_CTE_ICID_MASK GENMASK_ULL(15, 0)
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#define KVM_ITS_CTE_ICID_MASK GENMASK_ULL(15, 0)
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#define KVM_ITS_ITE_NEXT_SHIFT 48
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#define KVM_ITS_ITE_PINTID_SHIFT 16
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#define KVM_ITS_ITE_PINTID_MASK GENMASK_ULL(47, 16)
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#define KVM_ITS_ITE_ICID_MASK GENMASK_ULL(15, 0)
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#define KVM_ITS_DTE_VALID_SHIFT 63
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#define KVM_ITS_DTE_VALID_SHIFT 63
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#define KVM_ITS_DTE_VALID_MASK BIT_ULL(63)
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#define KVM_ITS_DTE_VALID_MASK BIT_ULL(63)
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#define KVM_ITS_DTE_NEXT_SHIFT 49
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#define KVM_ITS_DTE_NEXT_SHIFT 49
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