clk: meson-gxbb: expose clock CLKID_RNG0
Expose clock CLKID_RNG0 which is needed for the HW random number generator. Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -193,7 +193,7 @@
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/* CLKID_I2C */
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/* CLKID_I2C */
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/* #define CLKID_SAR_ADC */
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/* #define CLKID_SAR_ADC */
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#define CLKID_SMART_CARD 24
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#define CLKID_SMART_CARD 24
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#define CLKID_RNG0 25
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/* CLKID_RNG0 */
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#define CLKID_UART0 26
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#define CLKID_UART0 26
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#define CLKID_SDHC 27
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#define CLKID_SDHC 27
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#define CLKID_STREAM 28
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#define CLKID_STREAM 28
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@ -12,9 +12,10 @@
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#define CLKID_FCLK_DIV4 6
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#define CLKID_FCLK_DIV4 6
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#define CLKID_CLK81 12
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#define CLKID_CLK81 12
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#define CLKID_MPLL2 15
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#define CLKID_MPLL2 15
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#define CLKID_SPI 34
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#define CLKID_I2C 22
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#define CLKID_I2C 22
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#define CLKID_SAR_ADC 23
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#define CLKID_SAR_ADC 23
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#define CLKID_RNG0 25
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#define CLKID_SPI 34
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#define CLKID_ETH 36
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#define CLKID_ETH 36
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#define CLKID_USB0 50
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#define CLKID_USB0 50
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#define CLKID_USB1 51
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#define CLKID_USB1 51
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