m32r: Convert mappi2 irq chip
Convert the irq chips to the new functions and use proper flow handlers. handle_level_irq is appropriate. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: Paul Mundt <lethal@linux-sh.org>
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@ -46,96 +46,97 @@ static void enable_mappi2_irq(unsigned int irq)
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outl(data, port);
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}
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static void mask_and_ack_mappi2(unsigned int irq)
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static void mask_mappi2(struct irq_data *data)
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{
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disable_mappi2_irq(irq);
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disable_mappi2_irq(data->irq);
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}
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static void end_mappi2_irq(unsigned int irq)
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static void unmask_mappi2(struct irq_data *data)
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{
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enable_mappi2_irq(irq);
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enable_mappi2_irq(data->irq);
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}
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static unsigned int startup_mappi2_irq(unsigned int irq)
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{
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enable_mappi2_irq(irq);
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return (0);
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}
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static void shutdown_mappi2_irq(unsigned int irq)
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static void shutdown_mappi2(struct irq_data *data)
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{
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unsigned long port;
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port = irq2port(irq);
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port = irq2port(data->irq);
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outl(M32R_ICUCR_ILEVEL7, port);
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}
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static struct irq_chip mappi2_irq_type =
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{
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.name = "MAPPI2-IRQ",
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.startup = startup_mappi2_irq,
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.shutdown = shutdown_mappi2_irq,
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.enable = enable_mappi2_irq,
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.disable = disable_mappi2_irq,
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.ack = mask_and_ack_mappi2,
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.end = end_mappi2_irq
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.name = "MAPPI2-IRQ",
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.irq_shutdown = shutdown_mappi2,
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.irq_mask = mask_mappi2,
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.irq_unmask = unmask_mappi2,
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};
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void __init init_IRQ(void)
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{
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#if defined(CONFIG_SMC91X)
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/* INT0 : LAN controller (SMC91111) */
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set_irq_chip(M32R_IRQ_INT0, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_INT0, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_INT0].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
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disable_mappi2_irq(M32R_IRQ_INT0);
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#endif /* CONFIG_SMC91X */
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/* MFT2 : system timer */
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set_irq_chip(M32R_IRQ_MFT2, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_MFT2, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_MFT2].icucr = M32R_ICUCR_IEN;
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disable_mappi2_irq(M32R_IRQ_MFT2);
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#ifdef CONFIG_SERIAL_M32R_SIO
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/* SIO0_R : uart receive data */
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set_irq_chip(M32R_IRQ_SIO0_R, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_SIO0_R, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_SIO0_R].icucr = 0;
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disable_mappi2_irq(M32R_IRQ_SIO0_R);
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/* SIO0_S : uart send data */
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set_irq_chip(M32R_IRQ_SIO0_S, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_SIO0_S, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_SIO0_S].icucr = 0;
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disable_mappi2_irq(M32R_IRQ_SIO0_S);
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/* SIO1_R : uart receive data */
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set_irq_chip(M32R_IRQ_SIO1_R, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_SIO1_R, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_SIO1_R].icucr = 0;
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disable_mappi2_irq(M32R_IRQ_SIO1_R);
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/* SIO1_S : uart send data */
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set_irq_chip(M32R_IRQ_SIO1_S, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_SIO1_S, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_SIO1_S].icucr = 0;
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disable_mappi2_irq(M32R_IRQ_SIO1_S);
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#endif /* CONFIG_M32R_USE_DBG_CONSOLE */
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#if defined(CONFIG_USB)
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/* INT1 : USB Host controller interrupt */
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set_irq_chip(M32R_IRQ_INT1, &mappi2_irq_type);
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set_irq_chip_and_handler(M32R_IRQ_INT1, &mappi2_irq_type,
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handle_level_irq);
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icu_data[M32R_IRQ_INT1].icucr = M32R_ICUCR_ISMOD01;
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disable_mappi2_irq(M32R_IRQ_INT1);
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#endif /* CONFIG_USB */
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/* ICUCR40: CFC IREQ */
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set_irq_chip(PLD_IRQ_CFIREQ, &mappi2_irq_type);
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set_irq_chip_and_handler(PLD_IRQ_CFIREQ, &mappi2_irq_type,
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handle_level_irq);
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icu_data[PLD_IRQ_CFIREQ].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD01;
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disable_mappi2_irq(PLD_IRQ_CFIREQ);
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#if defined(CONFIG_M32R_CFC)
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/* ICUCR41: CFC Insert */
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set_irq_chip(PLD_IRQ_CFC_INSERT, &mappi2_irq_type);
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set_irq_chip_and_handler(PLD_IRQ_CFC_INSERT, &mappi2_irq_type,
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handle_level_irq);
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icu_data[PLD_IRQ_CFC_INSERT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD00;
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disable_mappi2_irq(PLD_IRQ_CFC_INSERT);
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/* ICUCR42: CFC Eject */
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set_irq_chip(PLD_IRQ_CFC_EJECT, &mappi2_irq_type);
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set_irq_chip_and_handler(PLD_IRQ_CFC_EJECT, &mappi2_irq_type,
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handle_level_irq);
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icu_data[PLD_IRQ_CFC_EJECT].icucr = M32R_ICUCR_IEN|M32R_ICUCR_ISMOD10;
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disable_mappi2_irq(PLD_IRQ_CFC_EJECT);
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#endif /* CONFIG_MAPPI2_CFC */
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