[CPUFREQ] S3C6410: Add some lower frequencies for 800MHz base clock operation
By extension from the 667MHz based clocks currently supported add 100MHz and 200MHz operating points. Due to a lack of documentation these have not been confirmed as supported but by extension from the existing frequencies they should be OK, and I've given them quite a bit of runtime testing. The major risk is synchronization with the non-ARM clocks but as we can't currently scale the ARM PLL the risk should be relatively low. Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Kukjin Kim <kgene.kim@samsung.com> Signed-off-by: Dave Jones <davej@redhat.com>
This commit is contained in:
parent
fe7f1bcbff
commit
ef993ef8dc
|
@ -36,7 +36,9 @@ static struct s3c64xx_dvfs s3c64xx_dvfs_table[] = {
|
|||
|
||||
static struct cpufreq_frequency_table s3c64xx_freq_table[] = {
|
||||
{ 0, 66000 },
|
||||
{ 0, 100000 },
|
||||
{ 0, 133000 },
|
||||
{ 1, 200000 },
|
||||
{ 1, 222000 },
|
||||
{ 1, 266000 },
|
||||
{ 2, 333000 },
|
||||
|
|
Loading…
Reference in New Issue