Merge master.kernel.org:/pub/scm/linux/kernel/git/gregkh/pci-2.6

This commit is contained in:
Linus Torvalds 2006-01-31 18:13:32 -08:00
commit ef59c4e935
21 changed files with 296 additions and 406 deletions

View File

@ -148,3 +148,17 @@ Why: The 8250 serial driver now has the ability to deal with the differences
brother on Alchemy SOCs. The loss of features is not considered an
issue.
Who: Ralf Baechle <ralf@linux-mips.org>
---------------------------
What: Legacy /proc/pci interface (PCI_LEGACY_PROC)
When: March 2006
Why: deprecated since 2.5.53 in favor of lspci(8)
Who: Adrian Bunk <bunk@stusta.de>
---------------------------
What: pci_module_init(driver)
When: January 2007
Why: Is replaced by pci_register_driver(pci_driver).
Who: Richard Knutsson <ricknu-0@student.ltu.se> and Greg Kroah-Hartman <gregkh@suse.de>

View File

@ -539,6 +539,11 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
case PCI_DEVICE_ID_INTEL_ICH7_30:
case PCI_DEVICE_ID_INTEL_ICH7_31:
case PCI_DEVICE_ID_INTEL_ESB2_0:
case PCI_DEVICE_ID_INTEL_ICH8_0:
case PCI_DEVICE_ID_INTEL_ICH8_1:
case PCI_DEVICE_ID_INTEL_ICH8_2:
case PCI_DEVICE_ID_INTEL_ICH8_3:
case PCI_DEVICE_ID_INTEL_ICH8_4:
r->name = "PIIX/ICH";
r->get = pirq_piix_get;
r->set = pirq_piix_set;

View File

@ -36,8 +36,7 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
while (1) {
++cfg_num;
if (cfg_num >= pci_mmcfg_config_num) {
/* Not found - fallback to type 1 */
return 0;
break;
}
cfg = &pci_mmcfg_config[cfg_num];
if (cfg->pci_segment_group_number != seg)
@ -46,6 +45,18 @@ static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn)
(cfg->end_bus_number >= bus))
return cfg->base_address;
}
/* Handle more broken MCFG tables on Asus etc.
They only contain a single entry for bus 0-0. Assume
this applies to all busses. */
cfg = &pci_mmcfg_config[0];
if (pci_mmcfg_config_num == 1 &&
cfg->pci_segment_group_number == 0 &&
(cfg->start_bus_number | cfg->end_bus_number) == 0)
return cfg->base_address;
/* Fall back to type 0 */
return 0;
}
static inline void pci_exp_set_dev_base(unsigned int base, int bus, int devfn)

View File

@ -29,11 +29,8 @@ static char __iomem *get_virt(unsigned int seg, unsigned bus)
while (1) {
++cfg_num;
if (cfg_num >= pci_mmcfg_config_num) {
/* Not found - fall back to type 1. This happens
e.g. on the internal devices of a K8 northbridge. */
return NULL;
}
if (cfg_num >= pci_mmcfg_config_num)
break;
cfg = pci_mmcfg_virt[cfg_num].cfg;
if (cfg->pci_segment_group_number != seg)
continue;
@ -41,6 +38,18 @@ static char __iomem *get_virt(unsigned int seg, unsigned bus)
(cfg->end_bus_number >= bus))
return pci_mmcfg_virt[cfg_num].virt;
}
/* Handle more broken MCFG tables on Asus etc.
They only contain a single entry for bus 0-0. Assume
this applies to all busses. */
cfg = &pci_mmcfg_config[0];
if (pci_mmcfg_config_num == 1 &&
cfg->pci_segment_group_number == 0 &&
(cfg->start_bus_number | cfg->end_bus_number) == 0)
return cfg->base_address;
/* Fall back to type 0 */
return 0;
}
static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn)

View File

@ -11,8 +11,7 @@ config HOTPLUG_PCI
---help---
Say Y here if you have a motherboard with a PCI Hotplug controller.
This allows you to add and remove PCI cards while the machine is
powered up and running. The file system pcihpfs must be mounted
in order to interact with any PCI Hotplug controllers.
powered up and running.
To compile this driver as a module, choose M here: the
module will be called pci_hotplug.

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@ -449,10 +449,8 @@ static int __init ibm_acpiphp_init(void)
}
ibm_note.device = device;
status = acpi_install_notify_handler(
ibm_acpi_handle,
ACPI_DEVICE_NOTIFY,
ibm_handle_events,
status = acpi_install_notify_handler(ibm_acpi_handle,
ACPI_DEVICE_NOTIFY, ibm_handle_events,
&ibm_note);
if (ACPI_FAILURE(status)) {
err("%s: Failed to register notification handler\n",
@ -487,9 +485,8 @@ static void __exit ibm_acpiphp_exit(void)
ACPI_DEVICE_NOTIFY,
ibm_handle_events);
if (ACPI_FAILURE(status))
err("%s: Notification handler removal failed\n",
__FUNCTION__);
// remove the /sys entries
err("%s: Notification handler removal failed\n", __FUNCTION__);
/* remove the /sys entries */
if (sysfs_remove_bin_file(sysdir, &ibm_apci_table_attr))
err("%s: removal of sysfs file apci_table failed\n",
__FUNCTION__);

View File

@ -235,12 +235,12 @@ static int set_attention_status(struct hotplug_slot *hotplug_slot, u8 value)
{
int rc = 0;
struct slot *pslot;
u8 cmd;
u8 cmd = 0x00; /* avoid compiler warning */
debug("set_attention_status - Entry hotplug_slot[%lx] value[%x]\n",
(ulong) hotplug_slot, value);
ibmphp_lock_operations();
cmd = 0x00; // avoid compiler warning
if (hotplug_slot) {
switch (value) {

View File

@ -126,9 +126,9 @@ static struct pci_dev *dlpar_find_new_dev(struct pci_bus *parent,
return NULL;
}
static struct pci_dev *dlpar_pci_add_bus(struct device_node *dn)
static void dlpar_pci_add_bus(struct device_node *dn)
{
struct pci_dn *pdn = dn->data;
struct pci_dn *pdn = PCI_DN(dn);
struct pci_controller *phb = pdn->phb;
struct pci_dev *dev = NULL;
@ -139,52 +139,52 @@ static struct pci_dev *dlpar_pci_add_bus(struct device_node *dn)
if (!dev) {
printk(KERN_ERR "%s: failed to create pci dev for %s\n",
__FUNCTION__, dn->full_name);
return NULL;
return;
}
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE ||
dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
of_scan_pci_bridge(dn, dev);
rpaphp_init_new_devs(dev->subordinate);
pcibios_fixup_new_pci_devices(dev->subordinate,0);
/* Claim new bus resources */
pcibios_claim_one_bus(dev->bus);
/* ioremap() for child bus, which may or may not succeed */
(void) remap_bus_range(dev->bus);
remap_bus_range(dev->subordinate);
/* Add new devices to global lists. Register in proc, sysfs. */
pci_bus_add_devices(phb->bus);
/* Confirm new bridge dev was created */
dev = dlpar_find_new_dev(phb->bus, dn);
if (dev) {
if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
printk(KERN_ERR "%s: unexpected header type %d\n",
__FUNCTION__, dev->hdr_type);
return NULL;
}
}
return dev;
}
static int dlpar_add_pci_slot(char *drc_name, struct device_node *dn)
{
struct pci_dev *dev;
struct pci_controller *phb;
if (rpaphp_find_pci_bus(dn))
if (pcibios_find_pci_bus(dn))
return -EINVAL;
/* Add pci bus */
dev = dlpar_pci_add_bus(dn);
dlpar_pci_add_bus(dn);
/* Confirm new bridge dev was created */
phb = PCI_DN(dn)->phb;
dev = dlpar_find_new_dev(phb->bus, dn);
if (!dev) {
printk(KERN_ERR "%s: unable to add bus %s\n", __FUNCTION__,
drc_name);
return -EIO;
}
if (dev->hdr_type != PCI_HEADER_TYPE_BRIDGE) {
printk(KERN_ERR "%s: unexpected header type %d, unable to add bus %s\n",
__FUNCTION__, dev->hdr_type, drc_name);
return -EIO;
}
/* Add hotplug slot */
if (rpaphp_add_slot(dn)) {
printk(KERN_ERR "%s: unable to add hotplug slot %s\n",
@ -221,13 +221,13 @@ static int dlpar_remove_phb(char *drc_name, struct device_node *dn)
struct pci_dn *pdn;
int rc = 0;
if (!rpaphp_find_pci_bus(dn))
if (!pcibios_find_pci_bus(dn))
return -EINVAL;
slot = find_slot(dn);
if (slot) {
/* Remove hotplug slot */
if (rpaphp_remove_slot(slot)) {
if (rpaphp_deregister_slot(slot)) {
printk(KERN_ERR
"%s: unable to remove hotplug slot %s\n",
__FUNCTION__, drc_name);
@ -366,21 +366,25 @@ int dlpar_remove_pci_slot(char *drc_name, struct device_node *dn)
struct pci_bus *bus;
struct slot *slot;
bus = rpaphp_find_pci_bus(dn);
bus = pcibios_find_pci_bus(dn);
if (!bus)
return -EINVAL;
slot = find_slot(dn);
if (slot) {
/* Remove hotplug slot */
if (rpaphp_remove_slot(slot)) {
if (rpaphp_deregister_slot(slot)) {
printk(KERN_ERR
"%s: unable to remove hotplug slot %s\n",
__FUNCTION__, drc_name);
return -EIO;
}
} else {
rpaphp_unconfig_pci_adapter(bus);
struct pci_dev *dev, *tmp;
list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
eeh_remove_bus_device(dev);
pci_remove_bus_device(dev);
}
}
if (unmap_bus_range(bus)) {

View File

@ -88,16 +88,10 @@ extern int num_slots;
/* function prototypes */
/* rpaphp_pci.c */
extern struct pci_bus *rpaphp_find_pci_bus(struct device_node *dn);
extern int rpaphp_claim_resource(struct pci_dev *dev, int resource);
extern int rpaphp_enable_pci_slot(struct slot *slot);
extern int register_pci_slot(struct slot *slot);
extern int rpaphp_register_pci_slot(struct slot *slot);
extern int rpaphp_get_pci_adapter_status(struct slot *slot, int is_init, u8 * value);
extern void rpaphp_init_new_devs(struct pci_bus *bus);
extern void rpaphp_eeh_init_nodes(struct device_node *dn);
extern int rpaphp_config_pci_adapter(struct pci_bus *bus);
extern int rpaphp_unconfig_pci_adapter(struct pci_bus *bus);
extern int rpaphp_get_sensor_state(struct slot *slot, int *state);
/* rpaphp_core.c */
extern int rpaphp_add_slot(struct device_node *dn);
@ -108,8 +102,8 @@ extern int rpaphp_get_drc_props(struct device_node *dn, int *drc_index,
/* rpaphp_slot.c */
extern void dealloc_slot_struct(struct slot *slot);
extern struct slot *alloc_slot_struct(struct device_node *dn, int drc_index, char *drc_name, int power_domain);
extern int register_slot(struct slot *slot);
extern int deregister_slot(struct slot *slot);
extern int rpaphp_register_slot(struct slot *slot);
extern int rpaphp_deregister_slot(struct slot *slot);
extern int rpaphp_get_power_status(struct slot *slot, u8 * value);
extern int rpaphp_set_attention_status(struct slot *slot, u8 status);

View File

@ -56,25 +56,6 @@ MODULE_LICENSE("GPL");
module_param(debug, bool, 0644);
static int enable_slot(struct hotplug_slot *slot);
static int disable_slot(struct hotplug_slot *slot);
static int set_attention_status(struct hotplug_slot *slot, u8 value);
static int get_power_status(struct hotplug_slot *slot, u8 * value);
static int get_attention_status(struct hotplug_slot *slot, u8 * value);
static int get_adapter_status(struct hotplug_slot *slot, u8 * value);
static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value);
struct hotplug_slot_ops rpaphp_hotplug_slot_ops = {
.owner = THIS_MODULE,
.enable_slot = enable_slot,
.disable_slot = disable_slot,
.set_attention_status = set_attention_status,
.get_power_status = get_power_status,
.get_attention_status = get_attention_status,
.get_adapter_status = get_adapter_status,
.get_max_bus_speed = get_max_bus_speed,
};
static int rpaphp_get_attention_status(struct slot *slot)
{
return slot->hotplug_slot->info->attention_status;
@ -196,11 +177,6 @@ static int get_max_bus_speed(struct hotplug_slot *hotplug_slot, enum pci_bus_spe
return 0;
}
int rpaphp_remove_slot(struct slot *slot)
{
return deregister_slot(slot);
}
static int get_children_props(struct device_node *dn, int **drc_indexes,
int **drc_names, int **drc_types, int **drc_power_domains)
{
@ -307,13 +283,15 @@ static int is_php_dn(struct device_node *dn, int **indexes, int **names,
return 0;
}
/****************************************************************
/**
* rpaphp_add_slot -- add hotplug or dlpar slot
*
* rpaphp not only registers PCI hotplug slots(HOTPLUG),
* but also logical DR slots(EMBEDDED).
* HOTPLUG slot: An adapter can be physically added/removed.
* EMBEDDED slot: An adapter can be logically removed/added
* from/to a partition with the slot.
***************************************************************/
*/
int rpaphp_add_slot(struct device_node *dn)
{
struct slot *slot;
@ -344,7 +322,7 @@ int rpaphp_add_slot(struct device_node *dn)
dbg("Found drc-index:0x%x drc-name:%s drc-type:%s\n",
indexes[i + 1], name, type);
retval = register_pci_slot(slot);
retval = rpaphp_register_pci_slot(slot);
}
}
exit:
@ -393,53 +371,85 @@ static void __exit rpaphp_exit(void)
cleanup_slots();
}
static int enable_slot(struct hotplug_slot *hotplug_slot)
static int __enable_slot(struct slot *slot)
{
int retval = 0;
struct slot *slot = (struct slot *)hotplug_slot->private;
int state;
int retval;
if (slot->state == CONFIGURED) {
dbg("%s: %s is already enabled\n", __FUNCTION__, slot->name);
goto exit;
if (slot->state == CONFIGURED)
return 0;
retval = rpaphp_get_sensor_state(slot, &state);
if (retval)
return retval;
if (state == PRESENT) {
pcibios_add_pci_devices(slot->bus);
slot->state = CONFIGURED;
} else if (state == EMPTY) {
slot->state = EMPTY;
} else {
err("%s: slot[%s] is in invalid state\n", __FUNCTION__, slot->name);
slot->state = NOT_VALID;
return -EINVAL;
}
return 0;
}
dbg("ENABLING SLOT %s\n", slot->name);
static int enable_slot(struct hotplug_slot *hotplug_slot)
{
int retval;
struct slot *slot = (struct slot *)hotplug_slot->private;
down(&rpaphp_sem);
retval = rpaphp_enable_pci_slot(slot);
retval = __enable_slot(slot);
up(&rpaphp_sem);
exit:
dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval);
return retval;
}
static int __disable_slot(struct slot *slot)
{
struct pci_dev *dev, *tmp;
if (slot->state == NOT_CONFIGURED)
return -EINVAL;
list_for_each_entry_safe(dev, tmp, &slot->bus->devices, bus_list) {
eeh_remove_bus_device(dev);
pci_remove_bus_device(dev);
}
slot->state = NOT_CONFIGURED;
return 0;
}
static int disable_slot(struct hotplug_slot *hotplug_slot)
{
int retval = -EINVAL;
struct slot *slot = (struct slot *)hotplug_slot->private;
int retval;
dbg("%s - Entry: slot[%s]\n", __FUNCTION__, slot->name);
if (slot->state == NOT_CONFIGURED) {
dbg("%s: %s is already disabled\n", __FUNCTION__, slot->name);
goto exit;
}
dbg("DISABLING SLOT %s\n", slot->name);
down(&rpaphp_sem);
retval = rpaphp_unconfig_pci_adapter(slot->bus);
retval = __disable_slot (slot);
up(&rpaphp_sem);
slot->state = NOT_CONFIGURED;
info("%s: devices in slot[%s] unconfigured.\n", __FUNCTION__,
slot->name);
exit:
dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval);
return retval;
}
struct hotplug_slot_ops rpaphp_hotplug_slot_ops = {
.owner = THIS_MODULE,
.enable_slot = enable_slot,
.disable_slot = disable_slot,
.set_attention_status = set_attention_status,
.get_power_status = get_power_status,
.get_attention_status = get_attention_status,
.get_adapter_status = get_adapter_status,
.get_max_bus_speed = get_max_bus_speed,
};
module_init(rpaphp_init);
module_exit(rpaphp_exit);
EXPORT_SYMBOL_GPL(rpaphp_add_slot);
EXPORT_SYMBOL_GPL(rpaphp_remove_slot);
EXPORT_SYMBOL_GPL(rpaphp_slot_head);
EXPORT_SYMBOL_GPL(rpaphp_get_drc_props);

View File

@ -32,37 +32,7 @@
#include "../pci.h" /* for pci_add_new_bus */
#include "rpaphp.h"
static struct pci_bus *find_bus_among_children(struct pci_bus *bus,
struct device_node *dn)
{
struct pci_bus *child = NULL;
struct list_head *tmp;
struct device_node *busdn;
busdn = pci_bus_to_OF_node(bus);
if (busdn == dn)
return bus;
list_for_each(tmp, &bus->children) {
child = find_bus_among_children(pci_bus_b(tmp), dn);
if (child)
break;
}
return child;
}
struct pci_bus *rpaphp_find_pci_bus(struct device_node *dn)
{
struct pci_dn *pdn = dn->data;
if (!pdn || !pdn->phb || !pdn->phb->bus)
return NULL;
return find_bus_among_children(pdn->phb->bus, dn);
}
EXPORT_SYMBOL_GPL(rpaphp_find_pci_bus);
static int rpaphp_get_sensor_state(struct slot *slot, int *state)
int rpaphp_get_sensor_state(struct slot *slot, int *state)
{
int rc;
int setlevel;
@ -120,7 +90,7 @@ int rpaphp_get_pci_adapter_status(struct slot *slot, int is_init, u8 * value)
/* config/unconfig adapter */
*value = slot->state;
} else {
bus = rpaphp_find_pci_bus(slot->dn);
bus = pcibios_find_pci_bus(slot->dn);
if (bus && !list_empty(&bus->devices))
*value = CONFIGURED;
else
@ -131,140 +101,6 @@ exit:
return rc;
}
/* Must be called before pci_bus_add_devices */
void rpaphp_fixup_new_pci_devices(struct pci_bus *bus, int fix_bus)
{
struct pci_dev *dev;
list_for_each_entry(dev, &bus->devices, bus_list) {
/*
* Skip already-present devices (which are on the
* global device list.)
*/
if (list_empty(&dev->global_list)) {
int i;
/* Need to setup IOMMU tables */
ppc_md.iommu_dev_setup(dev);
if(fix_bus)
pcibios_fixup_device_resources(dev, bus);
pci_read_irq_line(dev);
for (i = 0; i < PCI_NUM_RESOURCES; i++) {
struct resource *r = &dev->resource[i];
if (r->parent || !r->start || !r->flags)
continue;
pci_claim_resource(dev, i);
}
}
}
}
static void rpaphp_eeh_add_bus_device(struct pci_bus *bus)
{
struct pci_dev *dev;
list_for_each_entry(dev, &bus->devices, bus_list) {
eeh_add_device_late(dev);
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
struct pci_bus *subbus = dev->subordinate;
if (subbus)
rpaphp_eeh_add_bus_device (subbus);
}
}
}
static int rpaphp_pci_config_bridge(struct pci_dev *dev)
{
u8 sec_busno;
struct pci_bus *child_bus;
struct pci_dev *child_dev;
dbg("Enter %s: BRIDGE dev=%s\n", __FUNCTION__, pci_name(dev));
/* get busno of downstream bus */
pci_read_config_byte(dev, PCI_SECONDARY_BUS, &sec_busno);
/* add to children of PCI bridge dev->bus */
child_bus = pci_add_new_bus(dev->bus, dev, sec_busno);
if (!child_bus) {
err("%s: could not add second bus\n", __FUNCTION__);
return -EIO;
}
sprintf(child_bus->name, "PCI Bus #%02x", child_bus->number);
/* do pci_scan_child_bus */
pci_scan_child_bus(child_bus);
list_for_each_entry(child_dev, &child_bus->devices, bus_list) {
eeh_add_device_late(child_dev);
}
/* fixup new pci devices without touching bus struct */
rpaphp_fixup_new_pci_devices(child_bus, 0);
/* Make the discovered devices available */
pci_bus_add_devices(child_bus);
return 0;
}
void rpaphp_init_new_devs(struct pci_bus *bus)
{
rpaphp_fixup_new_pci_devices(bus, 0);
rpaphp_eeh_add_bus_device(bus);
}
EXPORT_SYMBOL_GPL(rpaphp_init_new_devs);
/*****************************************************************************
rpaphp_pci_config_slot() will configure all devices under the
given slot->dn and return the the first pci_dev.
*****************************************************************************/
static struct pci_dev *
rpaphp_pci_config_slot(struct pci_bus *bus)
{
struct device_node *dn = pci_bus_to_OF_node(bus);
struct pci_dev *dev = NULL;
int slotno;
int num;
dbg("Enter %s: dn=%s bus=%s\n", __FUNCTION__, dn->full_name, bus->name);
if (!dn || !dn->child)
return NULL;
if (_machine == PLATFORM_PSERIES_LPAR) {
of_scan_bus(dn, bus);
if (list_empty(&bus->devices)) {
err("%s: No new device found\n", __FUNCTION__);
return NULL;
}
rpaphp_init_new_devs(bus);
pci_bus_add_devices(bus);
dev = list_entry(&bus->devices, struct pci_dev, bus_list);
} else {
slotno = PCI_SLOT(PCI_DN(dn->child)->devfn);
/* pci_scan_slot should find all children */
num = pci_scan_slot(bus, PCI_DEVFN(slotno, 0));
if (num) {
rpaphp_fixup_new_pci_devices(bus, 1);
pci_bus_add_devices(bus);
}
if (list_empty(&bus->devices)) {
err("%s: No new device found\n", __FUNCTION__);
return NULL;
}
list_for_each_entry(dev, &bus->devices, bus_list) {
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE)
rpaphp_pci_config_bridge(dev);
rpaphp_eeh_add_bus_device(bus);
}
}
return dev;
}
static void print_slot_pci_funcs(struct pci_bus *bus)
{
struct device_node *dn;
@ -280,60 +116,6 @@ static void print_slot_pci_funcs(struct pci_bus *bus)
return;
}
int rpaphp_config_pci_adapter(struct pci_bus *bus)
{
struct device_node *dn = pci_bus_to_OF_node(bus);
struct pci_dev *dev;
int rc = -ENODEV;
dbg("Entry %s: slot[%s]\n", __FUNCTION__, dn->full_name);
if (!dn)
goto exit;
eeh_add_device_tree_early(dn);
dev = rpaphp_pci_config_slot(bus);
if (!dev) {
err("%s: can't find any devices.\n", __FUNCTION__);
goto exit;
}
print_slot_pci_funcs(bus);
rc = 0;
exit:
dbg("Exit %s: rc=%d\n", __FUNCTION__, rc);
return rc;
}
EXPORT_SYMBOL_GPL(rpaphp_config_pci_adapter);
static void rpaphp_eeh_remove_bus_device(struct pci_dev *dev)
{
eeh_remove_device(dev);
if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
struct pci_bus *bus = dev->subordinate;
struct list_head *ln;
if (!bus)
return;
for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
struct pci_dev *pdev = pci_dev_b(ln);
if (pdev)
rpaphp_eeh_remove_bus_device(pdev);
}
}
return;
}
int rpaphp_unconfig_pci_adapter(struct pci_bus *bus)
{
struct pci_dev *dev, *tmp;
list_for_each_entry_safe(dev, tmp, &bus->devices, bus_list) {
rpaphp_eeh_remove_bus_device(dev);
pci_remove_bus_device(dev);
}
return 0;
}
EXPORT_SYMBOL_GPL(rpaphp_unconfig_pci_adapter);
static int setup_pci_hotplug_slot_info(struct slot *slot)
{
struct hotplug_slot_info *hotplug_slot_info = slot->hotplug_slot->info;
@ -370,7 +152,7 @@ static int setup_pci_slot(struct slot *slot)
struct pci_bus *bus;
BUG_ON(!dn);
bus = rpaphp_find_pci_bus(dn);
bus = pcibios_find_pci_bus(dn);
if (!bus) {
err("%s: no pci_bus for dn %s\n", __FUNCTION__, dn->full_name);
goto exit_rc;
@ -395,10 +177,7 @@ static int setup_pci_slot(struct slot *slot)
if (slot->hotplug_slot->info->adapter_status == NOT_CONFIGURED) {
dbg("%s CONFIGURING pci adapter in slot[%s]\n",
__FUNCTION__, slot->name);
if (rpaphp_config_pci_adapter(slot->bus)) {
err("%s: CONFIG pci adapter failed\n", __FUNCTION__);
goto exit_rc;
}
pcibios_add_pci_devices(slot->bus);
} else if (slot->hotplug_slot->info->adapter_status != CONFIGURED) {
err("%s: slot[%s]'s adapter_status is NOT_VALID.\n",
@ -420,7 +199,7 @@ exit_rc:
return -EINVAL;
}
int register_pci_slot(struct slot *slot)
int rpaphp_register_pci_slot(struct slot *slot)
{
int rc = -EINVAL;
@ -428,42 +207,8 @@ int register_pci_slot(struct slot *slot)
goto exit_rc;
if (setup_pci_slot(slot))
goto exit_rc;
rc = register_slot(slot);
rc = rpaphp_register_slot(slot);
exit_rc:
return rc;
}
int rpaphp_enable_pci_slot(struct slot *slot)
{
int retval = 0, state;
retval = rpaphp_get_sensor_state(slot, &state);
if (retval)
goto exit;
dbg("%s: sensor state[%d]\n", __FUNCTION__, state);
/* if slot is not empty, enable the adapter */
if (state == PRESENT) {
dbg("%s : slot[%s] is occupied.\n", __FUNCTION__, slot->name);
retval = rpaphp_config_pci_adapter(slot->bus);
if (!retval) {
slot->state = CONFIGURED;
info("%s: devices in slot[%s] configured\n",
__FUNCTION__, slot->name);
} else {
slot->state = NOT_CONFIGURED;
dbg("%s: no pci_dev struct for adapter in slot[%s]\n",
__FUNCTION__, slot->name);
}
} else if (state == EMPTY) {
dbg("%s : slot[%s] is empty\n", __FUNCTION__, slot->name);
slot->state = EMPTY;
} else {
err("%s: slot[%s] is in invalid state\n", __FUNCTION__,
slot->name);
slot->state = NOT_VALID;
retval = -EINVAL;
}
exit:
dbg("%s - Exit: rc[%d]\n", __FUNCTION__, retval);
return retval;
}

View File

@ -137,7 +137,7 @@ static int is_registered(struct slot *slot)
return 0;
}
int deregister_slot(struct slot *slot)
int rpaphp_deregister_slot(struct slot *slot)
{
int retval = 0;
struct hotplug_slot *php_slot = slot->hotplug_slot;
@ -160,7 +160,7 @@ int deregister_slot(struct slot *slot)
return retval;
}
int register_slot(struct slot *slot)
int rpaphp_register_slot(struct slot *slot)
{
int retval;
@ -169,7 +169,7 @@ int register_slot(struct slot *slot)
slot->power_domain, slot->type);
/* should not try to register the same slot twice */
if (is_registered(slot)) { /* should't be here */
err("register_slot: slot[%s] is already registered\n", slot->name);
err("rpaphp_register_slot: slot[%s] is already registered\n", slot->name);
rpaphp_release_slot(slot->hotplug_slot);
return -EAGAIN;
}

View File

@ -95,6 +95,7 @@ struct controller {
u8 function;
u8 slot_device_offset;
u8 add_support;
u32 pcix_misc2_reg; /* for amd pogo errata */
enum pci_bus_speed speed;
u32 first_slot; /* First physical slot number */
u8 slot_bus; /* Bus where the slots handled by this controller sit */
@ -113,6 +114,26 @@ struct hotplug_params {
/* Define AMD SHPC ID */
#define PCI_DEVICE_ID_AMD_GOLAM_7450 0x7450
#define PCI_DEVICE_ID_AMD_POGO_7458 0x7458
/* AMD PCIX bridge registers */
#define PCIX_MEM_BASE_LIMIT_OFFSET 0x1C
#define PCIX_MISCII_OFFSET 0x48
#define PCIX_MISC_BRIDGE_ERRORS_OFFSET 0x80
/* AMD PCIX_MISCII masks and offsets */
#define PERRNONFATALENABLE_MASK 0x00040000
#define PERRFATALENABLE_MASK 0x00080000
#define PERRFLOODENABLE_MASK 0x00100000
#define SERRNONFATALENABLE_MASK 0x00200000
#define SERRFATALENABLE_MASK 0x00400000
/* AMD PCIX_MISC_BRIDGE_ERRORS masks and offsets */
#define PERR_OBSERVED_MASK 0x00000001
/* AMD PCIX_MEM_BASE_LIMIT masks */
#define RSE_MASK 0x40000000
#define INT_BUTTON_IGNORE 0
#define INT_PRESENCE_ON 1
@ -333,6 +354,79 @@ static inline int wait_for_ctrl_irq (struct controller *ctrl)
return retval;
}
static inline void amd_pogo_errata_save_misc_reg(struct slot *p_slot)
{
u32 pcix_misc2_temp;
/* save MiscII register */
pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, &pcix_misc2_temp);
p_slot->ctrl->pcix_misc2_reg = pcix_misc2_temp;
/* clear SERR/PERR enable bits */
pcix_misc2_temp &= ~SERRFATALENABLE_MASK;
pcix_misc2_temp &= ~SERRNONFATALENABLE_MASK;
pcix_misc2_temp &= ~PERRFLOODENABLE_MASK;
pcix_misc2_temp &= ~PERRFATALENABLE_MASK;
pcix_misc2_temp &= ~PERRNONFATALENABLE_MASK;
pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
}
static inline void amd_pogo_errata_restore_misc_reg(struct slot *p_slot)
{
u32 pcix_misc2_temp;
u32 pcix_bridge_errors_reg;
u32 pcix_mem_base_reg;
u8 perr_set;
u8 rse_set;
/* write-one-to-clear Bridge_Errors[ PERR_OBSERVED ] */
pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MISC_BRIDGE_ERRORS_OFFSET, &pcix_bridge_errors_reg);
perr_set = pcix_bridge_errors_reg & PERR_OBSERVED_MASK;
if (perr_set) {
dbg ("%s W1C: Bridge_Errors[ PERR_OBSERVED = %08X]\n",__FUNCTION__ , perr_set);
pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISC_BRIDGE_ERRORS_OFFSET, perr_set);
}
/* write-one-to-clear Memory_Base_Limit[ RSE ] */
pci_read_config_dword(p_slot->ctrl->pci_dev, PCIX_MEM_BASE_LIMIT_OFFSET, &pcix_mem_base_reg);
rse_set = pcix_mem_base_reg & RSE_MASK;
if (rse_set) {
dbg ("%s W1C: Memory_Base_Limit[ RSE ]\n",__FUNCTION__ );
pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MEM_BASE_LIMIT_OFFSET, rse_set);
}
/* restore MiscII register */
pci_read_config_dword( p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, &pcix_misc2_temp );
if (p_slot->ctrl->pcix_misc2_reg & SERRFATALENABLE_MASK)
pcix_misc2_temp |= SERRFATALENABLE_MASK;
else
pcix_misc2_temp &= ~SERRFATALENABLE_MASK;
if (p_slot->ctrl->pcix_misc2_reg & SERRNONFATALENABLE_MASK)
pcix_misc2_temp |= SERRNONFATALENABLE_MASK;
else
pcix_misc2_temp &= ~SERRNONFATALENABLE_MASK;
if (p_slot->ctrl->pcix_misc2_reg & PERRFLOODENABLE_MASK)
pcix_misc2_temp |= PERRFLOODENABLE_MASK;
else
pcix_misc2_temp &= ~PERRFLOODENABLE_MASK;
if (p_slot->ctrl->pcix_misc2_reg & PERRFATALENABLE_MASK)
pcix_misc2_temp |= PERRFATALENABLE_MASK;
else
pcix_misc2_temp &= ~PERRFATALENABLE_MASK;
if (p_slot->ctrl->pcix_misc2_reg & PERRNONFATALENABLE_MASK)
pcix_misc2_temp |= PERRNONFATALENABLE_MASK;
else
pcix_misc2_temp &= ~PERRNONFATALENABLE_MASK;
pci_write_config_dword(p_slot->ctrl->pci_dev, PCIX_MISCII_OFFSET, pcix_misc2_temp);
}
#define SLOT_NAME_SIZE 10
static inline void make_slot_name(char *buffer, int buffer_size, struct slot *slot)

View File

@ -894,7 +894,17 @@ int shpchp_enable_slot (struct slot *p_slot)
dbg("%s: p_slot->pwr_save %x\n", __FUNCTION__, p_slot->pwr_save);
p_slot->hpc_ops->get_latch_status(p_slot, &getstatus);
if(((p_slot->ctrl->pci_dev->vendor == PCI_VENDOR_ID_AMD) ||
(p_slot->ctrl->pci_dev->device == PCI_DEVICE_ID_AMD_POGO_7458))
&& p_slot->ctrl->num_slots == 1) {
/* handle amd pogo errata; this must be done before enable */
amd_pogo_errata_save_misc_reg(p_slot);
rc = board_added(p_slot);
/* handle amd pogo errata; this must be done after enable */
amd_pogo_errata_restore_misc_reg(p_slot);
} else
rc = board_added(p_slot);
if (rc) {
p_slot->hpc_ops->get_adapter_status(p_slot,
&(p_slot->presence_save));

View File

@ -137,6 +137,8 @@ static void set_msi_affinity(unsigned int vector, cpumask_t cpu_mask)
break;
}
}
#else
#define set_msi_affinity NULL
#endif /* CONFIG_SMP */
static void mask_MSI_irq(unsigned int vector)
@ -214,7 +216,7 @@ static struct hw_interrupt_type msix_irq_type = {
.disable = mask_MSI_irq,
.ack = mask_MSI_irq,
.end = end_msi_irq_w_maskbit,
.set_affinity = set_msi_irq_affinity
.set_affinity = set_msi_affinity
};
/*
@ -230,7 +232,7 @@ static struct hw_interrupt_type msi_irq_w_maskbit_type = {
.disable = mask_MSI_irq,
.ack = mask_MSI_irq,
.end = end_msi_irq_w_maskbit,
.set_affinity = set_msi_irq_affinity
.set_affinity = set_msi_affinity
};
/*
@ -246,7 +248,7 @@ static struct hw_interrupt_type msi_irq_wo_maskbit_type = {
.disable = do_nothing,
.ack = do_nothing,
.end = end_msi_irq_wo_maskbit,
.set_affinity = set_msi_irq_affinity
.set_affinity = set_msi_affinity
};
static void msi_data_init(struct msg_data *msi_data,

View File

@ -22,12 +22,6 @@ extern int vector_irq[NR_VECTORS];
extern void (*interrupt[NR_IRQS])(void);
extern int pci_vector_resources(int last, int nr_released);
#ifdef CONFIG_SMP
#define set_msi_irq_affinity set_msi_affinity
#else
#define set_msi_irq_affinity NULL
#endif
/*
* MSI-X Address Register
*/

View File

@ -163,6 +163,7 @@ int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap)
return __pci_bus_find_cap(bus, devfn, hdr_type & 0x7f, cap);
}
#if 0
/**
* pci_find_ext_capability - Find an extended capability
* @dev: PCI device to query
@ -210,6 +211,7 @@ int pci_find_ext_capability(struct pci_dev *dev, int cap)
return 0;
}
#endif /* 0 */
/**
* pci_find_parent_resource - return resource region of parent bus of given region

View File

@ -112,6 +112,7 @@ pci_claim_resource(struct pci_dev *dev, int resource)
return err;
}
EXPORT_SYMBOL_GPL(pci_claim_resource);
int pci_assign_resource(struct pci_dev *dev, int resno)
{

View File

@ -1665,7 +1665,6 @@ static int __devinit cyblafb_init(void)
}
#endif
output("CyblaFB version %s initializing\n", VERSION);
return pci_module_init(&cyblafb_pci_driver);
return pci_register_driver(&cyblafb_pci_driver);
}

View File

@ -406,7 +406,6 @@ struct pci_dev *pci_find_device_reverse (unsigned int vendor, unsigned int devic
struct pci_dev *pci_find_slot (unsigned int bus, unsigned int devfn);
int pci_find_capability (struct pci_dev *dev, int cap);
int pci_find_next_capability (struct pci_dev *dev, u8 pos, int cap);
int pci_find_ext_capability (struct pci_dev *dev, int cap);
struct pci_bus * pci_find_next_bus(const struct pci_bus *from);
struct pci_dev *pci_get_device (unsigned int vendor, unsigned int device, struct pci_dev *from);
@ -626,7 +625,6 @@ static inline int pci_register_driver(struct pci_driver *drv) { return 0;}
static inline void pci_unregister_driver(struct pci_driver *drv) { }
static inline int pci_find_capability (struct pci_dev *dev, int cap) {return 0; }
static inline int pci_find_next_capability (struct pci_dev *dev, u8 post, int cap) { return 0; }
static inline int pci_find_ext_capability (struct pci_dev *dev, int cap) {return 0; }
static inline const struct pci_device_id *pci_match_device(const struct pci_device_id *ids, const struct pci_dev *dev) { return NULL; }
/* Power management related routines */

View File

@ -394,14 +394,9 @@
#define PCI_DEVICE_ID_NS_SC1100_SMI 0x0511
#define PCI_DEVICE_ID_NS_SC1100_XBUS 0x0515
#define PCI_DEVICE_ID_NS_87410 0xd001
#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d
#define PCI_DEVICE_ID_NS_CS5535_HOST_BRIDGE 0x0028
#define PCI_DEVICE_ID_NS_CS5535_ISA_BRIDGE 0x002b
#define PCI_DEVICE_ID_NS_CS5535_IDE 0x002d
#define PCI_DEVICE_ID_NS_CS5535_AUDIO 0x002e
#define PCI_DEVICE_ID_NS_CS5535_USB 0x002f
#define PCI_DEVICE_ID_NS_CS5535_VIDEO 0x0030
#define PCI_VENDOR_ID_TSENG 0x100c
#define PCI_DEVICE_ID_TSENG_W32P_2 0x3202
@ -511,8 +506,6 @@
#define PCI_DEVICE_ID_AMD_CS5536_UOC 0x2097
#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A
#define PCI_DEVICE_ID_AMD_CS5536_IDE 0x209A
#define PCI_DEVICE_ID_AMD_LX_VIDEO 0x2081
#define PCI_DEVICE_ID_AMD_LX_AES 0x2082
@ -2065,6 +2058,7 @@
#define PCI_DEVICE_ID_INTEL_82801EB_5 0x24d5
#define PCI_DEVICE_ID_INTEL_82801EB_6 0x24d6
#define PCI_DEVICE_ID_INTEL_82801EB_11 0x24db
#define PCI_DEVICE_ID_INTEL_82801EB_13 0x24dd
#define PCI_DEVICE_ID_INTEL_ESB_1 0x25a1
#define PCI_DEVICE_ID_INTEL_ESB_2 0x25a2
#define PCI_DEVICE_ID_INTEL_ESB_4 0x25a4
@ -2106,6 +2100,13 @@
#define PCI_DEVICE_ID_INTEL_ICH7_19 0x27dd
#define PCI_DEVICE_ID_INTEL_ICH7_20 0x27de
#define PCI_DEVICE_ID_INTEL_ICH7_21 0x27df
#define PCI_DEVICE_ID_INTEL_ICH8_0 0x2810
#define PCI_DEVICE_ID_INTEL_ICH8_1 0x2811
#define PCI_DEVICE_ID_INTEL_ICH8_2 0x2812
#define PCI_DEVICE_ID_INTEL_ICH8_3 0x2814
#define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815
#define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e
#define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850
#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
@ -2149,6 +2150,7 @@
#define PCI_DEVICE_ID_INTEL_82443GX_2 0x71a2
#define PCI_DEVICE_ID_INTEL_82372FB_1 0x7601
#define PCI_DEVICE_ID_INTEL_82454GX 0x84c4
#define PCI_DEVICE_ID_INTEL_82450GX 0x84c5
#define PCI_DEVICE_ID_INTEL_82451NX 0x84ca
#define PCI_DEVICE_ID_INTEL_82454NX 0x84cb
#define PCI_DEVICE_ID_INTEL_84460GX 0x84ea